18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * Copyright © 2016 Intel Corporation
38c2ecf20Sopenharmony_ci *
48c2ecf20Sopenharmony_ci * Permission is hereby granted, free of charge, to any person obtaining a
58c2ecf20Sopenharmony_ci * copy of this software and associated documentation files (the "Software"),
68c2ecf20Sopenharmony_ci * to deal in the Software without restriction, including without limitation
78c2ecf20Sopenharmony_ci * the rights to use, copy, modify, merge, publish, distribute, sublicense,
88c2ecf20Sopenharmony_ci * and/or sell copies of the Software, and to permit persons to whom the
98c2ecf20Sopenharmony_ci * Software is furnished to do so, subject to the following conditions:
108c2ecf20Sopenharmony_ci *
118c2ecf20Sopenharmony_ci * The above copyright notice and this permission notice shall be included in
128c2ecf20Sopenharmony_ci * all copies or substantial portions of the Software.
138c2ecf20Sopenharmony_ci *
148c2ecf20Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
158c2ecf20Sopenharmony_ci * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
168c2ecf20Sopenharmony_ci * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
178c2ecf20Sopenharmony_ci * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
188c2ecf20Sopenharmony_ci * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
198c2ecf20Sopenharmony_ci * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
208c2ecf20Sopenharmony_ci * OTHER DEALINGS IN THE SOFTWARE.
218c2ecf20Sopenharmony_ci */
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci#ifndef DRM_DP_DUAL_MODE_HELPER_H
248c2ecf20Sopenharmony_ci#define DRM_DP_DUAL_MODE_HELPER_H
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#include <linux/types.h>
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci/*
298c2ecf20Sopenharmony_ci * Optional for type 1 DVI adaptors
308c2ecf20Sopenharmony_ci * Mandatory for type 1 HDMI and type 2 adaptors
318c2ecf20Sopenharmony_ci */
328c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_HDMI_ID 0x00 /* 00-0f */
338c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_HDMI_ID_LEN 16
348c2ecf20Sopenharmony_ci/*
358c2ecf20Sopenharmony_ci * Optional for type 1 adaptors
368c2ecf20Sopenharmony_ci * Mandatory for type 2 adaptors
378c2ecf20Sopenharmony_ci */
388c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_ADAPTOR_ID 0x10
398c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_REV_MASK 0x07
408c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_REV_TYPE2 0x00
418c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_TYPE_MASK 0xf0
428c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_TYPE_TYPE2 0xa0
438c2ecf20Sopenharmony_ci/* This field is marked reserved in dual mode spec, used in LSPCON */
448c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_TYPE_HAS_DPCD 0x08
458c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_IEEE_OUI 0x11 /* 11-13*/
468c2ecf20Sopenharmony_ci#define  DP_DUAL_IEEE_OUI_LEN 3
478c2ecf20Sopenharmony_ci#define DP_DUAL_DEVICE_ID 0x14 /* 14-19 */
488c2ecf20Sopenharmony_ci#define  DP_DUAL_DEVICE_ID_LEN 6
498c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_HARDWARE_REV 0x1a
508c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_FIRMWARE_MAJOR_REV 0x1b
518c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_FIRMWARE_MINOR_REV 0x1c
528c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_MAX_TMDS_CLOCK 0x1d
538c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_I2C_SPEED_CAP 0x1e
548c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_TMDS_OEN 0x20
558c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_TMDS_DISABLE 0x01
568c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_HDMI_PIN_CTRL 0x21
578c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_CEC_ENABLE 0x01
588c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_I2C_SPEED_CTRL 0x22
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci/* LSPCON specific registers, defined by MCA */
618c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_LSPCON_MODE_CHANGE		0x40
628c2ecf20Sopenharmony_ci#define DP_DUAL_MODE_LSPCON_CURRENT_MODE		0x41
638c2ecf20Sopenharmony_ci#define  DP_DUAL_MODE_LSPCON_MODE_PCON			0x1
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_cistruct i2c_adapter;
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_cissize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter,
688c2ecf20Sopenharmony_ci			      u8 offset, void *buffer, size_t size);
698c2ecf20Sopenharmony_cissize_t drm_dp_dual_mode_write(struct i2c_adapter *adapter,
708c2ecf20Sopenharmony_ci			       u8 offset, const void *buffer, size_t size);
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_ci/**
738c2ecf20Sopenharmony_ci * enum drm_lspcon_mode
748c2ecf20Sopenharmony_ci * @DRM_LSPCON_MODE_INVALID: No LSPCON.
758c2ecf20Sopenharmony_ci * @DRM_LSPCON_MODE_LS: Level shifter mode of LSPCON
768c2ecf20Sopenharmony_ci *	which drives DP++ to HDMI 1.4 conversion.
778c2ecf20Sopenharmony_ci * @DRM_LSPCON_MODE_PCON: Protocol converter mode of LSPCON
788c2ecf20Sopenharmony_ci *	which drives DP++ to HDMI 2.0 active conversion.
798c2ecf20Sopenharmony_ci */
808c2ecf20Sopenharmony_cienum drm_lspcon_mode {
818c2ecf20Sopenharmony_ci	DRM_LSPCON_MODE_INVALID,
828c2ecf20Sopenharmony_ci	DRM_LSPCON_MODE_LS,
838c2ecf20Sopenharmony_ci	DRM_LSPCON_MODE_PCON,
848c2ecf20Sopenharmony_ci};
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci/**
878c2ecf20Sopenharmony_ci * enum drm_dp_dual_mode_type - Type of the DP dual mode adaptor
888c2ecf20Sopenharmony_ci * @DRM_DP_DUAL_MODE_NONE: No DP dual mode adaptor
898c2ecf20Sopenharmony_ci * @DRM_DP_DUAL_MODE_UNKNOWN: Could be either none or type 1 DVI adaptor
908c2ecf20Sopenharmony_ci * @DRM_DP_DUAL_MODE_TYPE1_DVI: Type 1 DVI adaptor
918c2ecf20Sopenharmony_ci * @DRM_DP_DUAL_MODE_TYPE1_HDMI: Type 1 HDMI adaptor
928c2ecf20Sopenharmony_ci * @DRM_DP_DUAL_MODE_TYPE2_DVI: Type 2 DVI adaptor
938c2ecf20Sopenharmony_ci * @DRM_DP_DUAL_MODE_TYPE2_HDMI: Type 2 HDMI adaptor
948c2ecf20Sopenharmony_ci * @DRM_DP_DUAL_MODE_LSPCON: Level shifter / protocol converter
958c2ecf20Sopenharmony_ci */
968c2ecf20Sopenharmony_cienum drm_dp_dual_mode_type {
978c2ecf20Sopenharmony_ci	DRM_DP_DUAL_MODE_NONE,
988c2ecf20Sopenharmony_ci	DRM_DP_DUAL_MODE_UNKNOWN,
998c2ecf20Sopenharmony_ci	DRM_DP_DUAL_MODE_TYPE1_DVI,
1008c2ecf20Sopenharmony_ci	DRM_DP_DUAL_MODE_TYPE1_HDMI,
1018c2ecf20Sopenharmony_ci	DRM_DP_DUAL_MODE_TYPE2_DVI,
1028c2ecf20Sopenharmony_ci	DRM_DP_DUAL_MODE_TYPE2_HDMI,
1038c2ecf20Sopenharmony_ci	DRM_DP_DUAL_MODE_LSPCON,
1048c2ecf20Sopenharmony_ci};
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_cienum drm_dp_dual_mode_type drm_dp_dual_mode_detect(struct i2c_adapter *adapter);
1078c2ecf20Sopenharmony_ciint drm_dp_dual_mode_max_tmds_clock(enum drm_dp_dual_mode_type type,
1088c2ecf20Sopenharmony_ci				    struct i2c_adapter *adapter);
1098c2ecf20Sopenharmony_ciint drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type,
1108c2ecf20Sopenharmony_ci				     struct i2c_adapter *adapter, bool *enabled);
1118c2ecf20Sopenharmony_ciint drm_dp_dual_mode_set_tmds_output(enum drm_dp_dual_mode_type type,
1128c2ecf20Sopenharmony_ci				     struct i2c_adapter *adapter, bool enable);
1138c2ecf20Sopenharmony_ciconst char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type);
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ciint drm_lspcon_get_mode(struct i2c_adapter *adapter,
1168c2ecf20Sopenharmony_ci			enum drm_lspcon_mode *current_mode);
1178c2ecf20Sopenharmony_ciint drm_lspcon_set_mode(struct i2c_adapter *adapter,
1188c2ecf20Sopenharmony_ci			enum drm_lspcon_mode reqd_mode);
1198c2ecf20Sopenharmony_ci#endif
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