18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef __GENERIC_IO_H 38c2ecf20Sopenharmony_ci#define __GENERIC_IO_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci#include <linux/linkage.h> 68c2ecf20Sopenharmony_ci#include <asm/byteorder.h> 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci/* 98c2ecf20Sopenharmony_ci * These are the "generic" interfaces for doing new-style 108c2ecf20Sopenharmony_ci * memory-mapped or PIO accesses. Architectures may do 118c2ecf20Sopenharmony_ci * their own arch-optimized versions, these just act as 128c2ecf20Sopenharmony_ci * wrappers around the old-style IO register access functions: 138c2ecf20Sopenharmony_ci * read[bwl]/write[bwl]/in[bwl]/out[bwl] 148c2ecf20Sopenharmony_ci * 158c2ecf20Sopenharmony_ci * Don't include this directly, include it from <asm/io.h>. 168c2ecf20Sopenharmony_ci */ 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci/* 198c2ecf20Sopenharmony_ci * Read/write from/to an (offsettable) iomem cookie. It might be a PIO 208c2ecf20Sopenharmony_ci * access or a MMIO access, these functions don't care. The info is 218c2ecf20Sopenharmony_ci * encoded in the hardware mapping set up by the mapping functions 228c2ecf20Sopenharmony_ci * (or the cookie itself, depending on implementation and hw). 238c2ecf20Sopenharmony_ci * 248c2ecf20Sopenharmony_ci * The generic routines just encode the PIO/MMIO as part of the 258c2ecf20Sopenharmony_ci * cookie, and coldly assume that the MMIO IO mappings are not 268c2ecf20Sopenharmony_ci * in the low address range. Architectures for which this is not 278c2ecf20Sopenharmony_ci * true can't use this generic implementation. 288c2ecf20Sopenharmony_ci */ 298c2ecf20Sopenharmony_ciextern unsigned int ioread8(const void __iomem *); 308c2ecf20Sopenharmony_ciextern unsigned int ioread16(const void __iomem *); 318c2ecf20Sopenharmony_ciextern unsigned int ioread16be(const void __iomem *); 328c2ecf20Sopenharmony_ciextern unsigned int ioread32(const void __iomem *); 338c2ecf20Sopenharmony_ciextern unsigned int ioread32be(const void __iomem *); 348c2ecf20Sopenharmony_ci#ifdef CONFIG_64BIT 358c2ecf20Sopenharmony_ciextern u64 ioread64(const void __iomem *); 368c2ecf20Sopenharmony_ciextern u64 ioread64be(const void __iomem *); 378c2ecf20Sopenharmony_ci#endif 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci#ifdef readq 408c2ecf20Sopenharmony_ci#define ioread64_lo_hi ioread64_lo_hi 418c2ecf20Sopenharmony_ci#define ioread64_hi_lo ioread64_hi_lo 428c2ecf20Sopenharmony_ci#define ioread64be_lo_hi ioread64be_lo_hi 438c2ecf20Sopenharmony_ci#define ioread64be_hi_lo ioread64be_hi_lo 448c2ecf20Sopenharmony_ciextern u64 ioread64_lo_hi(const void __iomem *addr); 458c2ecf20Sopenharmony_ciextern u64 ioread64_hi_lo(const void __iomem *addr); 468c2ecf20Sopenharmony_ciextern u64 ioread64be_lo_hi(const void __iomem *addr); 478c2ecf20Sopenharmony_ciextern u64 ioread64be_hi_lo(const void __iomem *addr); 488c2ecf20Sopenharmony_ci#endif 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ciextern void iowrite8(u8, void __iomem *); 518c2ecf20Sopenharmony_ciextern void iowrite16(u16, void __iomem *); 528c2ecf20Sopenharmony_ciextern void iowrite16be(u16, void __iomem *); 538c2ecf20Sopenharmony_ciextern void iowrite32(u32, void __iomem *); 548c2ecf20Sopenharmony_ciextern void iowrite32be(u32, void __iomem *); 558c2ecf20Sopenharmony_ci#ifdef CONFIG_64BIT 568c2ecf20Sopenharmony_ciextern void iowrite64(u64, void __iomem *); 578c2ecf20Sopenharmony_ciextern void iowrite64be(u64, void __iomem *); 588c2ecf20Sopenharmony_ci#endif 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci#ifdef writeq 618c2ecf20Sopenharmony_ci#define iowrite64_lo_hi iowrite64_lo_hi 628c2ecf20Sopenharmony_ci#define iowrite64_hi_lo iowrite64_hi_lo 638c2ecf20Sopenharmony_ci#define iowrite64be_lo_hi iowrite64be_lo_hi 648c2ecf20Sopenharmony_ci#define iowrite64be_hi_lo iowrite64be_hi_lo 658c2ecf20Sopenharmony_ciextern void iowrite64_lo_hi(u64 val, void __iomem *addr); 668c2ecf20Sopenharmony_ciextern void iowrite64_hi_lo(u64 val, void __iomem *addr); 678c2ecf20Sopenharmony_ciextern void iowrite64be_lo_hi(u64 val, void __iomem *addr); 688c2ecf20Sopenharmony_ciextern void iowrite64be_hi_lo(u64 val, void __iomem *addr); 698c2ecf20Sopenharmony_ci#endif 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci/* 728c2ecf20Sopenharmony_ci * "string" versions of the above. Note that they 738c2ecf20Sopenharmony_ci * use native byte ordering for the accesses (on 748c2ecf20Sopenharmony_ci * the assumption that IO and memory agree on a 758c2ecf20Sopenharmony_ci * byte order, and CPU byteorder is irrelevant). 768c2ecf20Sopenharmony_ci * 778c2ecf20Sopenharmony_ci * They do _not_ update the port address. If you 788c2ecf20Sopenharmony_ci * want MMIO that copies stuff laid out in MMIO 798c2ecf20Sopenharmony_ci * memory across multiple ports, use "memcpy_toio()" 808c2ecf20Sopenharmony_ci * and friends. 818c2ecf20Sopenharmony_ci */ 828c2ecf20Sopenharmony_ciextern void ioread8_rep(const void __iomem *port, void *buf, unsigned long count); 838c2ecf20Sopenharmony_ciextern void ioread16_rep(const void __iomem *port, void *buf, unsigned long count); 848c2ecf20Sopenharmony_ciextern void ioread32_rep(const void __iomem *port, void *buf, unsigned long count); 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ciextern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count); 878c2ecf20Sopenharmony_ciextern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count); 888c2ecf20Sopenharmony_ciextern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count); 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ci#ifdef CONFIG_HAS_IOPORT_MAP 918c2ecf20Sopenharmony_ci/* Create a virtual mapping cookie for an IO port range */ 928c2ecf20Sopenharmony_ciextern void __iomem *ioport_map(unsigned long port, unsigned int nr); 938c2ecf20Sopenharmony_ciextern void ioport_unmap(void __iomem *); 948c2ecf20Sopenharmony_ci#endif 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci#ifndef ARCH_HAS_IOREMAP_WC 978c2ecf20Sopenharmony_ci#define ioremap_wc ioremap 988c2ecf20Sopenharmony_ci#endif 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci#ifndef ARCH_HAS_IOREMAP_WT 1018c2ecf20Sopenharmony_ci#define ioremap_wt ioremap 1028c2ecf20Sopenharmony_ci#endif 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci#ifdef CONFIG_PCI 1058c2ecf20Sopenharmony_ci/* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */ 1068c2ecf20Sopenharmony_cistruct pci_dev; 1078c2ecf20Sopenharmony_ciextern void pci_iounmap(struct pci_dev *dev, void __iomem *); 1088c2ecf20Sopenharmony_ci#elif defined(CONFIG_GENERIC_IOMAP) 1098c2ecf20Sopenharmony_cistruct pci_dev; 1108c2ecf20Sopenharmony_cistatic inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) 1118c2ecf20Sopenharmony_ci{ } 1128c2ecf20Sopenharmony_ci#endif 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci#include <asm-generic/pci_iomap.h> 1158c2ecf20Sopenharmony_ci 1168c2ecf20Sopenharmony_ci#endif 117