1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2/****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2020, Intel Corp. 7 * 8 *****************************************************************************/ 9 10#ifndef __ACTBL2_H__ 11#define __ACTBL2_H__ 12 13/******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22/* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 28#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 29#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 30#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 31#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 32#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 33#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 34#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 35#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 36#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 37#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 38#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 39#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 40#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 41#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 42#define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 43#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 44#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 45#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 46#define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 47 48/* 49 * All tables must be byte-packed to match the ACPI specification, since 50 * the tables are provided by the system BIOS. 51 */ 52#pragma pack(1) 53 54/* 55 * Note: C bitfields are not used for this reason: 56 * 57 * "Bitfields are great and easy to read, but unfortunately the C language 58 * does not specify the layout of bitfields in memory, which means they are 59 * essentially useless for dealing with packed data in on-disk formats or 60 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 61 * this decision was a design error in C. Ritchie could have picked an order 62 * and stuck with it." Norman Ramsey. 63 * See http://stackoverflow.com/a/1053662/41661 64 */ 65 66/******************************************************************************* 67 * 68 * IORT - IO Remapping Table 69 * 70 * Conforms to "IO Remapping Table System Software on ARM Platforms", 71 * Document number: ARM DEN 0049D, March 2018 72 * 73 ******************************************************************************/ 74 75struct acpi_table_iort { 76 struct acpi_table_header header; 77 u32 node_count; 78 u32 node_offset; 79 u32 reserved; 80}; 81 82/* 83 * IORT subtables 84 */ 85struct acpi_iort_node { 86 u8 type; 87 u16 length; 88 u8 revision; 89 u32 reserved; 90 u32 mapping_count; 91 u32 mapping_offset; 92 char node_data[1]; 93}; 94 95/* Values for subtable Type above */ 96 97enum acpi_iort_node_type { 98 ACPI_IORT_NODE_ITS_GROUP = 0x00, 99 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 100 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 101 ACPI_IORT_NODE_SMMU = 0x03, 102 ACPI_IORT_NODE_SMMU_V3 = 0x04, 103 ACPI_IORT_NODE_PMCG = 0x05 104}; 105 106struct acpi_iort_id_mapping { 107 u32 input_base; /* Lowest value in input range */ 108 u32 id_count; /* Number of IDs */ 109 u32 output_base; /* Lowest value in output range */ 110 u32 output_reference; /* A reference to the output node */ 111 u32 flags; 112}; 113 114/* Masks for Flags field above for IORT subtable */ 115 116#define ACPI_IORT_ID_SINGLE_MAPPING (1) 117 118struct acpi_iort_memory_access { 119 u32 cache_coherency; 120 u8 hints; 121 u16 reserved; 122 u8 memory_flags; 123}; 124 125/* Values for cache_coherency field above */ 126 127#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 128#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 129 130/* Masks for Hints field above */ 131 132#define ACPI_IORT_HT_TRANSIENT (1) 133#define ACPI_IORT_HT_WRITE (1<<1) 134#define ACPI_IORT_HT_READ (1<<2) 135#define ACPI_IORT_HT_OVERRIDE (1<<3) 136 137/* Masks for memory_flags field above */ 138 139#define ACPI_IORT_MF_COHERENCY (1) 140#define ACPI_IORT_MF_ATTRIBUTES (1<<1) 141 142/* 143 * IORT node specific subtables 144 */ 145struct acpi_iort_its_group { 146 u32 its_count; 147 u32 identifiers[1]; /* GIC ITS identifier array */ 148}; 149 150struct acpi_iort_named_component { 151 u32 node_flags; 152 u64 memory_properties; /* Memory access properties */ 153 u8 memory_address_limit; /* Memory address size limit */ 154 char device_name[1]; /* Path of namespace object */ 155}; 156 157/* Masks for Flags field above */ 158 159#define ACPI_IORT_NC_STALL_SUPPORTED (1) 160#define ACPI_IORT_NC_PASID_BITS (31<<1) 161 162struct acpi_iort_root_complex { 163 u64 memory_properties; /* Memory access properties */ 164 u32 ats_attribute; 165 u32 pci_segment_number; 166 u8 memory_address_limit; /* Memory address size limit */ 167 u8 reserved[3]; /* Reserved, must be zero */ 168}; 169 170/* Values for ats_attribute field above */ 171 172#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 173#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 174 175struct acpi_iort_smmu { 176 u64 base_address; /* SMMU base address */ 177 u64 span; /* Length of memory range */ 178 u32 model; 179 u32 flags; 180 u32 global_interrupt_offset; 181 u32 context_interrupt_count; 182 u32 context_interrupt_offset; 183 u32 pmu_interrupt_count; 184 u32 pmu_interrupt_offset; 185 u64 interrupts[1]; /* Interrupt array */ 186}; 187 188/* Values for Model field above */ 189 190#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 191#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 192#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 193#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 194#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 195#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 196 197/* Masks for Flags field above */ 198 199#define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 200#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 201 202/* Global interrupt format */ 203 204struct acpi_iort_smmu_gsi { 205 u32 nsg_irpt; 206 u32 nsg_irpt_flags; 207 u32 nsg_cfg_irpt; 208 u32 nsg_cfg_irpt_flags; 209}; 210 211struct acpi_iort_smmu_v3 { 212 u64 base_address; /* SMMUv3 base address */ 213 u32 flags; 214 u32 reserved; 215 u64 vatos_address; 216 u32 model; 217 u32 event_gsiv; 218 u32 pri_gsiv; 219 u32 gerr_gsiv; 220 u32 sync_gsiv; 221 u32 pxm; 222 u32 id_mapping_index; 223}; 224 225/* Values for Model field above */ 226 227#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 228#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 229#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 230 231/* Masks for Flags field above */ 232 233#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 234#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 235#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 236 237struct acpi_iort_pmcg { 238 u64 page0_base_address; 239 u32 overflow_gsiv; 240 u32 node_reference; 241 u64 page1_base_address; 242}; 243 244/******************************************************************************* 245 * 246 * IVRS - I/O Virtualization Reporting Structure 247 * Version 1 248 * 249 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 250 * Revision 1.26, February 2009. 251 * 252 ******************************************************************************/ 253 254struct acpi_table_ivrs { 255 struct acpi_table_header header; /* Common ACPI table header */ 256 u32 info; /* Common virtualization info */ 257 u64 reserved; 258}; 259 260/* Values for Info field above */ 261 262#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 263#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 264#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 265 266/* IVRS subtable header */ 267 268struct acpi_ivrs_header { 269 u8 type; /* Subtable type */ 270 u8 flags; 271 u16 length; /* Subtable length */ 272 u16 device_id; /* ID of IOMMU */ 273}; 274 275/* Values for subtable Type above */ 276 277enum acpi_ivrs_type { 278 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 279 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 280 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 281 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 282 ACPI_IVRS_TYPE_MEMORY3 = 0x22 283}; 284 285/* Masks for Flags field above for IVHD subtable */ 286 287#define ACPI_IVHD_TT_ENABLE (1) 288#define ACPI_IVHD_PASS_PW (1<<1) 289#define ACPI_IVHD_RES_PASS_PW (1<<2) 290#define ACPI_IVHD_ISOC (1<<3) 291#define ACPI_IVHD_IOTLB (1<<4) 292 293/* Masks for Flags field above for IVMD subtable */ 294 295#define ACPI_IVMD_UNITY (1) 296#define ACPI_IVMD_READ (1<<1) 297#define ACPI_IVMD_WRITE (1<<2) 298#define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 299 300/* 301 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 302 */ 303 304/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 305 306struct acpi_ivrs_hardware_10 { 307 struct acpi_ivrs_header header; 308 u16 capability_offset; /* Offset for IOMMU control fields */ 309 u64 base_address; /* IOMMU control registers */ 310 u16 pci_segment_group; 311 u16 info; /* MSI number and unit ID */ 312 u32 feature_reporting; 313}; 314 315/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 316 317struct acpi_ivrs_hardware_11 { 318 struct acpi_ivrs_header header; 319 u16 capability_offset; /* Offset for IOMMU control fields */ 320 u64 base_address; /* IOMMU control registers */ 321 u16 pci_segment_group; 322 u16 info; /* MSI number and unit ID */ 323 u32 attributes; 324 u64 efr_register_image; 325 u64 reserved; 326}; 327 328/* Masks for Info field above */ 329 330#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 331#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 332 333/* 334 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 335 * Upper two bits of the Type field are the (encoded) length of the structure. 336 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 337 * are reserved for future use but not defined. 338 */ 339struct acpi_ivrs_de_header { 340 u8 type; 341 u16 id; 342 u8 data_setting; 343}; 344 345/* Length of device entry is in the top two bits of Type field above */ 346 347#define ACPI_IVHD_ENTRY_LENGTH 0xC0 348 349/* Values for device entry Type field above */ 350 351enum acpi_ivrs_device_entry_type { 352 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 353 354 ACPI_IVRS_TYPE_PAD4 = 0, 355 ACPI_IVRS_TYPE_ALL = 1, 356 ACPI_IVRS_TYPE_SELECT = 2, 357 ACPI_IVRS_TYPE_START = 3, 358 ACPI_IVRS_TYPE_END = 4, 359 360 /* 8-byte device entries */ 361 362 ACPI_IVRS_TYPE_PAD8 = 64, 363 ACPI_IVRS_TYPE_NOT_USED = 65, 364 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 365 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 366 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 367 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 368 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */ 369}; 370 371/* Values for Data field above */ 372 373#define ACPI_IVHD_INIT_PASS (1) 374#define ACPI_IVHD_EINT_PASS (1<<1) 375#define ACPI_IVHD_NMI_PASS (1<<2) 376#define ACPI_IVHD_SYSTEM_MGMT (3<<4) 377#define ACPI_IVHD_LINT0_PASS (1<<6) 378#define ACPI_IVHD_LINT1_PASS (1<<7) 379 380/* Types 0-4: 4-byte device entry */ 381 382struct acpi_ivrs_device4 { 383 struct acpi_ivrs_de_header header; 384}; 385 386/* Types 66-67: 8-byte device entry */ 387 388struct acpi_ivrs_device8a { 389 struct acpi_ivrs_de_header header; 390 u8 reserved1; 391 u16 used_id; 392 u8 reserved2; 393}; 394 395/* Types 70-71: 8-byte device entry */ 396 397struct acpi_ivrs_device8b { 398 struct acpi_ivrs_de_header header; 399 u32 extended_data; 400}; 401 402/* Values for extended_data above */ 403 404#define ACPI_IVHD_ATS_DISABLED (1<<31) 405 406/* Type 72: 8-byte device entry */ 407 408struct acpi_ivrs_device8c { 409 struct acpi_ivrs_de_header header; 410 u8 handle; 411 u16 used_id; 412 u8 variety; 413}; 414 415/* Values for Variety field above */ 416 417#define ACPI_IVHD_IOAPIC 1 418#define ACPI_IVHD_HPET 2 419 420/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 421 422struct acpi_ivrs_memory { 423 struct acpi_ivrs_header header; 424 u16 aux_data; 425 u64 reserved; 426 u64 start_address; 427 u64 memory_length; 428}; 429 430/******************************************************************************* 431 * 432 * LPIT - Low Power Idle Table 433 * 434 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 435 * 436 ******************************************************************************/ 437 438struct acpi_table_lpit { 439 struct acpi_table_header header; /* Common ACPI table header */ 440}; 441 442/* LPIT subtable header */ 443 444struct acpi_lpit_header { 445 u32 type; /* Subtable type */ 446 u32 length; /* Subtable length */ 447 u16 unique_id; 448 u16 reserved; 449 u32 flags; 450}; 451 452/* Values for subtable Type above */ 453 454enum acpi_lpit_type { 455 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 456 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 457}; 458 459/* Masks for Flags field above */ 460 461#define ACPI_LPIT_STATE_DISABLED (1) 462#define ACPI_LPIT_NO_COUNTER (1<<1) 463 464/* 465 * LPIT subtables, correspond to Type in struct acpi_lpit_header 466 */ 467 468/* 0x00: Native C-state instruction based LPI structure */ 469 470struct acpi_lpit_native { 471 struct acpi_lpit_header header; 472 struct acpi_generic_address entry_trigger; 473 u32 residency; 474 u32 latency; 475 struct acpi_generic_address residency_counter; 476 u64 counter_frequency; 477}; 478 479/******************************************************************************* 480 * 481 * MADT - Multiple APIC Description Table 482 * Version 3 483 * 484 ******************************************************************************/ 485 486struct acpi_table_madt { 487 struct acpi_table_header header; /* Common ACPI table header */ 488 u32 address; /* Physical address of local APIC */ 489 u32 flags; 490}; 491 492/* Masks for Flags field above */ 493 494#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 495 496/* Values for PCATCompat flag */ 497 498#define ACPI_MADT_DUAL_PIC 1 499#define ACPI_MADT_MULTIPLE_APIC 0 500 501/* Values for MADT subtable type in struct acpi_subtable_header */ 502 503enum acpi_madt_type { 504 ACPI_MADT_TYPE_LOCAL_APIC = 0, 505 ACPI_MADT_TYPE_IO_APIC = 1, 506 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 507 ACPI_MADT_TYPE_NMI_SOURCE = 3, 508 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 509 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 510 ACPI_MADT_TYPE_IO_SAPIC = 6, 511 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 512 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 513 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 514 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 515 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 516 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 517 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 518 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 519 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 520 ACPI_MADT_TYPE_CORE_PIC = 17, 521 ACPI_MADT_TYPE_LIO_PIC = 18, 522 ACPI_MADT_TYPE_HT_PIC = 19, 523 ACPI_MADT_TYPE_EIO_PIC = 20, 524 ACPI_MADT_TYPE_MSI_PIC = 21, 525 ACPI_MADT_TYPE_BIO_PIC = 22, 526 ACPI_MADT_TYPE_LPC_PIC = 23, 527 ACPI_MADT_TYPE_RESERVED = 24 /* 24 and greater are reserved */ 528}; 529 530/* 531 * MADT Subtables, correspond to Type in struct acpi_subtable_header 532 */ 533 534/* 0: Processor Local APIC */ 535 536struct acpi_madt_local_apic { 537 struct acpi_subtable_header header; 538 u8 processor_id; /* ACPI processor id */ 539 u8 id; /* Processor's local APIC id */ 540 u32 lapic_flags; 541}; 542 543/* 1: IO APIC */ 544 545struct acpi_madt_io_apic { 546 struct acpi_subtable_header header; 547 u8 id; /* I/O APIC ID */ 548 u8 reserved; /* reserved - must be zero */ 549 u32 address; /* APIC physical address */ 550 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 551}; 552 553/* 2: Interrupt Override */ 554 555struct acpi_madt_interrupt_override { 556 struct acpi_subtable_header header; 557 u8 bus; /* 0 - ISA */ 558 u8 source_irq; /* Interrupt source (IRQ) */ 559 u32 global_irq; /* Global system interrupt */ 560 u16 inti_flags; 561}; 562 563/* 3: NMI Source */ 564 565struct acpi_madt_nmi_source { 566 struct acpi_subtable_header header; 567 u16 inti_flags; 568 u32 global_irq; /* Global system interrupt */ 569}; 570 571/* 4: Local APIC NMI */ 572 573struct acpi_madt_local_apic_nmi { 574 struct acpi_subtable_header header; 575 u8 processor_id; /* ACPI processor id */ 576 u16 inti_flags; 577 u8 lint; /* LINTn to which NMI is connected */ 578}; 579 580/* 5: Address Override */ 581 582struct acpi_madt_local_apic_override { 583 struct acpi_subtable_header header; 584 u16 reserved; /* Reserved, must be zero */ 585 u64 address; /* APIC physical address */ 586}; 587 588/* 6: I/O Sapic */ 589 590struct acpi_madt_io_sapic { 591 struct acpi_subtable_header header; 592 u8 id; /* I/O SAPIC ID */ 593 u8 reserved; /* Reserved, must be zero */ 594 u32 global_irq_base; /* Global interrupt for SAPIC start */ 595 u64 address; /* SAPIC physical address */ 596}; 597 598/* 7: Local Sapic */ 599 600struct acpi_madt_local_sapic { 601 struct acpi_subtable_header header; 602 u8 processor_id; /* ACPI processor id */ 603 u8 id; /* SAPIC ID */ 604 u8 eid; /* SAPIC EID */ 605 u8 reserved[3]; /* Reserved, must be zero */ 606 u32 lapic_flags; 607 u32 uid; /* Numeric UID - ACPI 3.0 */ 608 char uid_string[1]; /* String UID - ACPI 3.0 */ 609}; 610 611/* 8: Platform Interrupt Source */ 612 613struct acpi_madt_interrupt_source { 614 struct acpi_subtable_header header; 615 u16 inti_flags; 616 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 617 u8 id; /* Processor ID */ 618 u8 eid; /* Processor EID */ 619 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 620 u32 global_irq; /* Global system interrupt */ 621 u32 flags; /* Interrupt Source Flags */ 622}; 623 624/* Masks for Flags field above */ 625 626#define ACPI_MADT_CPEI_OVERRIDE (1) 627 628/* 9: Processor Local X2APIC (ACPI 4.0) */ 629 630struct acpi_madt_local_x2apic { 631 struct acpi_subtable_header header; 632 u16 reserved; /* reserved - must be zero */ 633 u32 local_apic_id; /* Processor x2APIC ID */ 634 u32 lapic_flags; 635 u32 uid; /* ACPI processor UID */ 636}; 637 638/* 10: Local X2APIC NMI (ACPI 4.0) */ 639 640struct acpi_madt_local_x2apic_nmi { 641 struct acpi_subtable_header header; 642 u16 inti_flags; 643 u32 uid; /* ACPI processor UID */ 644 u8 lint; /* LINTn to which NMI is connected */ 645 u8 reserved[3]; /* reserved - must be zero */ 646}; 647 648/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 649 650struct acpi_madt_generic_interrupt { 651 struct acpi_subtable_header header; 652 u16 reserved; /* reserved - must be zero */ 653 u32 cpu_interface_number; 654 u32 uid; 655 u32 flags; 656 u32 parking_version; 657 u32 performance_interrupt; 658 u64 parked_address; 659 u64 base_address; 660 u64 gicv_base_address; 661 u64 gich_base_address; 662 u32 vgic_interrupt; 663 u64 gicr_base_address; 664 u64 arm_mpidr; 665 u8 efficiency_class; 666 u8 reserved2[1]; 667 u16 spe_interrupt; /* ACPI 6.3 */ 668}; 669 670/* Masks for Flags field above */ 671 672/* ACPI_MADT_ENABLED (1) Processor is usable if set */ 673#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 674#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 675 676/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 677 678struct acpi_madt_generic_distributor { 679 struct acpi_subtable_header header; 680 u16 reserved; /* reserved - must be zero */ 681 u32 gic_id; 682 u64 base_address; 683 u32 global_irq_base; 684 u8 version; 685 u8 reserved2[3]; /* reserved - must be zero */ 686}; 687 688/* Values for Version field above */ 689 690enum acpi_madt_gic_version { 691 ACPI_MADT_GIC_VERSION_NONE = 0, 692 ACPI_MADT_GIC_VERSION_V1 = 1, 693 ACPI_MADT_GIC_VERSION_V2 = 2, 694 ACPI_MADT_GIC_VERSION_V3 = 3, 695 ACPI_MADT_GIC_VERSION_V4 = 4, 696 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 697}; 698 699/* 13: Generic MSI Frame (ACPI 5.1) */ 700 701struct acpi_madt_generic_msi_frame { 702 struct acpi_subtable_header header; 703 u16 reserved; /* reserved - must be zero */ 704 u32 msi_frame_id; 705 u64 base_address; 706 u32 flags; 707 u16 spi_count; 708 u16 spi_base; 709}; 710 711/* Masks for Flags field above */ 712 713#define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 714 715/* 14: Generic Redistributor (ACPI 5.1) */ 716 717struct acpi_madt_generic_redistributor { 718 struct acpi_subtable_header header; 719 u16 reserved; /* reserved - must be zero */ 720 u64 base_address; 721 u32 length; 722}; 723 724/* 15: Generic Translator (ACPI 6.0) */ 725 726struct acpi_madt_generic_translator { 727 struct acpi_subtable_header header; 728 u16 reserved; /* reserved - must be zero */ 729 u32 translation_id; 730 u64 base_address; 731 u32 reserved2; 732}; 733 734/* Values for Version field above */ 735 736enum acpi_madt_core_pic_version { 737 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 738 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 739 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 740}; 741 742enum acpi_madt_lio_pic_version { 743 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 744 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 745 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 746}; 747 748enum acpi_madt_eio_pic_version { 749 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 750 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 751 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 752}; 753 754enum acpi_madt_ht_pic_version { 755 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 756 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 757 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 758}; 759 760enum acpi_madt_bio_pic_version { 761 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 762 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 763 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 764}; 765 766enum acpi_madt_msi_pic_version { 767 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 768 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 769 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 770}; 771 772enum acpi_madt_lpc_pic_version { 773 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 774 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 775 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 776}; 777 778/* Core Interrupt Controller */ 779 780struct acpi_madt_core_pic { 781 struct acpi_subtable_header header; 782 u8 version; 783 u32 processor_id; 784 u32 core_id; 785 u32 flags; 786}; 787 788/* Legacy I/O Interrupt Controller */ 789 790struct acpi_madt_lio_pic { 791 struct acpi_subtable_header header; 792 u8 version; 793 u64 address; 794 u16 size; 795 u8 cascade[2]; 796 u32 cascade_map[2]; 797}; 798 799/* Extend I/O Interrupt Controller */ 800 801struct acpi_madt_eio_pic { 802 struct acpi_subtable_header header; 803 u8 version; 804 u8 cascade; 805 u8 node; 806 u64 node_map; 807}; 808 809/* HT Interrupt Controller */ 810 811struct acpi_madt_ht_pic { 812 struct acpi_subtable_header header; 813 u8 version; 814 u64 address; 815 u16 size; 816 u8 cascade[8]; 817}; 818 819/* Bridge I/O Interrupt Controller */ 820 821struct acpi_madt_bio_pic { 822 struct acpi_subtable_header header; 823 u8 version; 824 u64 address; 825 u16 size; 826 u16 id; 827 u16 gsi_base; 828}; 829 830/* MSI Interrupt Controller */ 831 832struct acpi_madt_msi_pic { 833 struct acpi_subtable_header header; 834 u8 version; 835 u64 msg_address; 836 u32 start; 837 u32 count; 838}; 839 840/* LPC Interrupt Controller */ 841 842struct acpi_madt_lpc_pic { 843 struct acpi_subtable_header header; 844 u8 version; 845 u64 address; 846 u16 size; 847 u8 cascade; 848}; 849 850/* 851 * Common flags fields for MADT subtables 852 */ 853 854/* MADT Local APIC flags */ 855 856#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 857 858/* MADT MPS INTI flags (inti_flags) */ 859 860#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 861#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 862 863/* Values for MPS INTI flags */ 864 865#define ACPI_MADT_POLARITY_CONFORMS 0 866#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 867#define ACPI_MADT_POLARITY_RESERVED 2 868#define ACPI_MADT_POLARITY_ACTIVE_LOW 3 869 870#define ACPI_MADT_TRIGGER_CONFORMS (0) 871#define ACPI_MADT_TRIGGER_EDGE (1<<2) 872#define ACPI_MADT_TRIGGER_RESERVED (2<<2) 873#define ACPI_MADT_TRIGGER_LEVEL (3<<2) 874 875/******************************************************************************* 876 * 877 * MCFG - PCI Memory Mapped Configuration table and subtable 878 * Version 1 879 * 880 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 881 * 882 ******************************************************************************/ 883 884struct acpi_table_mcfg { 885 struct acpi_table_header header; /* Common ACPI table header */ 886 u8 reserved[8]; 887}; 888 889/* Subtable */ 890 891struct acpi_mcfg_allocation { 892 u64 address; /* Base address, processor-relative */ 893 u16 pci_segment; /* PCI segment group number */ 894 u8 start_bus_number; /* Starting PCI Bus number */ 895 u8 end_bus_number; /* Final PCI Bus number */ 896 u32 reserved; 897}; 898 899/******************************************************************************* 900 * 901 * MCHI - Management Controller Host Interface Table 902 * Version 1 903 * 904 * Conforms to "Management Component Transport Protocol (MCTP) Host 905 * Interface Specification", Revision 1.0.0a, October 13, 2009 906 * 907 ******************************************************************************/ 908 909struct acpi_table_mchi { 910 struct acpi_table_header header; /* Common ACPI table header */ 911 u8 interface_type; 912 u8 protocol; 913 u64 protocol_data; 914 u8 interrupt_type; 915 u8 gpe; 916 u8 pci_device_flag; 917 u32 global_interrupt; 918 struct acpi_generic_address control_register; 919 u8 pci_segment; 920 u8 pci_bus; 921 u8 pci_device; 922 u8 pci_function; 923}; 924 925/******************************************************************************* 926 * 927 * MPST - Memory Power State Table (ACPI 5.0) 928 * Version 1 929 * 930 ******************************************************************************/ 931 932#define ACPI_MPST_CHANNEL_INFO \ 933 u8 channel_id; \ 934 u8 reserved1[3]; \ 935 u16 power_node_count; \ 936 u16 reserved2; 937 938/* Main table */ 939 940struct acpi_table_mpst { 941 struct acpi_table_header header; /* Common ACPI table header */ 942 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 943}; 944 945/* Memory Platform Communication Channel Info */ 946 947struct acpi_mpst_channel { 948 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 949}; 950 951/* Memory Power Node Structure */ 952 953struct acpi_mpst_power_node { 954 u8 flags; 955 u8 reserved1; 956 u16 node_id; 957 u32 length; 958 u64 range_address; 959 u64 range_length; 960 u32 num_power_states; 961 u32 num_physical_components; 962}; 963 964/* Values for Flags field above */ 965 966#define ACPI_MPST_ENABLED 1 967#define ACPI_MPST_POWER_MANAGED 2 968#define ACPI_MPST_HOT_PLUG_CAPABLE 4 969 970/* Memory Power State Structure (follows POWER_NODE above) */ 971 972struct acpi_mpst_power_state { 973 u8 power_state; 974 u8 info_index; 975}; 976 977/* Physical Component ID Structure (follows POWER_STATE above) */ 978 979struct acpi_mpst_component { 980 u16 component_id; 981}; 982 983/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 984 985struct acpi_mpst_data_hdr { 986 u16 characteristics_count; 987 u16 reserved; 988}; 989 990struct acpi_mpst_power_data { 991 u8 structure_id; 992 u8 flags; 993 u16 reserved1; 994 u32 average_power; 995 u32 power_saving; 996 u64 exit_latency; 997 u64 reserved2; 998}; 999 1000/* Values for Flags field above */ 1001 1002#define ACPI_MPST_PRESERVE 1 1003#define ACPI_MPST_AUTOENTRY 2 1004#define ACPI_MPST_AUTOEXIT 4 1005 1006/* Shared Memory Region (not part of an ACPI table) */ 1007 1008struct acpi_mpst_shared { 1009 u32 signature; 1010 u16 pcc_command; 1011 u16 pcc_status; 1012 u32 command_register; 1013 u32 status_register; 1014 u32 power_state_id; 1015 u32 power_node_id; 1016 u64 energy_consumed; 1017 u64 average_power; 1018}; 1019 1020/******************************************************************************* 1021 * 1022 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1023 * Version 1 1024 * 1025 ******************************************************************************/ 1026 1027struct acpi_table_msct { 1028 struct acpi_table_header header; /* Common ACPI table header */ 1029 u32 proximity_offset; /* Location of proximity info struct(s) */ 1030 u32 max_proximity_domains; /* Max number of proximity domains */ 1031 u32 max_clock_domains; /* Max number of clock domains */ 1032 u64 max_address; /* Max physical address in system */ 1033}; 1034 1035/* subtable - Maximum Proximity Domain Information. Version 1 */ 1036 1037struct acpi_msct_proximity { 1038 u8 revision; 1039 u8 length; 1040 u32 range_start; /* Start of domain range */ 1041 u32 range_end; /* End of domain range */ 1042 u32 processor_capacity; 1043 u64 memory_capacity; /* In bytes */ 1044}; 1045 1046/******************************************************************************* 1047 * 1048 * MSDM - Microsoft Data Management table 1049 * 1050 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1051 * November 29, 2011. Copyright 2011 Microsoft 1052 * 1053 ******************************************************************************/ 1054 1055/* Basic MSDM table is only the common ACPI header */ 1056 1057struct acpi_table_msdm { 1058 struct acpi_table_header header; /* Common ACPI table header */ 1059}; 1060 1061/******************************************************************************* 1062 * 1063 * MTMR - MID Timer Table 1064 * Version 1 1065 * 1066 * Conforms to "Simple Firmware Interface Specification", 1067 * Draft 0.8.2, Oct 19, 2010 1068 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table. 1069 * 1070 ******************************************************************************/ 1071 1072struct acpi_table_mtmr { 1073 struct acpi_table_header header; /* Common ACPI table header */ 1074}; 1075 1076/* MTMR entry */ 1077 1078struct acpi_mtmr_entry { 1079 struct acpi_generic_address physical_address; 1080 u32 frequency; 1081 u32 irq; 1082}; 1083 1084/******************************************************************************* 1085 * 1086 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1087 * Version 1 1088 * 1089 ******************************************************************************/ 1090 1091struct acpi_table_nfit { 1092 struct acpi_table_header header; /* Common ACPI table header */ 1093 u32 reserved; /* Reserved, must be zero */ 1094}; 1095 1096/* Subtable header for NFIT */ 1097 1098struct acpi_nfit_header { 1099 u16 type; 1100 u16 length; 1101}; 1102 1103/* Values for subtable type in struct acpi_nfit_header */ 1104 1105enum acpi_nfit_type { 1106 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1107 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1108 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1109 ACPI_NFIT_TYPE_SMBIOS = 3, 1110 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1111 ACPI_NFIT_TYPE_DATA_REGION = 5, 1112 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1113 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1114 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1115}; 1116 1117/* 1118 * NFIT Subtables 1119 */ 1120 1121/* 0: System Physical Address Range Structure */ 1122 1123struct acpi_nfit_system_address { 1124 struct acpi_nfit_header header; 1125 u16 range_index; 1126 u16 flags; 1127 u32 reserved; /* Reserved, must be zero */ 1128 u32 proximity_domain; 1129 u8 range_guid[16]; 1130 u64 address; 1131 u64 length; 1132 u64 memory_mapping; 1133}; 1134 1135/* Flags */ 1136 1137#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1138#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1139 1140/* Range Type GUIDs appear in the include/acuuid.h file */ 1141 1142/* 1: Memory Device to System Address Range Map Structure */ 1143 1144struct acpi_nfit_memory_map { 1145 struct acpi_nfit_header header; 1146 u32 device_handle; 1147 u16 physical_id; 1148 u16 region_id; 1149 u16 range_index; 1150 u16 region_index; 1151 u64 region_size; 1152 u64 region_offset; 1153 u64 address; 1154 u16 interleave_index; 1155 u16 interleave_ways; 1156 u16 flags; 1157 u16 reserved; /* Reserved, must be zero */ 1158}; 1159 1160/* Flags */ 1161 1162#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1163#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1164#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1165#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1166#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1167#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1168#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1169 1170/* 2: Interleave Structure */ 1171 1172struct acpi_nfit_interleave { 1173 struct acpi_nfit_header header; 1174 u16 interleave_index; 1175 u16 reserved; /* Reserved, must be zero */ 1176 u32 line_count; 1177 u32 line_size; 1178 u32 line_offset[1]; /* Variable length */ 1179}; 1180 1181/* 3: SMBIOS Management Information Structure */ 1182 1183struct acpi_nfit_smbios { 1184 struct acpi_nfit_header header; 1185 u32 reserved; /* Reserved, must be zero */ 1186 u8 data[1]; /* Variable length */ 1187}; 1188 1189/* 4: NVDIMM Control Region Structure */ 1190 1191struct acpi_nfit_control_region { 1192 struct acpi_nfit_header header; 1193 u16 region_index; 1194 u16 vendor_id; 1195 u16 device_id; 1196 u16 revision_id; 1197 u16 subsystem_vendor_id; 1198 u16 subsystem_device_id; 1199 u16 subsystem_revision_id; 1200 u8 valid_fields; 1201 u8 manufacturing_location; 1202 u16 manufacturing_date; 1203 u8 reserved[2]; /* Reserved, must be zero */ 1204 u32 serial_number; 1205 u16 code; 1206 u16 windows; 1207 u64 window_size; 1208 u64 command_offset; 1209 u64 command_size; 1210 u64 status_offset; 1211 u64 status_size; 1212 u16 flags; 1213 u8 reserved1[6]; /* Reserved, must be zero */ 1214}; 1215 1216/* Flags */ 1217 1218#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1219 1220/* valid_fields bits */ 1221 1222#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1223 1224/* 5: NVDIMM Block Data Window Region Structure */ 1225 1226struct acpi_nfit_data_region { 1227 struct acpi_nfit_header header; 1228 u16 region_index; 1229 u16 windows; 1230 u64 offset; 1231 u64 size; 1232 u64 capacity; 1233 u64 start_address; 1234}; 1235 1236/* 6: Flush Hint Address Structure */ 1237 1238struct acpi_nfit_flush_address { 1239 struct acpi_nfit_header header; 1240 u32 device_handle; 1241 u16 hint_count; 1242 u8 reserved[6]; /* Reserved, must be zero */ 1243 u64 hint_address[1]; /* Variable length */ 1244}; 1245 1246/* 7: Platform Capabilities Structure */ 1247 1248struct acpi_nfit_capabilities { 1249 struct acpi_nfit_header header; 1250 u8 highest_capability; 1251 u8 reserved[3]; /* Reserved, must be zero */ 1252 u32 capabilities; 1253 u32 reserved2; 1254}; 1255 1256/* Capabilities Flags */ 1257 1258#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1259#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1260#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1261 1262/* 1263 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1264 */ 1265struct nfit_device_handle { 1266 u32 handle; 1267}; 1268 1269/* Device handle construction and extraction macros */ 1270 1271#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1272#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1273#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1274#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1275#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1276 1277#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1278#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1279#define ACPI_NFIT_MEMORY_ID_OFFSET 8 1280#define ACPI_NFIT_SOCKET_ID_OFFSET 12 1281#define ACPI_NFIT_NODE_ID_OFFSET 16 1282 1283/* Macro to construct a NFIT/NVDIMM device handle */ 1284 1285#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1286 ((dimm) | \ 1287 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1288 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1289 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1290 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1291 1292/* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1293 1294#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1295 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1296 1297#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1298 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1299 1300#define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1301 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1302 1303#define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1304 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1305 1306#define ACPI_NFIT_GET_NODE_ID(handle) \ 1307 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1308 1309/******************************************************************************* 1310 * 1311 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1312 * Version 2 (ACPI 6.2) 1313 * 1314 ******************************************************************************/ 1315 1316struct acpi_table_pcct { 1317 struct acpi_table_header header; /* Common ACPI table header */ 1318 u32 flags; 1319 u64 reserved; 1320}; 1321 1322/* Values for Flags field above */ 1323 1324#define ACPI_PCCT_DOORBELL 1 1325 1326/* Values for subtable type in struct acpi_subtable_header */ 1327 1328enum acpi_pcct_type { 1329 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1330 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1331 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1332 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1333 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1334 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1335}; 1336 1337/* 1338 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1339 */ 1340 1341/* 0: Generic Communications Subspace */ 1342 1343struct acpi_pcct_subspace { 1344 struct acpi_subtable_header header; 1345 u8 reserved[6]; 1346 u64 base_address; 1347 u64 length; 1348 struct acpi_generic_address doorbell_register; 1349 u64 preserve_mask; 1350 u64 write_mask; 1351 u32 latency; 1352 u32 max_access_rate; 1353 u16 min_turnaround_time; 1354}; 1355 1356/* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1357 1358struct acpi_pcct_hw_reduced { 1359 struct acpi_subtable_header header; 1360 u32 platform_interrupt; 1361 u8 flags; 1362 u8 reserved; 1363 u64 base_address; 1364 u64 length; 1365 struct acpi_generic_address doorbell_register; 1366 u64 preserve_mask; 1367 u64 write_mask; 1368 u32 latency; 1369 u32 max_access_rate; 1370 u16 min_turnaround_time; 1371}; 1372 1373/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1374 1375struct acpi_pcct_hw_reduced_type2 { 1376 struct acpi_subtable_header header; 1377 u32 platform_interrupt; 1378 u8 flags; 1379 u8 reserved; 1380 u64 base_address; 1381 u64 length; 1382 struct acpi_generic_address doorbell_register; 1383 u64 preserve_mask; 1384 u64 write_mask; 1385 u32 latency; 1386 u32 max_access_rate; 1387 u16 min_turnaround_time; 1388 struct acpi_generic_address platform_ack_register; 1389 u64 ack_preserve_mask; 1390 u64 ack_write_mask; 1391}; 1392 1393/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1394 1395struct acpi_pcct_ext_pcc_master { 1396 struct acpi_subtable_header header; 1397 u32 platform_interrupt; 1398 u8 flags; 1399 u8 reserved1; 1400 u64 base_address; 1401 u32 length; 1402 struct acpi_generic_address doorbell_register; 1403 u64 preserve_mask; 1404 u64 write_mask; 1405 u32 latency; 1406 u32 max_access_rate; 1407 u32 min_turnaround_time; 1408 struct acpi_generic_address platform_ack_register; 1409 u64 ack_preserve_mask; 1410 u64 ack_set_mask; 1411 u64 reserved2; 1412 struct acpi_generic_address cmd_complete_register; 1413 u64 cmd_complete_mask; 1414 struct acpi_generic_address cmd_update_register; 1415 u64 cmd_update_preserve_mask; 1416 u64 cmd_update_set_mask; 1417 struct acpi_generic_address error_status_register; 1418 u64 error_status_mask; 1419}; 1420 1421/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1422 1423struct acpi_pcct_ext_pcc_slave { 1424 struct acpi_subtable_header header; 1425 u32 platform_interrupt; 1426 u8 flags; 1427 u8 reserved1; 1428 u64 base_address; 1429 u32 length; 1430 struct acpi_generic_address doorbell_register; 1431 u64 preserve_mask; 1432 u64 write_mask; 1433 u32 latency; 1434 u32 max_access_rate; 1435 u32 min_turnaround_time; 1436 struct acpi_generic_address platform_ack_register; 1437 u64 ack_preserve_mask; 1438 u64 ack_set_mask; 1439 u64 reserved2; 1440 struct acpi_generic_address cmd_complete_register; 1441 u64 cmd_complete_mask; 1442 struct acpi_generic_address cmd_update_register; 1443 u64 cmd_update_preserve_mask; 1444 u64 cmd_update_set_mask; 1445 struct acpi_generic_address error_status_register; 1446 u64 error_status_mask; 1447}; 1448 1449/* Values for doorbell flags above */ 1450 1451#define ACPI_PCCT_INTERRUPT_POLARITY (1) 1452#define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1453 1454/* 1455 * PCC memory structures (not part of the ACPI table) 1456 */ 1457 1458/* Shared Memory Region */ 1459 1460struct acpi_pcct_shared_memory { 1461 u32 signature; 1462 u16 command; 1463 u16 status; 1464}; 1465 1466/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1467 1468struct acpi_pcct_ext_pcc_shared_memory { 1469 u32 signature; 1470 u32 flags; 1471 u32 length; 1472 u32 command; 1473}; 1474 1475/******************************************************************************* 1476 * 1477 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1478 * Version 0 1479 * 1480 ******************************************************************************/ 1481 1482struct acpi_table_pdtt { 1483 struct acpi_table_header header; /* Common ACPI table header */ 1484 u8 trigger_count; 1485 u8 reserved[3]; 1486 u32 array_offset; 1487}; 1488 1489/* 1490 * PDTT Communication Channel Identifier Structure. 1491 * The number of these structures is defined by trigger_count above, 1492 * starting at array_offset. 1493 */ 1494struct acpi_pdtt_channel { 1495 u8 subchannel_id; 1496 u8 flags; 1497}; 1498 1499/* Flags for above */ 1500 1501#define ACPI_PDTT_RUNTIME_TRIGGER (1) 1502#define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1503#define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1504 1505/******************************************************************************* 1506 * 1507 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1508 * Version 1 1509 * 1510 ******************************************************************************/ 1511 1512struct acpi_table_pmtt { 1513 struct acpi_table_header header; /* Common ACPI table header */ 1514 u32 reserved; 1515}; 1516 1517/* Common header for PMTT subtables that follow main table */ 1518 1519struct acpi_pmtt_header { 1520 u8 type; 1521 u8 reserved1; 1522 u16 length; 1523 u16 flags; 1524 u16 reserved2; 1525}; 1526 1527/* Values for Type field above */ 1528 1529#define ACPI_PMTT_TYPE_SOCKET 0 1530#define ACPI_PMTT_TYPE_CONTROLLER 1 1531#define ACPI_PMTT_TYPE_DIMM 2 1532#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1533 1534/* Values for Flags field above */ 1535 1536#define ACPI_PMTT_TOP_LEVEL 0x0001 1537#define ACPI_PMTT_PHYSICAL 0x0002 1538#define ACPI_PMTT_MEMORY_TYPE 0x000C 1539 1540/* 1541 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 1542 */ 1543 1544/* 0: Socket Structure */ 1545 1546struct acpi_pmtt_socket { 1547 struct acpi_pmtt_header header; 1548 u16 socket_id; 1549 u16 reserved; 1550}; 1551 1552/* 1: Memory Controller subtable */ 1553 1554struct acpi_pmtt_controller { 1555 struct acpi_pmtt_header header; 1556 u32 read_latency; 1557 u32 write_latency; 1558 u32 read_bandwidth; 1559 u32 write_bandwidth; 1560 u16 access_width; 1561 u16 alignment; 1562 u16 reserved; 1563 u16 domain_count; 1564}; 1565 1566/* 1a: Proximity Domain substructure */ 1567 1568struct acpi_pmtt_domain { 1569 u32 proximity_domain; 1570}; 1571 1572/* 2: Physical Component Identifier (DIMM) */ 1573 1574struct acpi_pmtt_physical_component { 1575 struct acpi_pmtt_header header; 1576 u16 component_id; 1577 u16 reserved; 1578 u32 memory_size; 1579 u32 bios_handle; 1580}; 1581 1582/******************************************************************************* 1583 * 1584 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1585 * Version 1 1586 * 1587 ******************************************************************************/ 1588 1589struct acpi_table_pptt { 1590 struct acpi_table_header header; /* Common ACPI table header */ 1591}; 1592 1593/* Values for Type field above */ 1594 1595enum acpi_pptt_type { 1596 ACPI_PPTT_TYPE_PROCESSOR = 0, 1597 ACPI_PPTT_TYPE_CACHE = 1, 1598 ACPI_PPTT_TYPE_ID = 2, 1599 ACPI_PPTT_TYPE_RESERVED = 3 1600}; 1601 1602/* 0: Processor Hierarchy Node Structure */ 1603 1604struct acpi_pptt_processor { 1605 struct acpi_subtable_header header; 1606 u16 reserved; 1607 u32 flags; 1608 u32 parent; 1609 u32 acpi_processor_id; 1610 u32 number_of_priv_resources; 1611}; 1612 1613/* Flags */ 1614 1615#define ACPI_PPTT_PHYSICAL_PACKAGE (1) 1616#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 1617#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 1618#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 1619#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 1620 1621/* 1: Cache Type Structure */ 1622 1623struct acpi_pptt_cache { 1624 struct acpi_subtable_header header; 1625 u16 reserved; 1626 u32 flags; 1627 u32 next_level_of_cache; 1628 u32 size; 1629 u32 number_of_sets; 1630 u8 associativity; 1631 u8 attributes; 1632 u16 line_size; 1633}; 1634 1635/* Flags */ 1636 1637#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1638#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1639#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1640#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1641#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1642#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1643#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1644 1645/* Masks for Attributes */ 1646 1647#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1648#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1649#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1650 1651/* Attributes describing cache */ 1652#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1653#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1654#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1655#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1656 1657#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1658#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1659#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1660#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1661 1662#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1663#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1664 1665/* 2: ID Structure */ 1666 1667struct acpi_pptt_id { 1668 struct acpi_subtable_header header; 1669 u16 reserved; 1670 u32 vendor_id; 1671 u64 level1_id; 1672 u64 level2_id; 1673 u16 major_rev; 1674 u16 minor_rev; 1675 u16 spin_rev; 1676}; 1677 1678/******************************************************************************* 1679 * 1680 * RASF - RAS Feature Table (ACPI 5.0) 1681 * Version 1 1682 * 1683 ******************************************************************************/ 1684 1685struct acpi_table_rasf { 1686 struct acpi_table_header header; /* Common ACPI table header */ 1687 u8 channel_id[12]; 1688}; 1689 1690/* RASF Platform Communication Channel Shared Memory Region */ 1691 1692struct acpi_rasf_shared_memory { 1693 u32 signature; 1694 u16 command; 1695 u16 status; 1696 u16 version; 1697 u8 capabilities[16]; 1698 u8 set_capabilities[16]; 1699 u16 num_parameter_blocks; 1700 u32 set_capabilities_status; 1701}; 1702 1703/* RASF Parameter Block Structure Header */ 1704 1705struct acpi_rasf_parameter_block { 1706 u16 type; 1707 u16 version; 1708 u16 length; 1709}; 1710 1711/* RASF Parameter Block Structure for PATROL_SCRUB */ 1712 1713struct acpi_rasf_patrol_scrub_parameter { 1714 struct acpi_rasf_parameter_block header; 1715 u16 patrol_scrub_command; 1716 u64 requested_address_range[2]; 1717 u64 actual_address_range[2]; 1718 u16 flags; 1719 u8 requested_speed; 1720}; 1721 1722/* Masks for Flags and Speed fields above */ 1723 1724#define ACPI_RASF_SCRUBBER_RUNNING 1 1725#define ACPI_RASF_SPEED (7<<1) 1726#define ACPI_RASF_SPEED_SLOW (0<<1) 1727#define ACPI_RASF_SPEED_MEDIUM (4<<1) 1728#define ACPI_RASF_SPEED_FAST (7<<1) 1729 1730/* Channel Commands */ 1731 1732enum acpi_rasf_commands { 1733 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 1734}; 1735 1736/* Platform RAS Capabilities */ 1737 1738enum acpi_rasf_capabiliities { 1739 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 1740 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 1741}; 1742 1743/* Patrol Scrub Commands */ 1744 1745enum acpi_rasf_patrol_scrub_commands { 1746 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 1747 ACPI_RASF_START_PATROL_SCRUBBER = 2, 1748 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 1749}; 1750 1751/* Channel Command flags */ 1752 1753#define ACPI_RASF_GENERATE_SCI (1<<15) 1754 1755/* Status values */ 1756 1757enum acpi_rasf_status { 1758 ACPI_RASF_SUCCESS = 0, 1759 ACPI_RASF_NOT_VALID = 1, 1760 ACPI_RASF_NOT_SUPPORTED = 2, 1761 ACPI_RASF_BUSY = 3, 1762 ACPI_RASF_FAILED = 4, 1763 ACPI_RASF_ABORTED = 5, 1764 ACPI_RASF_INVALID_DATA = 6 1765}; 1766 1767/* Status flags */ 1768 1769#define ACPI_RASF_COMMAND_COMPLETE (1) 1770#define ACPI_RASF_SCI_DOORBELL (1<<1) 1771#define ACPI_RASF_ERROR (1<<2) 1772#define ACPI_RASF_STATUS (0x1F<<3) 1773 1774/******************************************************************************* 1775 * 1776 * SBST - Smart Battery Specification Table 1777 * Version 1 1778 * 1779 ******************************************************************************/ 1780 1781struct acpi_table_sbst { 1782 struct acpi_table_header header; /* Common ACPI table header */ 1783 u32 warning_level; 1784 u32 low_level; 1785 u32 critical_level; 1786}; 1787 1788/******************************************************************************* 1789 * 1790 * SDEI - Software Delegated Exception Interface Descriptor Table 1791 * 1792 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 1793 * May 8th, 2017. Copyright 2017 ARM Ltd. 1794 * 1795 ******************************************************************************/ 1796 1797struct acpi_table_sdei { 1798 struct acpi_table_header header; /* Common ACPI table header */ 1799}; 1800 1801/******************************************************************************* 1802 * 1803 * SDEV - Secure Devices Table (ACPI 6.2) 1804 * Version 1 1805 * 1806 ******************************************************************************/ 1807 1808struct acpi_table_sdev { 1809 struct acpi_table_header header; /* Common ACPI table header */ 1810}; 1811 1812struct acpi_sdev_header { 1813 u8 type; 1814 u8 flags; 1815 u16 length; 1816}; 1817 1818/* Values for subtable type above */ 1819 1820enum acpi_sdev_type { 1821 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 1822 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 1823 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1824}; 1825 1826/* Values for flags above */ 1827 1828#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 1829 1830/* 1831 * SDEV subtables 1832 */ 1833 1834/* 0: Namespace Device Based Secure Device Structure */ 1835 1836struct acpi_sdev_namespace { 1837 struct acpi_sdev_header header; 1838 u16 device_id_offset; 1839 u16 device_id_length; 1840 u16 vendor_data_offset; 1841 u16 vendor_data_length; 1842}; 1843 1844/* 1: PCIe Endpoint Device Based Device Structure */ 1845 1846struct acpi_sdev_pcie { 1847 struct acpi_sdev_header header; 1848 u16 segment; 1849 u16 start_bus; 1850 u16 path_offset; 1851 u16 path_length; 1852 u16 vendor_data_offset; 1853 u16 vendor_data_length; 1854}; 1855 1856/* 1a: PCIe Endpoint path entry */ 1857 1858struct acpi_sdev_pcie_path { 1859 u8 device; 1860 u8 function; 1861}; 1862 1863/* Reset to default packing */ 1864 1865#pragma pack() 1866 1867#endif /* __ACTBL2_H__ */ 1868