1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Watchdog driver for the K3 RTI module
4 *
5 * (c) Copyright 2019-2020 Texas Instruments Inc.
6 * All rights reserved.
7 */
8
9#include <linux/clk.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/io.h>
13#include <linux/kernel.h>
14#include <linux/mod_devicetable.h>
15#include <linux/module.h>
16#include <linux/moduleparam.h>
17#include <linux/platform_device.h>
18#include <linux/pm_runtime.h>
19#include <linux/types.h>
20#include <linux/watchdog.h>
21
22#define DEFAULT_HEARTBEAT 60
23
24/* Max heartbeat is calculated at 32kHz source clock */
25#define MAX_HEARTBEAT	1000
26
27/* Timer register set definition */
28#define RTIDWDCTRL	0x90
29#define RTIDWDPRLD	0x94
30#define RTIWDSTATUS	0x98
31#define RTIWDKEY	0x9c
32#define RTIDWDCNTR	0xa0
33#define RTIWWDRXCTRL	0xa4
34#define RTIWWDSIZECTRL	0xa8
35
36#define RTIWWDRX_NMI	0xa
37
38#define RTIWWDSIZE_50P		0x50
39#define RTIWWDSIZE_25P		0x500
40#define RTIWWDSIZE_12P5		0x5000
41#define RTIWWDSIZE_6P25		0x50000
42#define RTIWWDSIZE_3P125	0x500000
43
44#define WDENABLE_KEY	0xa98559da
45
46#define WDKEY_SEQ0		0xe51a
47#define WDKEY_SEQ1		0xa35c
48
49#define WDT_PRELOAD_SHIFT	13
50
51#define WDT_PRELOAD_MAX		0xfff
52
53#define DWDST			BIT(1)
54
55static int heartbeat = DEFAULT_HEARTBEAT;
56
57/*
58 * struct to hold data for each WDT device
59 * @base - base io address of WD device
60 * @freq - source clock frequency of WDT
61 * @wdd  - hold watchdog device as is in WDT core
62 */
63struct rti_wdt_device {
64	void __iomem		*base;
65	unsigned long		freq;
66	struct watchdog_device	wdd;
67};
68
69static int rti_wdt_start(struct watchdog_device *wdd)
70{
71	u32 timer_margin;
72	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
73	int ret;
74
75	ret = pm_runtime_resume_and_get(wdd->parent);
76	if (ret)
77		return ret;
78
79	/* set timeout period */
80	timer_margin = (u64)wdd->timeout * wdt->freq;
81	timer_margin >>= WDT_PRELOAD_SHIFT;
82	if (timer_margin > WDT_PRELOAD_MAX)
83		timer_margin = WDT_PRELOAD_MAX;
84	writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);
85
86	/*
87	 * RTI only supports a windowed mode, where the watchdog can only
88	 * be petted during the open window; not too early or not too late.
89	 * The HW configuration options only allow for the open window size
90	 * to be 50% or less than that; we obviouly want to configure the open
91	 * window as large as possible so we select the 50% option.
92	 */
93	wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;
94
95	/* Generate NMI when wdt expires */
96	writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
97
98	/* Open window size 50%; this is the largest window size available */
99	writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);
100
101	readl_relaxed(wdt->base + RTIWWDSIZECTRL);
102
103	/* enable watchdog */
104	writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
105	return 0;
106}
107
108static int rti_wdt_ping(struct watchdog_device *wdd)
109{
110	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
111
112	/* put watchdog in service state */
113	writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
114	/* put watchdog in active state */
115	writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);
116
117	return 0;
118}
119
120static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
121{
122	/*
123	 * RTI only supports a windowed mode, where the watchdog can only
124	 * be petted during the open window; not too early or not too late.
125	 * The HW configuration options only allow for the open window size
126	 * to be 50% or less than that.
127	 */
128	switch (wsize) {
129	case RTIWWDSIZE_50P:
130		/* 50% open window => 50% min heartbeat */
131		wdd->min_hw_heartbeat_ms = 500 * heartbeat;
132		break;
133
134	case RTIWWDSIZE_25P:
135		/* 25% open window => 75% min heartbeat */
136		wdd->min_hw_heartbeat_ms = 750 * heartbeat;
137		break;
138
139	case RTIWWDSIZE_12P5:
140		/* 12.5% open window => 87.5% min heartbeat */
141		wdd->min_hw_heartbeat_ms = 875 * heartbeat;
142		break;
143
144	case RTIWWDSIZE_6P25:
145		/* 6.5% open window => 93.5% min heartbeat */
146		wdd->min_hw_heartbeat_ms = 935 * heartbeat;
147		break;
148
149	case RTIWWDSIZE_3P125:
150		/* 3.125% open window => 96.9% min heartbeat */
151		wdd->min_hw_heartbeat_ms = 969 * heartbeat;
152		break;
153
154	default:
155		return -EINVAL;
156	}
157
158	return 0;
159}
160
161static unsigned int rti_wdt_get_timeleft_ms(struct watchdog_device *wdd)
162{
163	u64 timer_counter;
164	u32 val;
165	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
166
167	/* if timeout has occurred then return 0 */
168	val = readl_relaxed(wdt->base + RTIWDSTATUS);
169	if (val & DWDST)
170		return 0;
171
172	timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
173
174	timer_counter *= 1000;
175
176	do_div(timer_counter, wdt->freq);
177
178	return timer_counter;
179}
180
181static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
182{
183	return rti_wdt_get_timeleft_ms(wdd) / 1000;
184}
185
186static const struct watchdog_info rti_wdt_info = {
187	.options = WDIOF_KEEPALIVEPING,
188	.identity = "K3 RTI Watchdog",
189};
190
191static const struct watchdog_ops rti_wdt_ops = {
192	.owner		= THIS_MODULE,
193	.start		= rti_wdt_start,
194	.ping		= rti_wdt_ping,
195	.get_timeleft	= rti_wdt_get_timeleft,
196};
197
198static int rti_wdt_probe(struct platform_device *pdev)
199{
200	int ret = 0;
201	struct device *dev = &pdev->dev;
202	struct resource *wdt_mem;
203	struct watchdog_device *wdd;
204	struct rti_wdt_device *wdt;
205	struct clk *clk;
206	u32 last_ping = 0;
207
208	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
209	if (!wdt)
210		return -ENOMEM;
211
212	clk = clk_get(dev, NULL);
213	if (IS_ERR(clk))
214		return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
215
216	wdt->freq = clk_get_rate(clk);
217
218	clk_put(clk);
219
220	if (!wdt->freq) {
221		dev_err(dev, "Failed to get fck rate.\n");
222		return -EINVAL;
223	}
224
225	/*
226	 * If watchdog is running at 32k clock, it is not accurate.
227	 * Adjust frequency down in this case so that we don't pet
228	 * the watchdog too often.
229	 */
230	if (wdt->freq < 32768)
231		wdt->freq = wdt->freq * 9 / 10;
232
233	pm_runtime_enable(dev);
234	ret = pm_runtime_get_sync(dev);
235	if (ret < 0) {
236		pm_runtime_put_noidle(dev);
237		pm_runtime_disable(&pdev->dev);
238		return dev_err_probe(dev, ret, "runtime pm failed\n");
239	}
240
241	platform_set_drvdata(pdev, wdt);
242
243	wdd = &wdt->wdd;
244	wdd->info = &rti_wdt_info;
245	wdd->ops = &rti_wdt_ops;
246	wdd->min_timeout = 1;
247	wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
248		wdt->freq * 1000;
249	wdd->parent = dev;
250
251	watchdog_set_drvdata(wdd, wdt);
252	watchdog_set_nowayout(wdd, 1);
253	watchdog_set_restart_priority(wdd, 128);
254
255	wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
256	wdt->base = devm_ioremap_resource(dev, wdt_mem);
257	if (IS_ERR(wdt->base)) {
258		ret = PTR_ERR(wdt->base);
259		goto err_iomap;
260	}
261
262	if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
263		u32 time_left_ms;
264		u64 heartbeat_ms;
265		u32 wsize;
266
267		set_bit(WDOG_HW_RUNNING, &wdd->status);
268		time_left_ms = rti_wdt_get_timeleft_ms(wdd);
269		heartbeat_ms = readl(wdt->base + RTIDWDPRLD);
270		heartbeat_ms <<= WDT_PRELOAD_SHIFT;
271		heartbeat_ms *= 1000;
272		do_div(heartbeat_ms, wdt->freq);
273		if (heartbeat_ms != heartbeat * 1000)
274			dev_warn(dev, "watchdog already running, ignoring heartbeat config!\n");
275
276		heartbeat = heartbeat_ms;
277		heartbeat /= 1000;
278
279		wsize = readl(wdt->base + RTIWWDSIZECTRL);
280		ret = rti_wdt_setup_hw_hb(wdd, wsize);
281		if (ret) {
282			dev_err(dev, "bad window size.\n");
283			goto err_iomap;
284		}
285
286		last_ping = heartbeat_ms - time_left_ms;
287		if (time_left_ms > heartbeat_ms) {
288			dev_warn(dev, "time_left > heartbeat? Assuming last ping just before now.\n");
289			last_ping = 0;
290		}
291	}
292
293	watchdog_init_timeout(wdd, heartbeat, dev);
294
295	ret = watchdog_register_device(wdd);
296	if (ret) {
297		dev_err(dev, "cannot register watchdog device\n");
298		goto err_iomap;
299	}
300
301	if (last_ping)
302		watchdog_set_last_hw_keepalive(wdd, last_ping);
303
304	if (!watchdog_hw_running(wdd))
305		pm_runtime_put_sync(&pdev->dev);
306
307	return 0;
308
309err_iomap:
310	pm_runtime_put_sync(&pdev->dev);
311	pm_runtime_disable(&pdev->dev);
312
313	return ret;
314}
315
316static int rti_wdt_remove(struct platform_device *pdev)
317{
318	struct rti_wdt_device *wdt = platform_get_drvdata(pdev);
319
320	watchdog_unregister_device(&wdt->wdd);
321
322	if (!pm_runtime_suspended(&pdev->dev))
323		pm_runtime_put(&pdev->dev);
324
325	pm_runtime_disable(&pdev->dev);
326
327	return 0;
328}
329
330static const struct of_device_id rti_wdt_of_match[] = {
331	{ .compatible = "ti,j7-rti-wdt", },
332	{},
333};
334MODULE_DEVICE_TABLE(of, rti_wdt_of_match);
335
336static struct platform_driver rti_wdt_driver = {
337	.driver = {
338		.name = "rti-wdt",
339		.of_match_table = rti_wdt_of_match,
340	},
341	.probe = rti_wdt_probe,
342	.remove = rti_wdt_remove,
343};
344
345module_platform_driver(rti_wdt_driver);
346
347MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
348MODULE_DESCRIPTION("K3 RTI Watchdog Driver");
349
350module_param(heartbeat, int, 0);
351MODULE_PARM_DESC(heartbeat,
352		 "Watchdog heartbeat period in seconds from 1 to "
353		 __MODULE_STRING(MAX_HEARTBEAT) ", default "
354		 __MODULE_STRING(DEFAULT_HEARTBEAT));
355
356MODULE_LICENSE("GPL");
357MODULE_ALIAS("platform:rti-wdt");
358