1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 *	Watchdog Timer Driver
4 *	   for ITE IT87xx Environment Control - Low Pin Count Input / Output
5 *
6 *	(c) Copyright 2007  Oliver Schuster <olivers137@aol.com>
7 *
8 *	Based on softdog.c	by Alan Cox,
9 *		 83977f_wdt.c	by Jose Goncalves,
10 *		 it87.c		by Chris Gauthron, Jean Delvare
11 *
12 *	Data-sheets: Publicly available at the ITE website
13 *		    http://www.ite.com.tw/
14 *
15 *	Support of the watchdog timers, which are available on
16 *	IT8607, IT8620, IT8622, IT8625, IT8628, IT8655, IT8665, IT8686,
17 *	IT8702, IT8712, IT8716, IT8718, IT8720, IT8721, IT8726, IT8728,
18 *	IT8772, IT8783 and IT8784.
19 */
20
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23#include <linux/init.h>
24#include <linux/io.h>
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/types.h>
29#include <linux/watchdog.h>
30
31#define WATCHDOG_NAME		"IT87 WDT"
32
33/* Defaults for Module Parameter */
34#define DEFAULT_TIMEOUT		60
35#define DEFAULT_TESTMODE	0
36#define DEFAULT_NOWAYOUT	WATCHDOG_NOWAYOUT
37
38/* IO Ports */
39#define REG		0x2e
40#define VAL		0x2f
41
42/* Logical device Numbers LDN */
43#define GPIO		0x07
44
45/* Configuration Registers and Functions */
46#define LDNREG		0x07
47#define CHIPID		0x20
48#define CHIPREV		0x22
49
50/* Chip Id numbers */
51#define NO_DEV_ID	0xffff
52#define IT8607_ID	0x8607
53#define IT8620_ID	0x8620
54#define IT8622_ID	0x8622
55#define IT8625_ID	0x8625
56#define IT8628_ID	0x8628
57#define IT8655_ID	0x8655
58#define IT8665_ID	0x8665
59#define IT8686_ID	0x8686
60#define IT8702_ID	0x8702
61#define IT8705_ID	0x8705
62#define IT8712_ID	0x8712
63#define IT8716_ID	0x8716
64#define IT8718_ID	0x8718
65#define IT8720_ID	0x8720
66#define IT8721_ID	0x8721
67#define IT8726_ID	0x8726	/* the data sheet suggest wrongly 0x8716 */
68#define IT8728_ID	0x8728
69#define IT8772_ID	0x8772
70#define IT8783_ID	0x8783
71#define IT8784_ID	0x8784
72#define IT8786_ID	0x8786
73
74/* GPIO Configuration Registers LDN=0x07 */
75#define WDTCTRL		0x71
76#define WDTCFG		0x72
77#define WDTVALLSB	0x73
78#define WDTVALMSB	0x74
79
80/* GPIO Bits WDTCFG */
81#define WDT_TOV1	0x80
82#define WDT_KRST	0x40
83#define WDT_TOVE	0x20
84#define WDT_PWROK	0x10 /* not in it8721 */
85#define WDT_INT_MASK	0x0f
86
87static unsigned int max_units, chip_type;
88
89static unsigned int timeout = DEFAULT_TIMEOUT;
90static int testmode = DEFAULT_TESTMODE;
91static bool nowayout = DEFAULT_NOWAYOUT;
92
93module_param(timeout, int, 0);
94MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
95		__MODULE_STRING(DEFAULT_TIMEOUT));
96module_param(testmode, int, 0);
97MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
98		__MODULE_STRING(DEFAULT_TESTMODE));
99module_param(nowayout, bool, 0);
100MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
101		__MODULE_STRING(WATCHDOG_NOWAYOUT));
102
103/* Superio Chip */
104
105static inline int superio_enter(void)
106{
107	/*
108	 * Try to reserve REG and REG + 1 for exclusive access.
109	 */
110	if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
111		return -EBUSY;
112
113	outb(0x87, REG);
114	outb(0x01, REG);
115	outb(0x55, REG);
116	outb(0x55, REG);
117	return 0;
118}
119
120static inline void superio_exit(void)
121{
122	outb(0x02, REG);
123	outb(0x02, VAL);
124	release_region(REG, 2);
125}
126
127static inline void superio_select(int ldn)
128{
129	outb(LDNREG, REG);
130	outb(ldn, VAL);
131}
132
133static inline int superio_inb(int reg)
134{
135	outb(reg, REG);
136	return inb(VAL);
137}
138
139static inline void superio_outb(int val, int reg)
140{
141	outb(reg, REG);
142	outb(val, VAL);
143}
144
145static inline int superio_inw(int reg)
146{
147	int val;
148	outb(reg++, REG);
149	val = inb(VAL) << 8;
150	outb(reg, REG);
151	val |= inb(VAL);
152	return val;
153}
154
155static inline void superio_outw(int val, int reg)
156{
157	outb(reg++, REG);
158	outb(val >> 8, VAL);
159	outb(reg, REG);
160	outb(val, VAL);
161}
162
163/* Internal function, should be called after superio_select(GPIO) */
164static void _wdt_update_timeout(unsigned int t)
165{
166	unsigned char cfg = WDT_KRST;
167
168	if (testmode)
169		cfg = 0;
170
171	if (t <= max_units)
172		cfg |= WDT_TOV1;
173	else
174		t /= 60;
175
176	if (chip_type != IT8721_ID)
177		cfg |= WDT_PWROK;
178
179	superio_outb(cfg, WDTCFG);
180	superio_outb(t, WDTVALLSB);
181	if (max_units > 255)
182		superio_outb(t >> 8, WDTVALMSB);
183}
184
185static int wdt_update_timeout(unsigned int t)
186{
187	int ret;
188
189	ret = superio_enter();
190	if (ret)
191		return ret;
192
193	superio_select(GPIO);
194	_wdt_update_timeout(t);
195	superio_exit();
196
197	return 0;
198}
199
200static int wdt_round_time(int t)
201{
202	t += 59;
203	t -= t % 60;
204	return t;
205}
206
207/* watchdog timer handling */
208
209static int wdt_start(struct watchdog_device *wdd)
210{
211	return wdt_update_timeout(wdd->timeout);
212}
213
214static int wdt_stop(struct watchdog_device *wdd)
215{
216	return wdt_update_timeout(0);
217}
218
219/**
220 *	wdt_set_timeout - set a new timeout value with watchdog ioctl
221 *	@t: timeout value in seconds
222 *
223 *	The hardware device has a 8 or 16 bit watchdog timer (depends on
224 *	chip version) that can be configured to count seconds or minutes.
225 *
226 *	Used within WDIOC_SETTIMEOUT watchdog device ioctl.
227 */
228
229static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
230{
231	int ret = 0;
232
233	if (t > max_units)
234		t = wdt_round_time(t);
235
236	wdd->timeout = t;
237
238	if (watchdog_hw_running(wdd))
239		ret = wdt_update_timeout(t);
240
241	return ret;
242}
243
244static const struct watchdog_info ident = {
245	.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
246	.firmware_version = 1,
247	.identity = WATCHDOG_NAME,
248};
249
250static const struct watchdog_ops wdt_ops = {
251	.owner = THIS_MODULE,
252	.start = wdt_start,
253	.stop = wdt_stop,
254	.set_timeout = wdt_set_timeout,
255};
256
257static struct watchdog_device wdt_dev = {
258	.info = &ident,
259	.ops = &wdt_ops,
260	.min_timeout = 1,
261};
262
263static int __init it87_wdt_init(void)
264{
265	u8  chip_rev;
266	u8 ctrl;
267	int rc;
268
269	rc = superio_enter();
270	if (rc)
271		return rc;
272
273	chip_type = superio_inw(CHIPID);
274	chip_rev  = superio_inb(CHIPREV) & 0x0f;
275	superio_exit();
276
277	switch (chip_type) {
278	case IT8702_ID:
279		max_units = 255;
280		break;
281	case IT8712_ID:
282		max_units = (chip_rev < 8) ? 255 : 65535;
283		break;
284	case IT8716_ID:
285	case IT8726_ID:
286		max_units = 65535;
287		break;
288	case IT8607_ID:
289	case IT8620_ID:
290	case IT8622_ID:
291	case IT8625_ID:
292	case IT8628_ID:
293	case IT8655_ID:
294	case IT8665_ID:
295	case IT8686_ID:
296	case IT8718_ID:
297	case IT8720_ID:
298	case IT8721_ID:
299	case IT8728_ID:
300	case IT8772_ID:
301	case IT8783_ID:
302	case IT8784_ID:
303	case IT8786_ID:
304		max_units = 65535;
305		break;
306	case IT8705_ID:
307		pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
308		       chip_type, chip_rev);
309		return -ENODEV;
310	case NO_DEV_ID:
311		pr_err("no device\n");
312		return -ENODEV;
313	default:
314		pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
315		       chip_type, chip_rev);
316		return -ENODEV;
317	}
318
319	rc = superio_enter();
320	if (rc)
321		return rc;
322
323	superio_select(GPIO);
324	superio_outb(WDT_TOV1, WDTCFG);
325
326	switch (chip_type) {
327	case IT8784_ID:
328	case IT8786_ID:
329		ctrl = superio_inb(WDTCTRL);
330		ctrl &= 0x08;
331		superio_outb(ctrl, WDTCTRL);
332		break;
333	default:
334		superio_outb(0x00, WDTCTRL);
335	}
336
337	superio_exit();
338
339	if (timeout < 1 || timeout > max_units * 60) {
340		timeout = DEFAULT_TIMEOUT;
341		pr_warn("Timeout value out of range, use default %d sec\n",
342			DEFAULT_TIMEOUT);
343	}
344
345	if (timeout > max_units)
346		timeout = wdt_round_time(timeout);
347
348	wdt_dev.timeout = timeout;
349	wdt_dev.max_timeout = max_units * 60;
350
351	watchdog_stop_on_reboot(&wdt_dev);
352	rc = watchdog_register_device(&wdt_dev);
353	if (rc) {
354		pr_err("Cannot register watchdog device (err=%d)\n", rc);
355		return rc;
356	}
357
358	pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
359		chip_type, chip_rev, timeout, nowayout, testmode);
360
361	return 0;
362}
363
364static void __exit it87_wdt_exit(void)
365{
366	watchdog_unregister_device(&wdt_dev);
367}
368
369module_init(it87_wdt_init);
370module_exit(it87_wdt_exit);
371
372MODULE_AUTHOR("Oliver Schuster");
373MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
374MODULE_LICENSE("GPL");
375