1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (c) Intel Corp. 2007.
4 * All Rights Reserved.
5 *
6 * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
7 * develop this driver.
8 *
9 * This file is part of the Vermilion Range fb driver.
10 *
11 * Authors:
12 *   Thomas Hellström <thomas-at-tungstengraphics-dot-com>
13 *   Michel Dänzer <michel-at-tungstengraphics-dot-com>
14 *   Alan Hourihane <alanh-at-tungstengraphics-dot-com>
15 */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/delay.h>
22#include <linux/slab.h>
23#include <linux/mm.h>
24#include <linux/fb.h>
25#include <linux/pci.h>
26#include <asm/set_memory.h>
27#include <asm/tlbflush.h>
28#include <linux/mmzone.h>
29
30/* #define VERMILION_DEBUG */
31
32#include "vermilion.h"
33
34#define MODULE_NAME "vmlfb"
35
36#define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16)
37
38static struct mutex vml_mutex;
39static struct list_head global_no_mode;
40static struct list_head global_has_mode;
41static struct fb_ops vmlfb_ops;
42static struct vml_sys *subsys = NULL;
43static char *vml_default_mode = "1024x768@60";
44static const struct fb_videomode defaultmode = {
45	NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6,
46	0, FB_VMODE_NONINTERLACED
47};
48
49static u32 vml_mem_requested = (10 * 1024 * 1024);
50static u32 vml_mem_contig = (4 * 1024 * 1024);
51static u32 vml_mem_min = (4 * 1024 * 1024);
52
53static u32 vml_clocks[] = {
54	6750,
55	13500,
56	27000,
57	29700,
58	37125,
59	54000,
60	59400,
61	74250,
62	120000,
63	148500
64};
65
66static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks);
67
68/*
69 * Allocate a contiguous vram area and make its linear kernel map
70 * uncached.
71 */
72
73static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order,
74				 unsigned min_order)
75{
76	gfp_t flags;
77	unsigned long i;
78
79	max_order++;
80	do {
81		/*
82		 * Really try hard to get the needed memory.
83		 * We need memory below the first 32MB, so we
84		 * add the __GFP_DMA flag that guarantees that we are
85		 * below the first 16MB.
86		 */
87
88		flags = __GFP_DMA | __GFP_HIGH | __GFP_KSWAPD_RECLAIM;
89		va->logical =
90			 __get_free_pages(flags, --max_order);
91	} while (va->logical == 0 && max_order > min_order);
92
93	if (!va->logical)
94		return -ENOMEM;
95
96	va->phys = virt_to_phys((void *)va->logical);
97	va->size = PAGE_SIZE << max_order;
98	va->order = max_order;
99
100	/*
101	 * It seems like __get_free_pages only ups the usage count
102	 * of the first page. This doesn't work with fault mapping, so
103	 * up the usage count once more (XXX: should use split_page or
104	 * compound page).
105	 */
106
107	memset((void *)va->logical, 0x00, va->size);
108	for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) {
109		get_page(virt_to_page(i));
110	}
111
112	/*
113	 * Change caching policy of the linear kernel map to avoid
114	 * mapping type conflicts with user-space mappings.
115	 */
116	set_pages_uc(virt_to_page(va->logical), va->size >> PAGE_SHIFT);
117
118	printk(KERN_DEBUG MODULE_NAME
119	       ": Allocated %ld bytes vram area at 0x%08lx\n",
120	       va->size, va->phys);
121
122	return 0;
123}
124
125/*
126 * Free a contiguous vram area and reset its linear kernel map
127 * mapping type.
128 */
129
130static void vmlfb_free_vram_area(struct vram_area *va)
131{
132	unsigned long j;
133
134	if (va->logical) {
135
136		/*
137		 * Reset the linear kernel map caching policy.
138		 */
139
140		set_pages_wb(virt_to_page(va->logical),
141				 va->size >> PAGE_SHIFT);
142
143		/*
144		 * Decrease the usage count on the pages we've used
145		 * to compensate for upping when allocating.
146		 */
147
148		for (j = va->logical; j < va->logical + va->size;
149		     j += PAGE_SIZE) {
150			(void)put_page_testzero(virt_to_page(j));
151		}
152
153		printk(KERN_DEBUG MODULE_NAME
154		       ": Freeing %ld bytes vram area at 0x%08lx\n",
155		       va->size, va->phys);
156		free_pages(va->logical, va->order);
157
158		va->logical = 0;
159	}
160}
161
162/*
163 * Free allocated vram.
164 */
165
166static void vmlfb_free_vram(struct vml_info *vinfo)
167{
168	int i;
169
170	for (i = 0; i < vinfo->num_areas; ++i) {
171		vmlfb_free_vram_area(&vinfo->vram[i]);
172	}
173	vinfo->num_areas = 0;
174}
175
176/*
177 * Allocate vram. Currently we try to allocate contiguous areas from the
178 * __GFP_DMA zone and puzzle them together. A better approach would be to
179 * allocate one contiguous area for scanout and use one-page allocations for
180 * offscreen areas. This requires user-space and GPU virtual mappings.
181 */
182
183static int vmlfb_alloc_vram(struct vml_info *vinfo,
184			    size_t requested,
185			    size_t min_total, size_t min_contig)
186{
187	int i, j;
188	int order;
189	int contiguous;
190	int err;
191	struct vram_area *va;
192	struct vram_area *va2;
193
194	vinfo->num_areas = 0;
195	for (i = 0; i < VML_VRAM_AREAS; ++i) {
196		va = &vinfo->vram[i];
197		order = 0;
198
199		while (requested > (PAGE_SIZE << order) && order < MAX_ORDER)
200			order++;
201
202		err = vmlfb_alloc_vram_area(va, order, 0);
203
204		if (err)
205			break;
206
207		if (i == 0) {
208			vinfo->vram_start = va->phys;
209			vinfo->vram_logical = (void __iomem *) va->logical;
210			vinfo->vram_contig_size = va->size;
211			vinfo->num_areas = 1;
212		} else {
213			contiguous = 0;
214
215			for (j = 0; j < i; ++j) {
216				va2 = &vinfo->vram[j];
217				if (va->phys + va->size == va2->phys ||
218				    va2->phys + va2->size == va->phys) {
219					contiguous = 1;
220					break;
221				}
222			}
223
224			if (contiguous) {
225				vinfo->num_areas++;
226				if (va->phys < vinfo->vram_start) {
227					vinfo->vram_start = va->phys;
228					vinfo->vram_logical =
229						(void __iomem *)va->logical;
230				}
231				vinfo->vram_contig_size += va->size;
232			} else {
233				vmlfb_free_vram_area(va);
234				break;
235			}
236		}
237
238		if (requested < va->size)
239			break;
240		else
241			requested -= va->size;
242	}
243
244	if (vinfo->vram_contig_size > min_total &&
245	    vinfo->vram_contig_size > min_contig) {
246
247		printk(KERN_DEBUG MODULE_NAME
248		       ": Contiguous vram: %ld bytes at physical 0x%08lx.\n",
249		       (unsigned long)vinfo->vram_contig_size,
250		       (unsigned long)vinfo->vram_start);
251
252		return 0;
253	}
254
255	printk(KERN_ERR MODULE_NAME
256	       ": Could not allocate requested minimal amount of vram.\n");
257
258	vmlfb_free_vram(vinfo);
259
260	return -ENOMEM;
261}
262
263/*
264 * Find the GPU to use with our display controller.
265 */
266
267static int vmlfb_get_gpu(struct vml_par *par)
268{
269	mutex_lock(&vml_mutex);
270
271	par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL);
272
273	if (!par->gpu) {
274		mutex_unlock(&vml_mutex);
275		return -ENODEV;
276	}
277
278	mutex_unlock(&vml_mutex);
279
280	if (pci_enable_device(par->gpu) < 0) {
281		pci_dev_put(par->gpu);
282		return -ENODEV;
283	}
284
285	return 0;
286}
287
288/*
289 * Find a contiguous vram area that contains a given offset from vram start.
290 */
291static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset)
292{
293	unsigned long aoffset;
294	unsigned i;
295
296	for (i = 0; i < vinfo->num_areas; ++i) {
297		aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start);
298
299		if (aoffset < vinfo->vram[i].size) {
300			return 0;
301		}
302	}
303
304	return -EINVAL;
305}
306
307/*
308 * Remap the MMIO register spaces of the VDC and the GPU.
309 */
310
311static int vmlfb_enable_mmio(struct vml_par *par)
312{
313	int err;
314
315	par->vdc_mem_base = pci_resource_start(par->vdc, 0);
316	par->vdc_mem_size = pci_resource_len(par->vdc, 0);
317	if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) {
318		printk(KERN_ERR MODULE_NAME
319		       ": Could not claim display controller MMIO.\n");
320		return -EBUSY;
321	}
322	par->vdc_mem = ioremap(par->vdc_mem_base, par->vdc_mem_size);
323	if (par->vdc_mem == NULL) {
324		printk(KERN_ERR MODULE_NAME
325		       ": Could not map display controller MMIO.\n");
326		err = -ENOMEM;
327		goto out_err_0;
328	}
329
330	par->gpu_mem_base = pci_resource_start(par->gpu, 0);
331	par->gpu_mem_size = pci_resource_len(par->gpu, 0);
332	if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) {
333		printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n");
334		err = -EBUSY;
335		goto out_err_1;
336	}
337	par->gpu_mem = ioremap(par->gpu_mem_base, par->gpu_mem_size);
338	if (par->gpu_mem == NULL) {
339		printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n");
340		err = -ENOMEM;
341		goto out_err_2;
342	}
343
344	return 0;
345
346out_err_2:
347	release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
348out_err_1:
349	iounmap(par->vdc_mem);
350out_err_0:
351	release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
352	return err;
353}
354
355/*
356 * Unmap the VDC and GPU register spaces.
357 */
358
359static void vmlfb_disable_mmio(struct vml_par *par)
360{
361	iounmap(par->gpu_mem);
362	release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
363	iounmap(par->vdc_mem);
364	release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
365}
366
367/*
368 * Release and uninit the VDC and GPU.
369 */
370
371static void vmlfb_release_devices(struct vml_par *par)
372{
373	if (atomic_dec_and_test(&par->refcount)) {
374		pci_disable_device(par->gpu);
375		pci_disable_device(par->vdc);
376	}
377}
378
379/*
380 * Free up allocated resources for a device.
381 */
382
383static void vml_pci_remove(struct pci_dev *dev)
384{
385	struct fb_info *info;
386	struct vml_info *vinfo;
387	struct vml_par *par;
388
389	info = pci_get_drvdata(dev);
390	if (info) {
391		vinfo = container_of(info, struct vml_info, info);
392		par = vinfo->par;
393		mutex_lock(&vml_mutex);
394		unregister_framebuffer(info);
395		fb_dealloc_cmap(&info->cmap);
396		vmlfb_free_vram(vinfo);
397		vmlfb_disable_mmio(par);
398		vmlfb_release_devices(par);
399		kfree(vinfo);
400		kfree(par);
401		mutex_unlock(&vml_mutex);
402	}
403}
404
405static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var)
406{
407	switch (var->bits_per_pixel) {
408	case 16:
409		var->blue.offset = 0;
410		var->blue.length = 5;
411		var->green.offset = 5;
412		var->green.length = 5;
413		var->red.offset = 10;
414		var->red.length = 5;
415		var->transp.offset = 15;
416		var->transp.length = 1;
417		break;
418	case 32:
419		var->blue.offset = 0;
420		var->blue.length = 8;
421		var->green.offset = 8;
422		var->green.length = 8;
423		var->red.offset = 16;
424		var->red.length = 8;
425		var->transp.offset = 24;
426		var->transp.length = 0;
427		break;
428	default:
429		break;
430	}
431
432	var->blue.msb_right = var->green.msb_right =
433	    var->red.msb_right = var->transp.msb_right = 0;
434}
435
436/*
437 * Device initialization.
438 * We initialize one vml_par struct per device and one vml_info
439 * struct per pipe. Currently we have only one pipe.
440 */
441
442static int vml_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
443{
444	struct vml_info *vinfo;
445	struct fb_info *info;
446	struct vml_par *par;
447	int err = 0;
448
449	par = kzalloc(sizeof(*par), GFP_KERNEL);
450	if (par == NULL)
451		return -ENOMEM;
452
453	vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL);
454	if (vinfo == NULL) {
455		err = -ENOMEM;
456		goto out_err_0;
457	}
458
459	vinfo->par = par;
460	par->vdc = dev;
461	atomic_set(&par->refcount, 1);
462
463	switch (id->device) {
464	case VML_DEVICE_VDC:
465		if ((err = vmlfb_get_gpu(par)))
466			goto out_err_1;
467		pci_set_drvdata(dev, &vinfo->info);
468		break;
469	default:
470		err = -ENODEV;
471		goto out_err_1;
472	}
473
474	info = &vinfo->info;
475	info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK;
476
477	err = vmlfb_enable_mmio(par);
478	if (err)
479		goto out_err_2;
480
481	err = vmlfb_alloc_vram(vinfo, vml_mem_requested,
482			       vml_mem_contig, vml_mem_min);
483	if (err)
484		goto out_err_3;
485
486	strcpy(info->fix.id, "Vermilion Range");
487	info->fix.mmio_start = 0;
488	info->fix.mmio_len = 0;
489	info->fix.smem_start = vinfo->vram_start;
490	info->fix.smem_len = vinfo->vram_contig_size;
491	info->fix.type = FB_TYPE_PACKED_PIXELS;
492	info->fix.visual = FB_VISUAL_TRUECOLOR;
493	info->fix.ypanstep = 1;
494	info->fix.xpanstep = 1;
495	info->fix.ywrapstep = 0;
496	info->fix.accel = FB_ACCEL_NONE;
497	info->screen_base = vinfo->vram_logical;
498	info->pseudo_palette = vinfo->pseudo_palette;
499	info->par = par;
500	info->fbops = &vmlfb_ops;
501	info->device = &dev->dev;
502
503	INIT_LIST_HEAD(&vinfo->head);
504	vinfo->pipe_disabled = 1;
505	vinfo->cur_blank_mode = FB_BLANK_UNBLANK;
506
507	info->var.grayscale = 0;
508	info->var.bits_per_pixel = 16;
509	vmlfb_set_pref_pixel_format(&info->var);
510
511	if (!fb_find_mode
512	    (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) {
513		printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n");
514	}
515
516	if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) {
517		err = -ENOMEM;
518		goto out_err_4;
519	}
520
521	err = register_framebuffer(info);
522	if (err) {
523		printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n");
524		goto out_err_5;
525	}
526
527	printk("Initialized vmlfb\n");
528
529	return 0;
530
531out_err_5:
532	fb_dealloc_cmap(&info->cmap);
533out_err_4:
534	vmlfb_free_vram(vinfo);
535out_err_3:
536	vmlfb_disable_mmio(par);
537out_err_2:
538	vmlfb_release_devices(par);
539out_err_1:
540	kfree(vinfo);
541out_err_0:
542	kfree(par);
543	return err;
544}
545
546static int vmlfb_open(struct fb_info *info, int user)
547{
548	/*
549	 * Save registers here?
550	 */
551	return 0;
552}
553
554static int vmlfb_release(struct fb_info *info, int user)
555{
556	/*
557	 * Restore registers here.
558	 */
559
560	return 0;
561}
562
563static int vml_nearest_clock(int clock)
564{
565
566	int i;
567	int cur_index;
568	int cur_diff;
569	int diff;
570
571	cur_index = 0;
572	cur_diff = clock - vml_clocks[0];
573	cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff;
574	for (i = 1; i < vml_num_clocks; ++i) {
575		diff = clock - vml_clocks[i];
576		diff = (diff < 0) ? -diff : diff;
577		if (diff < cur_diff) {
578			cur_index = i;
579			cur_diff = diff;
580		}
581	}
582	return vml_clocks[cur_index];
583}
584
585static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
586				  struct vml_info *vinfo)
587{
588	u32 pitch;
589	u64 mem;
590	int nearest_clock;
591	int clock;
592	int clock_diff;
593	struct fb_var_screeninfo v;
594
595	v = *var;
596	clock = PICOS2KHZ(var->pixclock);
597
598	if (subsys && subsys->nearest_clock) {
599		nearest_clock = subsys->nearest_clock(subsys, clock);
600	} else {
601		nearest_clock = vml_nearest_clock(clock);
602	}
603
604	/*
605	 * Accept a 20% diff.
606	 */
607
608	clock_diff = nearest_clock - clock;
609	clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff;
610	if (clock_diff > clock / 5) {
611#if 0
612		printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock);
613#endif
614		return -EINVAL;
615	}
616
617	v.pixclock = KHZ2PICOS(nearest_clock);
618
619	if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) {
620		printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n");
621		return -EINVAL;
622	}
623	if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) {
624		printk(KERN_DEBUG MODULE_NAME
625		       ": Virtual resolution failure.\n");
626		return -EINVAL;
627	}
628	switch (v.bits_per_pixel) {
629	case 0 ... 16:
630		v.bits_per_pixel = 16;
631		break;
632	case 17 ... 32:
633		v.bits_per_pixel = 32;
634		break;
635	default:
636		printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n",
637		       var->bits_per_pixel);
638		return -EINVAL;
639	}
640
641	pitch = ALIGN((var->xres * var->bits_per_pixel) >> 3, 0x40);
642	mem = (u64)pitch * var->yres_virtual;
643	if (mem > vinfo->vram_contig_size) {
644		return -ENOMEM;
645	}
646
647	switch (v.bits_per_pixel) {
648	case 16:
649		if (var->blue.offset != 0 ||
650		    var->blue.length != 5 ||
651		    var->green.offset != 5 ||
652		    var->green.length != 5 ||
653		    var->red.offset != 10 ||
654		    var->red.length != 5 ||
655		    var->transp.offset != 15 || var->transp.length != 1) {
656			vmlfb_set_pref_pixel_format(&v);
657		}
658		break;
659	case 32:
660		if (var->blue.offset != 0 ||
661		    var->blue.length != 8 ||
662		    var->green.offset != 8 ||
663		    var->green.length != 8 ||
664		    var->red.offset != 16 ||
665		    var->red.length != 8 ||
666		    (var->transp.length != 0 && var->transp.length != 8) ||
667		    (var->transp.length == 8 && var->transp.offset != 24)) {
668			vmlfb_set_pref_pixel_format(&v);
669		}
670		break;
671	default:
672		return -EINVAL;
673	}
674
675	*var = v;
676
677	return 0;
678}
679
680static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
681{
682	struct vml_info *vinfo = container_of(info, struct vml_info, info);
683	int ret;
684
685	mutex_lock(&vml_mutex);
686	ret = vmlfb_check_var_locked(var, vinfo);
687	mutex_unlock(&vml_mutex);
688
689	return ret;
690}
691
692static void vml_wait_vblank(struct vml_info *vinfo)
693{
694	/* Wait for vblank. For now, just wait for a 50Hz cycle (20ms)) */
695	mdelay(20);
696}
697
698static void vmlfb_disable_pipe(struct vml_info *vinfo)
699{
700	struct vml_par *par = vinfo->par;
701
702	/* Disable the MDVO pad */
703	VML_WRITE32(par, VML_RCOMPSTAT, 0);
704	while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ;
705
706	/* Disable display planes */
707	VML_WRITE32(par, VML_DSPCCNTR,
708		    VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE);
709	(void)VML_READ32(par, VML_DSPCCNTR);
710	/* Wait for vblank for the disable to take effect */
711	vml_wait_vblank(vinfo);
712
713	/* Next, disable display pipes */
714	VML_WRITE32(par, VML_PIPEACONF, 0);
715	(void)VML_READ32(par, VML_PIPEACONF);
716
717	vinfo->pipe_disabled = 1;
718}
719
720#ifdef VERMILION_DEBUG
721static void vml_dump_regs(struct vml_info *vinfo)
722{
723	struct vml_par *par = vinfo->par;
724
725	printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n");
726	printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A         : 0x%08x\n",
727	       (unsigned)VML_READ32(par, VML_HTOTAL_A));
728	printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A         : 0x%08x\n",
729	       (unsigned)VML_READ32(par, VML_HBLANK_A));
730	printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A          : 0x%08x\n",
731	       (unsigned)VML_READ32(par, VML_HSYNC_A));
732	printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A         : 0x%08x\n",
733	       (unsigned)VML_READ32(par, VML_VTOTAL_A));
734	printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A         : 0x%08x\n",
735	       (unsigned)VML_READ32(par, VML_VBLANK_A));
736	printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A          : 0x%08x\n",
737	       (unsigned)VML_READ32(par, VML_VSYNC_A));
738	printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE       : 0x%08x\n",
739	       (unsigned)VML_READ32(par, VML_DSPCSTRIDE));
740	printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE         : 0x%08x\n",
741	       (unsigned)VML_READ32(par, VML_DSPCSIZE));
742	printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS          : 0x%08x\n",
743	       (unsigned)VML_READ32(par, VML_DSPCPOS));
744	printk(KERN_DEBUG MODULE_NAME ": \tDSPARB           : 0x%08x\n",
745	       (unsigned)VML_READ32(par, VML_DSPARB));
746	printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR         : 0x%08x\n",
747	       (unsigned)VML_READ32(par, VML_DSPCADDR));
748	printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A        : 0x%08x\n",
749	       (unsigned)VML_READ32(par, VML_BCLRPAT_A));
750	printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A       : 0x%08x\n",
751	       (unsigned)VML_READ32(par, VML_CANVSCLR_A));
752	printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC         : 0x%08x\n",
753	       (unsigned)VML_READ32(par, VML_PIPEASRC));
754	printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF        : 0x%08x\n",
755	       (unsigned)VML_READ32(par, VML_PIPEACONF));
756	printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR         : 0x%08x\n",
757	       (unsigned)VML_READ32(par, VML_DSPCCNTR));
758	printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT        : 0x%08x\n",
759	       (unsigned)VML_READ32(par, VML_RCOMPSTAT));
760	printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n");
761}
762#endif
763
764static int vmlfb_set_par_locked(struct vml_info *vinfo)
765{
766	struct vml_par *par = vinfo->par;
767	struct fb_info *info = &vinfo->info;
768	struct fb_var_screeninfo *var = &info->var;
769	u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end;
770	u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end;
771	u32 dspcntr;
772	int clock;
773
774	vinfo->bytes_per_pixel = var->bits_per_pixel >> 3;
775	vinfo->stride = ALIGN(var->xres_virtual * vinfo->bytes_per_pixel, 0x40);
776	info->fix.line_length = vinfo->stride;
777
778	if (!subsys)
779		return 0;
780
781	htotal =
782	    var->xres + var->right_margin + var->hsync_len + var->left_margin;
783	hactive = var->xres;
784	hblank_start = var->xres;
785	hblank_end = htotal;
786	hsync_start = hactive + var->right_margin;
787	hsync_end = hsync_start + var->hsync_len;
788
789	vtotal =
790	    var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
791	vactive = var->yres;
792	vblank_start = var->yres;
793	vblank_end = vtotal;
794	vsync_start = vactive + var->lower_margin;
795	vsync_end = vsync_start + var->vsync_len;
796
797	dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS;
798	clock = PICOS2KHZ(var->pixclock);
799
800	if (subsys->nearest_clock) {
801		clock = subsys->nearest_clock(subsys, clock);
802	} else {
803		clock = vml_nearest_clock(clock);
804	}
805	printk(KERN_DEBUG MODULE_NAME
806	       ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal,
807	       ((clock / htotal) * 1000) / vtotal);
808
809	switch (var->bits_per_pixel) {
810	case 16:
811		dspcntr |= VML_GFX_ARGB1555;
812		break;
813	case 32:
814		if (var->transp.length == 8)
815			dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT;
816		else
817			dspcntr |= VML_GFX_RGB0888;
818		break;
819	default:
820		return -EINVAL;
821	}
822
823	vmlfb_disable_pipe(vinfo);
824	mb();
825
826	if (subsys->set_clock)
827		subsys->set_clock(subsys, clock);
828	else
829		return -EINVAL;
830
831	VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1));
832	VML_WRITE32(par, VML_HBLANK_A,
833		    ((hblank_end - 1) << 16) | (hblank_start - 1));
834	VML_WRITE32(par, VML_HSYNC_A,
835		    ((hsync_end - 1) << 16) | (hsync_start - 1));
836	VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1));
837	VML_WRITE32(par, VML_VBLANK_A,
838		    ((vblank_end - 1) << 16) | (vblank_start - 1));
839	VML_WRITE32(par, VML_VSYNC_A,
840		    ((vsync_end - 1) << 16) | (vsync_start - 1));
841	VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride);
842	VML_WRITE32(par, VML_DSPCSIZE,
843		    ((var->yres - 1) << 16) | (var->xres - 1));
844	VML_WRITE32(par, VML_DSPCPOS, 0x00000000);
845	VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT);
846	VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000);
847	VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000);
848	VML_WRITE32(par, VML_PIPEASRC,
849		    ((var->xres - 1) << 16) | (var->yres - 1));
850
851	wmb();
852	VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE);
853	wmb();
854	VML_WRITE32(par, VML_DSPCCNTR, dspcntr);
855	wmb();
856	VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
857		    var->yoffset * vinfo->stride +
858		    var->xoffset * vinfo->bytes_per_pixel);
859
860	VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE);
861
862	while (!(VML_READ32(par, VML_RCOMPSTAT) &
863		 (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ;
864
865	vinfo->pipe_disabled = 0;
866#ifdef VERMILION_DEBUG
867	vml_dump_regs(vinfo);
868#endif
869
870	return 0;
871}
872
873static int vmlfb_set_par(struct fb_info *info)
874{
875	struct vml_info *vinfo = container_of(info, struct vml_info, info);
876	int ret;
877
878	mutex_lock(&vml_mutex);
879	list_move(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode);
880	ret = vmlfb_set_par_locked(vinfo);
881
882	mutex_unlock(&vml_mutex);
883	return ret;
884}
885
886static int vmlfb_blank_locked(struct vml_info *vinfo)
887{
888	struct vml_par *par = vinfo->par;
889	u32 cur = VML_READ32(par, VML_PIPEACONF);
890
891	switch (vinfo->cur_blank_mode) {
892	case FB_BLANK_UNBLANK:
893		if (vinfo->pipe_disabled) {
894			vmlfb_set_par_locked(vinfo);
895		}
896		VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER);
897		(void)VML_READ32(par, VML_PIPEACONF);
898		break;
899	case FB_BLANK_NORMAL:
900		if (vinfo->pipe_disabled) {
901			vmlfb_set_par_locked(vinfo);
902		}
903		VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER);
904		(void)VML_READ32(par, VML_PIPEACONF);
905		break;
906	case FB_BLANK_VSYNC_SUSPEND:
907	case FB_BLANK_HSYNC_SUSPEND:
908		if (!vinfo->pipe_disabled) {
909			vmlfb_disable_pipe(vinfo);
910		}
911		break;
912	case FB_BLANK_POWERDOWN:
913		if (!vinfo->pipe_disabled) {
914			vmlfb_disable_pipe(vinfo);
915		}
916		break;
917	default:
918		return -EINVAL;
919	}
920
921	return 0;
922}
923
924static int vmlfb_blank(int blank_mode, struct fb_info *info)
925{
926	struct vml_info *vinfo = container_of(info, struct vml_info, info);
927	int ret;
928
929	mutex_lock(&vml_mutex);
930	vinfo->cur_blank_mode = blank_mode;
931	ret = vmlfb_blank_locked(vinfo);
932	mutex_unlock(&vml_mutex);
933	return ret;
934}
935
936static int vmlfb_pan_display(struct fb_var_screeninfo *var,
937			     struct fb_info *info)
938{
939	struct vml_info *vinfo = container_of(info, struct vml_info, info);
940	struct vml_par *par = vinfo->par;
941
942	mutex_lock(&vml_mutex);
943	VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
944		    var->yoffset * vinfo->stride +
945		    var->xoffset * vinfo->bytes_per_pixel);
946	(void)VML_READ32(par, VML_DSPCADDR);
947	mutex_unlock(&vml_mutex);
948
949	return 0;
950}
951
952static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
953			   u_int transp, struct fb_info *info)
954{
955	u32 v;
956
957	if (regno >= 16)
958		return -EINVAL;
959
960	if (info->var.grayscale) {
961		red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
962	}
963
964	if (info->fix.visual != FB_VISUAL_TRUECOLOR)
965		return -EINVAL;
966
967	red = VML_TOHW(red, info->var.red.length);
968	blue = VML_TOHW(blue, info->var.blue.length);
969	green = VML_TOHW(green, info->var.green.length);
970	transp = VML_TOHW(transp, info->var.transp.length);
971
972	v = (red << info->var.red.offset) |
973	    (green << info->var.green.offset) |
974	    (blue << info->var.blue.offset) |
975	    (transp << info->var.transp.offset);
976
977	switch (info->var.bits_per_pixel) {
978	case 16:
979		((u32 *) info->pseudo_palette)[regno] = v;
980		break;
981	case 24:
982	case 32:
983		((u32 *) info->pseudo_palette)[regno] = v;
984		break;
985	}
986	return 0;
987}
988
989static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
990{
991	struct vml_info *vinfo = container_of(info, struct vml_info, info);
992	unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
993	int ret;
994	unsigned long prot;
995
996	ret = vmlfb_vram_offset(vinfo, offset);
997	if (ret)
998		return -EINVAL;
999
1000	prot = pgprot_val(vma->vm_page_prot) & ~_PAGE_CACHE_MASK;
1001	pgprot_val(vma->vm_page_prot) =
1002		prot | cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS);
1003
1004	return vm_iomap_memory(vma, vinfo->vram_start,
1005			vinfo->vram_contig_size);
1006}
1007
1008static int vmlfb_sync(struct fb_info *info)
1009{
1010	return 0;
1011}
1012
1013static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1014{
1015	return -EINVAL;	/* just to force soft_cursor() call */
1016}
1017
1018static struct fb_ops vmlfb_ops = {
1019	.owner = THIS_MODULE,
1020	.fb_open = vmlfb_open,
1021	.fb_release = vmlfb_release,
1022	.fb_check_var = vmlfb_check_var,
1023	.fb_set_par = vmlfb_set_par,
1024	.fb_blank = vmlfb_blank,
1025	.fb_pan_display = vmlfb_pan_display,
1026	.fb_fillrect = cfb_fillrect,
1027	.fb_copyarea = cfb_copyarea,
1028	.fb_imageblit = cfb_imageblit,
1029	.fb_cursor = vmlfb_cursor,
1030	.fb_sync = vmlfb_sync,
1031	.fb_mmap = vmlfb_mmap,
1032	.fb_setcolreg = vmlfb_setcolreg
1033};
1034
1035static const struct pci_device_id vml_ids[] = {
1036	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)},
1037	{0}
1038};
1039
1040static struct pci_driver vmlfb_pci_driver = {
1041	.name = "vmlfb",
1042	.id_table = vml_ids,
1043	.probe = vml_pci_probe,
1044	.remove = vml_pci_remove,
1045};
1046
1047static void __exit vmlfb_cleanup(void)
1048{
1049	pci_unregister_driver(&vmlfb_pci_driver);
1050}
1051
1052static int __init vmlfb_init(void)
1053{
1054
1055#ifndef MODULE
1056	char *option = NULL;
1057
1058	if (fb_get_options(MODULE_NAME, &option))
1059		return -ENODEV;
1060#endif
1061
1062	printk(KERN_DEBUG MODULE_NAME ": initializing\n");
1063	mutex_init(&vml_mutex);
1064	INIT_LIST_HEAD(&global_no_mode);
1065	INIT_LIST_HEAD(&global_has_mode);
1066
1067	return pci_register_driver(&vmlfb_pci_driver);
1068}
1069
1070int vmlfb_register_subsys(struct vml_sys *sys)
1071{
1072	struct vml_info *entry;
1073	struct list_head *list;
1074	u32 save_activate;
1075
1076	mutex_lock(&vml_mutex);
1077	if (subsys != NULL) {
1078		subsys->restore(subsys);
1079	}
1080	subsys = sys;
1081	subsys->save(subsys);
1082
1083	/*
1084	 * We need to restart list traversal for each item, since we
1085	 * release the list mutex in the loop.
1086	 */
1087
1088	list = global_no_mode.next;
1089	while (list != &global_no_mode) {
1090		list_del_init(list);
1091		entry = list_entry(list, struct vml_info, head);
1092
1093		/*
1094		 * First, try the current mode which might not be
1095		 * completely validated with respect to the pixel clock.
1096		 */
1097
1098		if (!vmlfb_check_var_locked(&entry->info.var, entry)) {
1099			vmlfb_set_par_locked(entry);
1100			list_add_tail(list, &global_has_mode);
1101		} else {
1102
1103			/*
1104			 * Didn't work. Try to find another mode,
1105			 * that matches this subsys.
1106			 */
1107
1108			mutex_unlock(&vml_mutex);
1109			save_activate = entry->info.var.activate;
1110			entry->info.var.bits_per_pixel = 16;
1111			vmlfb_set_pref_pixel_format(&entry->info.var);
1112			if (fb_find_mode(&entry->info.var,
1113					 &entry->info,
1114					 vml_default_mode, NULL, 0, NULL, 16)) {
1115				entry->info.var.activate |=
1116				    FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
1117				fb_set_var(&entry->info, &entry->info.var);
1118			} else {
1119				printk(KERN_ERR MODULE_NAME
1120				       ": Sorry. no mode found for this subsys.\n");
1121			}
1122			entry->info.var.activate = save_activate;
1123			mutex_lock(&vml_mutex);
1124		}
1125		vmlfb_blank_locked(entry);
1126		list = global_no_mode.next;
1127	}
1128	mutex_unlock(&vml_mutex);
1129
1130	printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n",
1131				subsys->name ? subsys->name : "unknown");
1132	return 0;
1133}
1134
1135EXPORT_SYMBOL_GPL(vmlfb_register_subsys);
1136
1137void vmlfb_unregister_subsys(struct vml_sys *sys)
1138{
1139	struct vml_info *entry, *next;
1140
1141	mutex_lock(&vml_mutex);
1142	if (subsys != sys) {
1143		mutex_unlock(&vml_mutex);
1144		return;
1145	}
1146	subsys->restore(subsys);
1147	subsys = NULL;
1148	list_for_each_entry_safe(entry, next, &global_has_mode, head) {
1149		printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n");
1150		vmlfb_disable_pipe(entry);
1151		list_move_tail(&entry->head, &global_no_mode);
1152	}
1153	mutex_unlock(&vml_mutex);
1154}
1155
1156EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys);
1157
1158module_init(vmlfb_init);
1159module_exit(vmlfb_cleanup);
1160
1161MODULE_AUTHOR("Tungsten Graphics");
1162MODULE_DESCRIPTION("Initialization of the Vermilion display devices");
1163MODULE_VERSION("1.0.0");
1164MODULE_LICENSE("GPL");
1165