18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_INIT 38c2ecf20Sopenharmony_ci bool 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS 68c2ecf20Sopenharmony_ci tristate 78c2ecf20Sopenharmony_ci select VIDEOMODE_HELPERS 88c2ecf20Sopenharmony_ci select FB_OMAP2_DSS_INIT 98c2ecf20Sopenharmony_ci select HDMI 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_DEBUG 128c2ecf20Sopenharmony_ci bool "Debug support" 138c2ecf20Sopenharmony_ci help 148c2ecf20Sopenharmony_ci This enables printing of debug messages. Alternatively, debug messages 158c2ecf20Sopenharmony_ci can also be enabled by setting CONFIG_DYNAMIC_DEBUG and then setting 168c2ecf20Sopenharmony_ci appropriate flags in <debugfs>/dynamic_debug/control. 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_DEBUGFS 198c2ecf20Sopenharmony_ci bool "Debugfs filesystem support" 208c2ecf20Sopenharmony_ci depends on DEBUG_FS 218c2ecf20Sopenharmony_ci help 228c2ecf20Sopenharmony_ci This enables debugfs for OMAPDSS at <debugfs>/omapdss. This enables 238c2ecf20Sopenharmony_ci querying about clock configuration and register configuration of dss, 248c2ecf20Sopenharmony_ci dispc, dsi, hdmi and rfbi. 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_COLLECT_IRQ_STATS 278c2ecf20Sopenharmony_ci bool "Collect DSS IRQ statistics" 288c2ecf20Sopenharmony_ci depends on FB_OMAP2_DSS_DEBUGFS 298c2ecf20Sopenharmony_ci help 308c2ecf20Sopenharmony_ci Collect DSS IRQ statistics, printable via debugfs. 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci The statistics can be found from 338c2ecf20Sopenharmony_ci <debugfs>/omapdss/dispc_irq for DISPC interrupts, and 348c2ecf20Sopenharmony_ci <debugfs>/omapdss/dsi_irq for DSI interrupts. 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_DPI 378c2ecf20Sopenharmony_ci bool "DPI support" 388c2ecf20Sopenharmony_ci default y 398c2ecf20Sopenharmony_ci help 408c2ecf20Sopenharmony_ci DPI Interface. This is the Parallel Display Interface. 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_VENC 438c2ecf20Sopenharmony_ci bool "VENC support" 448c2ecf20Sopenharmony_ci default y 458c2ecf20Sopenharmony_ci help 468c2ecf20Sopenharmony_ci OMAP Video Encoder support for S-Video and composite TV-out. 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_HDMI_COMMON 498c2ecf20Sopenharmony_ci bool 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ciconfig FB_OMAP4_DSS_HDMI 528c2ecf20Sopenharmony_ci bool "HDMI support for OMAP4" 538c2ecf20Sopenharmony_ci default y 548c2ecf20Sopenharmony_ci select FB_OMAP2_DSS_HDMI_COMMON 558c2ecf20Sopenharmony_ci help 568c2ecf20Sopenharmony_ci HDMI support for OMAP4 based SoCs. 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ciconfig FB_OMAP5_DSS_HDMI 598c2ecf20Sopenharmony_ci bool "HDMI support for OMAP5" 608c2ecf20Sopenharmony_ci select FB_OMAP2_DSS_HDMI_COMMON 618c2ecf20Sopenharmony_ci help 628c2ecf20Sopenharmony_ci HDMI Interface for OMAP5 and similar cores. This adds the High 638c2ecf20Sopenharmony_ci Definition Multimedia Interface. See https://www.hdmi.org/ for HDMI 648c2ecf20Sopenharmony_ci specification. 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_SDI 678c2ecf20Sopenharmony_ci bool "SDI support" 688c2ecf20Sopenharmony_ci help 698c2ecf20Sopenharmony_ci SDI (Serial Display Interface) support. 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci SDI is a high speed one-way display serial bus between the host 728c2ecf20Sopenharmony_ci processor and a display. 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_DSI 758c2ecf20Sopenharmony_ci bool "DSI support" 768c2ecf20Sopenharmony_ci help 778c2ecf20Sopenharmony_ci MIPI DSI (Display Serial Interface) support. 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci DSI is a high speed half-duplex serial interface between the host 808c2ecf20Sopenharmony_ci processor and a peripheral, such as a display or a framebuffer chip. 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci See https://www.mipi.org/ for DSI specifications. 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_MIN_FCK_PER_PCK 858c2ecf20Sopenharmony_ci int "Minimum FCK/PCK ratio (for scaling)" 868c2ecf20Sopenharmony_ci range 0 32 878c2ecf20Sopenharmony_ci default 0 888c2ecf20Sopenharmony_ci help 898c2ecf20Sopenharmony_ci This can be used to adjust the minimum FCK/PCK ratio. 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci With this you can make sure that DISPC FCK is at least 928c2ecf20Sopenharmony_ci n x PCK. Video plane scaling requires higher FCK than 938c2ecf20Sopenharmony_ci normally. 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci If this is set to 0, there's no extra constraint on the 968c2ecf20Sopenharmony_ci DISPC FCK. However, the FCK will at minimum be 978c2ecf20Sopenharmony_ci 2xPCK (if active matrix) or 3xPCK (if passive matrix). 988c2ecf20Sopenharmony_ci 998c2ecf20Sopenharmony_ci Max FCK is 173MHz, so this doesn't work if your PCK 1008c2ecf20Sopenharmony_ci is very high. 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ciconfig FB_OMAP2_DSS_SLEEP_AFTER_VENC_RESET 1038c2ecf20Sopenharmony_ci bool "Sleep 20ms after VENC reset" 1048c2ecf20Sopenharmony_ci default y 1058c2ecf20Sopenharmony_ci help 1068c2ecf20Sopenharmony_ci There is a 20ms sleep after VENC reset which seemed to fix the 1078c2ecf20Sopenharmony_ci reset. The reason for the bug is unclear, and it's also unclear 1088c2ecf20Sopenharmony_ci on what platforms this happens. 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci This option enables the sleep, and is enabled by default. You can 1118c2ecf20Sopenharmony_ci disable the sleep if it doesn't cause problems on your platform. 112