18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci#include "radeonfb.h"
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ci#include <linux/slab.h>
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci#include "../edid.h"
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_cistatic const struct fb_var_screeninfo radeonfb_default_var = {
98c2ecf20Sopenharmony_ci	.xres		= 640,
108c2ecf20Sopenharmony_ci	.yres		= 480,
118c2ecf20Sopenharmony_ci	.xres_virtual	= 640,
128c2ecf20Sopenharmony_ci	.yres_virtual	= 480,
138c2ecf20Sopenharmony_ci	.bits_per_pixel = 8,
148c2ecf20Sopenharmony_ci	.red		= { .length = 8 },
158c2ecf20Sopenharmony_ci	.green		= { .length = 8 },
168c2ecf20Sopenharmony_ci	.blue		= { .length = 8 },
178c2ecf20Sopenharmony_ci	.activate	= FB_ACTIVATE_NOW,
188c2ecf20Sopenharmony_ci	.height		= -1,
198c2ecf20Sopenharmony_ci	.width		= -1,
208c2ecf20Sopenharmony_ci	.pixclock	= 39721,
218c2ecf20Sopenharmony_ci	.left_margin	= 40,
228c2ecf20Sopenharmony_ci	.right_margin	= 24,
238c2ecf20Sopenharmony_ci	.upper_margin	= 32,
248c2ecf20Sopenharmony_ci	.lower_margin	= 11,
258c2ecf20Sopenharmony_ci	.hsync_len	= 96,
268c2ecf20Sopenharmony_ci	.vsync_len	= 2,
278c2ecf20Sopenharmony_ci	.vmode		= FB_VMODE_NONINTERLACED
288c2ecf20Sopenharmony_ci};
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_cistatic char *radeon_get_mon_name(int type)
318c2ecf20Sopenharmony_ci{
328c2ecf20Sopenharmony_ci	char *pret = NULL;
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci	switch (type) {
358c2ecf20Sopenharmony_ci		case MT_NONE:
368c2ecf20Sopenharmony_ci			pret = "no";
378c2ecf20Sopenharmony_ci			break;
388c2ecf20Sopenharmony_ci		case MT_CRT:
398c2ecf20Sopenharmony_ci			pret = "CRT";
408c2ecf20Sopenharmony_ci			break;
418c2ecf20Sopenharmony_ci		case MT_DFP:
428c2ecf20Sopenharmony_ci			pret = "DFP";
438c2ecf20Sopenharmony_ci			break;
448c2ecf20Sopenharmony_ci		case MT_LCD:
458c2ecf20Sopenharmony_ci			pret = "LCD";
468c2ecf20Sopenharmony_ci			break;
478c2ecf20Sopenharmony_ci		case MT_CTV:
488c2ecf20Sopenharmony_ci			pret = "CTV";
498c2ecf20Sopenharmony_ci			break;
508c2ecf20Sopenharmony_ci		case MT_STV:
518c2ecf20Sopenharmony_ci			pret = "STV";
528c2ecf20Sopenharmony_ci			break;
538c2ecf20Sopenharmony_ci	}
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	return pret;
568c2ecf20Sopenharmony_ci}
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
608c2ecf20Sopenharmony_ci/*
618c2ecf20Sopenharmony_ci * Try to find monitor informations & EDID data out of the Open Firmware
628c2ecf20Sopenharmony_ci * device-tree. This also contains some "hacks" to work around a few machine
638c2ecf20Sopenharmony_ci * models with broken OF probing by hard-coding known EDIDs for some Mac
648c2ecf20Sopenharmony_ci * laptops internal LVDS panel. (XXX: not done yet)
658c2ecf20Sopenharmony_ci */
668c2ecf20Sopenharmony_cistatic int radeon_parse_montype_prop(struct device_node *dp, u8 **out_EDID,
678c2ecf20Sopenharmony_ci				     int hdno)
688c2ecf20Sopenharmony_ci{
698c2ecf20Sopenharmony_ci        static char *propnames[] = { "DFP,EDID", "LCD,EDID", "EDID",
708c2ecf20Sopenharmony_ci				     "EDID1", "EDID2",  NULL };
718c2ecf20Sopenharmony_ci	const u8 *pedid = NULL;
728c2ecf20Sopenharmony_ci	const u8 *pmt = NULL;
738c2ecf20Sopenharmony_ci	u8 *tmp;
748c2ecf20Sopenharmony_ci        int i, mt = MT_NONE;
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci	pr_debug("analyzing OF properties...\n");
778c2ecf20Sopenharmony_ci	pmt = of_get_property(dp, "display-type", NULL);
788c2ecf20Sopenharmony_ci	if (!pmt)
798c2ecf20Sopenharmony_ci		return MT_NONE;
808c2ecf20Sopenharmony_ci	pr_debug("display-type: %s\n", pmt);
818c2ecf20Sopenharmony_ci	/* OF says "LCD" for DFP as well, we discriminate from the caller of this
828c2ecf20Sopenharmony_ci	 * function
838c2ecf20Sopenharmony_ci	 */
848c2ecf20Sopenharmony_ci	if (!strcmp(pmt, "LCD") || !strcmp(pmt, "DFP"))
858c2ecf20Sopenharmony_ci		mt = MT_DFP;
868c2ecf20Sopenharmony_ci	else if (!strcmp(pmt, "CRT"))
878c2ecf20Sopenharmony_ci		mt = MT_CRT;
888c2ecf20Sopenharmony_ci	else {
898c2ecf20Sopenharmony_ci		if (strcmp(pmt, "NONE") != 0)
908c2ecf20Sopenharmony_ci			printk(KERN_WARNING "radeonfb: Unknown OF display-type: %s\n",
918c2ecf20Sopenharmony_ci			       pmt);
928c2ecf20Sopenharmony_ci		return MT_NONE;
938c2ecf20Sopenharmony_ci	}
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci	for (i = 0; propnames[i] != NULL; ++i) {
968c2ecf20Sopenharmony_ci		pedid = of_get_property(dp, propnames[i], NULL);
978c2ecf20Sopenharmony_ci		if (pedid != NULL)
988c2ecf20Sopenharmony_ci			break;
998c2ecf20Sopenharmony_ci	}
1008c2ecf20Sopenharmony_ci	/* We didn't find the EDID in the leaf node, some cards will actually
1018c2ecf20Sopenharmony_ci	 * put EDID1/EDID2 in the parent, look for these (typically M6 tipb).
1028c2ecf20Sopenharmony_ci	 * single-head cards have hdno == -1 and skip this step
1038c2ecf20Sopenharmony_ci	 */
1048c2ecf20Sopenharmony_ci	if (pedid == NULL && dp->parent && (hdno != -1))
1058c2ecf20Sopenharmony_ci		pedid = of_get_property(dp->parent,
1068c2ecf20Sopenharmony_ci				(hdno == 0) ? "EDID1" : "EDID2", NULL);
1078c2ecf20Sopenharmony_ci	if (pedid == NULL && dp->parent && (hdno == 0))
1088c2ecf20Sopenharmony_ci		pedid = of_get_property(dp->parent, "EDID", NULL);
1098c2ecf20Sopenharmony_ci	if (pedid == NULL)
1108c2ecf20Sopenharmony_ci		return mt;
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci	tmp = kmemdup(pedid, EDID_LENGTH, GFP_KERNEL);
1138c2ecf20Sopenharmony_ci	if (!tmp)
1148c2ecf20Sopenharmony_ci		return mt;
1158c2ecf20Sopenharmony_ci	*out_EDID = tmp;
1168c2ecf20Sopenharmony_ci	return mt;
1178c2ecf20Sopenharmony_ci}
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_cistatic int radeon_probe_OF_head(struct radeonfb_info *rinfo, int head_no,
1208c2ecf20Sopenharmony_ci				u8 **out_EDID)
1218c2ecf20Sopenharmony_ci{
1228c2ecf20Sopenharmony_ci        struct device_node *dp;
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_ci	pr_debug("radeon_probe_OF_head\n");
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ci        dp = rinfo->of_node;
1278c2ecf20Sopenharmony_ci        while (dp == NULL)
1288c2ecf20Sopenharmony_ci		return MT_NONE;
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_ci	if (rinfo->has_CRTC2) {
1318c2ecf20Sopenharmony_ci		const char *pname;
1328c2ecf20Sopenharmony_ci		int len, second = 0;
1338c2ecf20Sopenharmony_ci
1348c2ecf20Sopenharmony_ci		dp = dp->child;
1358c2ecf20Sopenharmony_ci		do {
1368c2ecf20Sopenharmony_ci			if (!dp)
1378c2ecf20Sopenharmony_ci				return MT_NONE;
1388c2ecf20Sopenharmony_ci			pname = of_get_property(dp, "name", NULL);
1398c2ecf20Sopenharmony_ci			if (!pname)
1408c2ecf20Sopenharmony_ci				return MT_NONE;
1418c2ecf20Sopenharmony_ci			len = strlen(pname);
1428c2ecf20Sopenharmony_ci			pr_debug("head: %s (letter: %c, head_no: %d)\n",
1438c2ecf20Sopenharmony_ci			       pname, pname[len-1], head_no);
1448c2ecf20Sopenharmony_ci			if (pname[len-1] == 'A' && head_no == 0) {
1458c2ecf20Sopenharmony_ci				int mt = radeon_parse_montype_prop(dp, out_EDID, 0);
1468c2ecf20Sopenharmony_ci				/* Maybe check for LVDS_GEN_CNTL here ? I need to check out
1478c2ecf20Sopenharmony_ci				 * what OF does when booting with lid closed
1488c2ecf20Sopenharmony_ci				 */
1498c2ecf20Sopenharmony_ci				if (mt == MT_DFP && rinfo->is_mobility)
1508c2ecf20Sopenharmony_ci					mt = MT_LCD;
1518c2ecf20Sopenharmony_ci				return mt;
1528c2ecf20Sopenharmony_ci			} else if (pname[len-1] == 'B' && head_no == 1)
1538c2ecf20Sopenharmony_ci				return radeon_parse_montype_prop(dp, out_EDID, 1);
1548c2ecf20Sopenharmony_ci			second = 1;
1558c2ecf20Sopenharmony_ci			dp = dp->sibling;
1568c2ecf20Sopenharmony_ci		} while(!second);
1578c2ecf20Sopenharmony_ci	} else {
1588c2ecf20Sopenharmony_ci		if (head_no > 0)
1598c2ecf20Sopenharmony_ci			return MT_NONE;
1608c2ecf20Sopenharmony_ci		return radeon_parse_montype_prop(dp, out_EDID, -1);
1618c2ecf20Sopenharmony_ci	}
1628c2ecf20Sopenharmony_ci        return MT_NONE;
1638c2ecf20Sopenharmony_ci}
1648c2ecf20Sopenharmony_ci#endif /* CONFIG_PPC || CONFIG_SPARC */
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci
1678c2ecf20Sopenharmony_cistatic int radeon_get_panel_info_BIOS(struct radeonfb_info *rinfo)
1688c2ecf20Sopenharmony_ci{
1698c2ecf20Sopenharmony_ci	unsigned long tmp, tmp0;
1708c2ecf20Sopenharmony_ci	char stmp[30];
1718c2ecf20Sopenharmony_ci	int i;
1728c2ecf20Sopenharmony_ci
1738c2ecf20Sopenharmony_ci	if (!rinfo->bios_seg)
1748c2ecf20Sopenharmony_ci		return 0;
1758c2ecf20Sopenharmony_ci
1768c2ecf20Sopenharmony_ci	if (!(tmp = BIOS_IN16(rinfo->fp_bios_start + 0x40))) {
1778c2ecf20Sopenharmony_ci		printk(KERN_ERR "radeonfb: Failed to detect DFP panel info using BIOS\n");
1788c2ecf20Sopenharmony_ci		rinfo->panel_info.pwr_delay = 200;
1798c2ecf20Sopenharmony_ci		return 0;
1808c2ecf20Sopenharmony_ci	}
1818c2ecf20Sopenharmony_ci
1828c2ecf20Sopenharmony_ci	for(i=0; i<24; i++)
1838c2ecf20Sopenharmony_ci		stmp[i] = BIOS_IN8(tmp+i+1);
1848c2ecf20Sopenharmony_ci	stmp[24] = 0;
1858c2ecf20Sopenharmony_ci	printk("radeonfb: panel ID string: %s\n", stmp);
1868c2ecf20Sopenharmony_ci	rinfo->panel_info.xres = BIOS_IN16(tmp + 25);
1878c2ecf20Sopenharmony_ci	rinfo->panel_info.yres = BIOS_IN16(tmp + 27);
1888c2ecf20Sopenharmony_ci	printk("radeonfb: detected LVDS panel size from BIOS: %dx%d\n",
1898c2ecf20Sopenharmony_ci		rinfo->panel_info.xres, rinfo->panel_info.yres);
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ci	rinfo->panel_info.pwr_delay = BIOS_IN16(tmp + 44);
1928c2ecf20Sopenharmony_ci	pr_debug("BIOS provided panel power delay: %d\n", rinfo->panel_info.pwr_delay);
1938c2ecf20Sopenharmony_ci	if (rinfo->panel_info.pwr_delay > 2000 || rinfo->panel_info.pwr_delay <= 0)
1948c2ecf20Sopenharmony_ci		rinfo->panel_info.pwr_delay = 2000;
1958c2ecf20Sopenharmony_ci
1968c2ecf20Sopenharmony_ci	/*
1978c2ecf20Sopenharmony_ci	 * Some panels only work properly with some divider combinations
1988c2ecf20Sopenharmony_ci	 */
1998c2ecf20Sopenharmony_ci	rinfo->panel_info.ref_divider = BIOS_IN16(tmp + 46);
2008c2ecf20Sopenharmony_ci	rinfo->panel_info.post_divider = BIOS_IN8(tmp + 48);
2018c2ecf20Sopenharmony_ci	rinfo->panel_info.fbk_divider = BIOS_IN16(tmp + 49);
2028c2ecf20Sopenharmony_ci	if (rinfo->panel_info.ref_divider != 0 &&
2038c2ecf20Sopenharmony_ci	    rinfo->panel_info.fbk_divider > 3) {
2048c2ecf20Sopenharmony_ci		rinfo->panel_info.use_bios_dividers = 1;
2058c2ecf20Sopenharmony_ci		printk(KERN_INFO "radeondb: BIOS provided dividers will be used\n");
2068c2ecf20Sopenharmony_ci		pr_debug("ref_divider = %x\n", rinfo->panel_info.ref_divider);
2078c2ecf20Sopenharmony_ci		pr_debug("post_divider = %x\n", rinfo->panel_info.post_divider);
2088c2ecf20Sopenharmony_ci		pr_debug("fbk_divider = %x\n", rinfo->panel_info.fbk_divider);
2098c2ecf20Sopenharmony_ci	}
2108c2ecf20Sopenharmony_ci	pr_debug("Scanning BIOS table ...\n");
2118c2ecf20Sopenharmony_ci	for(i=0; i<32; i++) {
2128c2ecf20Sopenharmony_ci		tmp0 = BIOS_IN16(tmp+64+i*2);
2138c2ecf20Sopenharmony_ci		if (tmp0 == 0)
2148c2ecf20Sopenharmony_ci			break;
2158c2ecf20Sopenharmony_ci		pr_debug(" %d x %d\n", BIOS_IN16(tmp0), BIOS_IN16(tmp0+2));
2168c2ecf20Sopenharmony_ci		if ((BIOS_IN16(tmp0) == rinfo->panel_info.xres) &&
2178c2ecf20Sopenharmony_ci		    (BIOS_IN16(tmp0+2) == rinfo->panel_info.yres)) {
2188c2ecf20Sopenharmony_ci			rinfo->panel_info.hblank = (BIOS_IN16(tmp0+17) - BIOS_IN16(tmp0+19)) * 8;
2198c2ecf20Sopenharmony_ci			rinfo->panel_info.hOver_plus = ((BIOS_IN16(tmp0+21) -
2208c2ecf20Sopenharmony_ci							 BIOS_IN16(tmp0+19) -1) * 8) & 0x7fff;
2218c2ecf20Sopenharmony_ci			rinfo->panel_info.hSync_width = BIOS_IN8(tmp0+23) * 8;
2228c2ecf20Sopenharmony_ci			rinfo->panel_info.vblank = BIOS_IN16(tmp0+24) - BIOS_IN16(tmp0+26);
2238c2ecf20Sopenharmony_ci			rinfo->panel_info.vOver_plus = (BIOS_IN16(tmp0+28) & 0x7ff) - BIOS_IN16(tmp0+26);
2248c2ecf20Sopenharmony_ci			rinfo->panel_info.vSync_width = (BIOS_IN16(tmp0+28) & 0xf800) >> 11;
2258c2ecf20Sopenharmony_ci			rinfo->panel_info.clock = BIOS_IN16(tmp0+9);
2268c2ecf20Sopenharmony_ci			/* Assume high active syncs for now until ATI tells me more... maybe we
2278c2ecf20Sopenharmony_ci			 * can probe register values here ?
2288c2ecf20Sopenharmony_ci			 */
2298c2ecf20Sopenharmony_ci			rinfo->panel_info.hAct_high = 1;
2308c2ecf20Sopenharmony_ci			rinfo->panel_info.vAct_high = 1;
2318c2ecf20Sopenharmony_ci			/* Mark panel infos valid */
2328c2ecf20Sopenharmony_ci			rinfo->panel_info.valid = 1;
2338c2ecf20Sopenharmony_ci
2348c2ecf20Sopenharmony_ci			pr_debug("Found panel in BIOS table:\n");
2358c2ecf20Sopenharmony_ci			pr_debug("  hblank: %d\n", rinfo->panel_info.hblank);
2368c2ecf20Sopenharmony_ci			pr_debug("  hOver_plus: %d\n", rinfo->panel_info.hOver_plus);
2378c2ecf20Sopenharmony_ci			pr_debug("  hSync_width: %d\n", rinfo->panel_info.hSync_width);
2388c2ecf20Sopenharmony_ci			pr_debug("  vblank: %d\n", rinfo->panel_info.vblank);
2398c2ecf20Sopenharmony_ci			pr_debug("  vOver_plus: %d\n", rinfo->panel_info.vOver_plus);
2408c2ecf20Sopenharmony_ci			pr_debug("  vSync_width: %d\n", rinfo->panel_info.vSync_width);
2418c2ecf20Sopenharmony_ci			pr_debug("  clock: %d\n", rinfo->panel_info.clock);
2428c2ecf20Sopenharmony_ci
2438c2ecf20Sopenharmony_ci			return 1;
2448c2ecf20Sopenharmony_ci		}
2458c2ecf20Sopenharmony_ci	}
2468c2ecf20Sopenharmony_ci	pr_debug("Didn't find panel in BIOS table !\n");
2478c2ecf20Sopenharmony_ci
2488c2ecf20Sopenharmony_ci	return 0;
2498c2ecf20Sopenharmony_ci}
2508c2ecf20Sopenharmony_ci
2518c2ecf20Sopenharmony_ci/* Try to extract the connector informations from the BIOS. This
2528c2ecf20Sopenharmony_ci * doesn't quite work yet, but it's output is still useful for
2538c2ecf20Sopenharmony_ci * debugging
2548c2ecf20Sopenharmony_ci */
2558c2ecf20Sopenharmony_cistatic void radeon_parse_connector_info(struct radeonfb_info *rinfo)
2568c2ecf20Sopenharmony_ci{
2578c2ecf20Sopenharmony_ci	int offset, chips, connectors, tmp, i, conn, type;
2588c2ecf20Sopenharmony_ci
2598c2ecf20Sopenharmony_ci	static char* __conn_type_table[16] = {
2608c2ecf20Sopenharmony_ci		"NONE", "Proprietary", "CRT", "DVI-I", "DVI-D", "Unknown", "Unknown",
2618c2ecf20Sopenharmony_ci		"Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
2628c2ecf20Sopenharmony_ci		"Unknown", "Unknown", "Unknown"
2638c2ecf20Sopenharmony_ci	};
2648c2ecf20Sopenharmony_ci
2658c2ecf20Sopenharmony_ci	if (!rinfo->bios_seg)
2668c2ecf20Sopenharmony_ci		return;
2678c2ecf20Sopenharmony_ci
2688c2ecf20Sopenharmony_ci	offset = BIOS_IN16(rinfo->fp_bios_start + 0x50);
2698c2ecf20Sopenharmony_ci	if (offset == 0) {
2708c2ecf20Sopenharmony_ci		printk(KERN_WARNING "radeonfb: No connector info table detected\n");
2718c2ecf20Sopenharmony_ci		return;
2728c2ecf20Sopenharmony_ci	}
2738c2ecf20Sopenharmony_ci
2748c2ecf20Sopenharmony_ci	/* Don't do much more at this point but displaying the data if
2758c2ecf20Sopenharmony_ci	 * DEBUG is enabled
2768c2ecf20Sopenharmony_ci	 */
2778c2ecf20Sopenharmony_ci	chips = BIOS_IN8(offset++) >> 4;
2788c2ecf20Sopenharmony_ci	pr_debug("%d chips in connector info\n", chips);
2798c2ecf20Sopenharmony_ci	for (i = 0; i < chips; i++) {
2808c2ecf20Sopenharmony_ci		tmp = BIOS_IN8(offset++);
2818c2ecf20Sopenharmony_ci		connectors = tmp & 0x0f;
2828c2ecf20Sopenharmony_ci		pr_debug(" - chip %d has %d connectors\n", tmp >> 4, connectors);
2838c2ecf20Sopenharmony_ci		for (conn = 0; ; conn++) {
2848c2ecf20Sopenharmony_ci			tmp = BIOS_IN16(offset);
2858c2ecf20Sopenharmony_ci			if (tmp == 0)
2868c2ecf20Sopenharmony_ci				break;
2878c2ecf20Sopenharmony_ci			offset += 2;
2888c2ecf20Sopenharmony_ci			type = (tmp >> 12) & 0x0f;
2898c2ecf20Sopenharmony_ci			pr_debug("  * connector %d of type %d (%s) : %04x\n",
2908c2ecf20Sopenharmony_ci			       conn, type, __conn_type_table[type], tmp);
2918c2ecf20Sopenharmony_ci		}
2928c2ecf20Sopenharmony_ci	}
2938c2ecf20Sopenharmony_ci}
2948c2ecf20Sopenharmony_ci
2958c2ecf20Sopenharmony_ci
2968c2ecf20Sopenharmony_ci/*
2978c2ecf20Sopenharmony_ci * Probe physical connection of a CRT. This code comes from XFree
2988c2ecf20Sopenharmony_ci * as well and currently is only implemented for the CRT DAC, the
2998c2ecf20Sopenharmony_ci * code for the TVDAC is commented out in XFree as "non working"
3008c2ecf20Sopenharmony_ci */
3018c2ecf20Sopenharmony_cistatic int radeon_crt_is_connected(struct radeonfb_info *rinfo, int is_crt_dac)
3028c2ecf20Sopenharmony_ci{
3038c2ecf20Sopenharmony_ci    int	          connected = 0;
3048c2ecf20Sopenharmony_ci
3058c2ecf20Sopenharmony_ci    /* the monitor either wasn't connected or it is a non-DDC CRT.
3068c2ecf20Sopenharmony_ci     * try to probe it
3078c2ecf20Sopenharmony_ci     */
3088c2ecf20Sopenharmony_ci    if (is_crt_dac) {
3098c2ecf20Sopenharmony_ci	unsigned long ulOrigVCLK_ECP_CNTL;
3108c2ecf20Sopenharmony_ci	unsigned long ulOrigDAC_CNTL;
3118c2ecf20Sopenharmony_ci	unsigned long ulOrigDAC_EXT_CNTL;
3128c2ecf20Sopenharmony_ci	unsigned long ulOrigCRTC_EXT_CNTL;
3138c2ecf20Sopenharmony_ci	unsigned long ulData;
3148c2ecf20Sopenharmony_ci	unsigned long ulMask;
3158c2ecf20Sopenharmony_ci
3168c2ecf20Sopenharmony_ci	ulOrigVCLK_ECP_CNTL = INPLL(VCLK_ECP_CNTL);
3178c2ecf20Sopenharmony_ci
3188c2ecf20Sopenharmony_ci	ulData              = ulOrigVCLK_ECP_CNTL;
3198c2ecf20Sopenharmony_ci	ulData             &= ~(PIXCLK_ALWAYS_ONb
3208c2ecf20Sopenharmony_ci				| PIXCLK_DAC_ALWAYS_ONb);
3218c2ecf20Sopenharmony_ci	ulMask              = ~(PIXCLK_ALWAYS_ONb
3228c2ecf20Sopenharmony_ci				| PIXCLK_DAC_ALWAYS_ONb);
3238c2ecf20Sopenharmony_ci	OUTPLLP(VCLK_ECP_CNTL, ulData, ulMask);
3248c2ecf20Sopenharmony_ci
3258c2ecf20Sopenharmony_ci	ulOrigCRTC_EXT_CNTL = INREG(CRTC_EXT_CNTL);
3268c2ecf20Sopenharmony_ci	ulData              = ulOrigCRTC_EXT_CNTL;
3278c2ecf20Sopenharmony_ci	ulData             |= CRTC_CRT_ON;
3288c2ecf20Sopenharmony_ci	OUTREG(CRTC_EXT_CNTL, ulData);
3298c2ecf20Sopenharmony_ci
3308c2ecf20Sopenharmony_ci	ulOrigDAC_EXT_CNTL = INREG(DAC_EXT_CNTL);
3318c2ecf20Sopenharmony_ci	ulData             = ulOrigDAC_EXT_CNTL;
3328c2ecf20Sopenharmony_ci	ulData            &= ~DAC_FORCE_DATA_MASK;
3338c2ecf20Sopenharmony_ci	ulData            |=  (DAC_FORCE_BLANK_OFF_EN
3348c2ecf20Sopenharmony_ci			       |DAC_FORCE_DATA_EN
3358c2ecf20Sopenharmony_ci			       |DAC_FORCE_DATA_SEL_MASK);
3368c2ecf20Sopenharmony_ci	if ((rinfo->family == CHIP_FAMILY_RV250) ||
3378c2ecf20Sopenharmony_ci	    (rinfo->family == CHIP_FAMILY_RV280))
3388c2ecf20Sopenharmony_ci	    ulData |= (0x01b6 << DAC_FORCE_DATA_SHIFT);
3398c2ecf20Sopenharmony_ci	else
3408c2ecf20Sopenharmony_ci	    ulData |= (0x01ac << DAC_FORCE_DATA_SHIFT);
3418c2ecf20Sopenharmony_ci
3428c2ecf20Sopenharmony_ci	OUTREG(DAC_EXT_CNTL, ulData);
3438c2ecf20Sopenharmony_ci
3448c2ecf20Sopenharmony_ci	ulOrigDAC_CNTL     = INREG(DAC_CNTL);
3458c2ecf20Sopenharmony_ci	ulData             = ulOrigDAC_CNTL;
3468c2ecf20Sopenharmony_ci	ulData            |= DAC_CMP_EN;
3478c2ecf20Sopenharmony_ci	ulData            &= ~(DAC_RANGE_CNTL_MASK
3488c2ecf20Sopenharmony_ci			       | DAC_PDWN);
3498c2ecf20Sopenharmony_ci	ulData            |= 0x2;
3508c2ecf20Sopenharmony_ci	OUTREG(DAC_CNTL, ulData);
3518c2ecf20Sopenharmony_ci
3528c2ecf20Sopenharmony_ci	mdelay(1);
3538c2ecf20Sopenharmony_ci
3548c2ecf20Sopenharmony_ci	ulData     = INREG(DAC_CNTL);
3558c2ecf20Sopenharmony_ci	connected =  (DAC_CMP_OUTPUT & ulData) ? 1 : 0;
3568c2ecf20Sopenharmony_ci
3578c2ecf20Sopenharmony_ci	ulData    = ulOrigVCLK_ECP_CNTL;
3588c2ecf20Sopenharmony_ci	ulMask    = 0xFFFFFFFFL;
3598c2ecf20Sopenharmony_ci	OUTPLLP(VCLK_ECP_CNTL, ulData, ulMask);
3608c2ecf20Sopenharmony_ci
3618c2ecf20Sopenharmony_ci	OUTREG(DAC_CNTL,      ulOrigDAC_CNTL     );
3628c2ecf20Sopenharmony_ci	OUTREG(DAC_EXT_CNTL,  ulOrigDAC_EXT_CNTL );
3638c2ecf20Sopenharmony_ci	OUTREG(CRTC_EXT_CNTL, ulOrigCRTC_EXT_CNTL);
3648c2ecf20Sopenharmony_ci    }
3658c2ecf20Sopenharmony_ci
3668c2ecf20Sopenharmony_ci    return connected ? MT_CRT : MT_NONE;
3678c2ecf20Sopenharmony_ci}
3688c2ecf20Sopenharmony_ci
3698c2ecf20Sopenharmony_ci/*
3708c2ecf20Sopenharmony_ci * Parse the "monitor_layout" string if any. This code is mostly
3718c2ecf20Sopenharmony_ci * copied from XFree's radeon driver
3728c2ecf20Sopenharmony_ci */
3738c2ecf20Sopenharmony_cistatic int radeon_parse_monitor_layout(struct radeonfb_info *rinfo,
3748c2ecf20Sopenharmony_ci				       const char *monitor_layout)
3758c2ecf20Sopenharmony_ci{
3768c2ecf20Sopenharmony_ci	char s1[5], s2[5];
3778c2ecf20Sopenharmony_ci	int i = 0, second = 0;
3788c2ecf20Sopenharmony_ci	const char *s;
3798c2ecf20Sopenharmony_ci
3808c2ecf20Sopenharmony_ci	if (!monitor_layout)
3818c2ecf20Sopenharmony_ci		return 0;
3828c2ecf20Sopenharmony_ci
3838c2ecf20Sopenharmony_ci	s = monitor_layout;
3848c2ecf20Sopenharmony_ci	do {
3858c2ecf20Sopenharmony_ci		switch(*s) {
3868c2ecf20Sopenharmony_ci		case ',':
3878c2ecf20Sopenharmony_ci			s1[i] = '\0';
3888c2ecf20Sopenharmony_ci			i = 0;
3898c2ecf20Sopenharmony_ci			second = 1;
3908c2ecf20Sopenharmony_ci			break;
3918c2ecf20Sopenharmony_ci		case ' ':
3928c2ecf20Sopenharmony_ci		case '\0':
3938c2ecf20Sopenharmony_ci			break;
3948c2ecf20Sopenharmony_ci		default:
3958c2ecf20Sopenharmony_ci			if (i > 4)
3968c2ecf20Sopenharmony_ci				break;
3978c2ecf20Sopenharmony_ci			if (second)
3988c2ecf20Sopenharmony_ci				s2[i] = *s;
3998c2ecf20Sopenharmony_ci			else
4008c2ecf20Sopenharmony_ci				s1[i] = *s;
4018c2ecf20Sopenharmony_ci			i++;
4028c2ecf20Sopenharmony_ci		}
4038c2ecf20Sopenharmony_ci
4048c2ecf20Sopenharmony_ci		if (i > 4)
4058c2ecf20Sopenharmony_ci			i = 4;
4068c2ecf20Sopenharmony_ci
4078c2ecf20Sopenharmony_ci	} while (*s++);
4088c2ecf20Sopenharmony_ci	if (second)
4098c2ecf20Sopenharmony_ci		s2[i] = 0;
4108c2ecf20Sopenharmony_ci	else {
4118c2ecf20Sopenharmony_ci		s1[i] = 0;
4128c2ecf20Sopenharmony_ci		s2[0] = 0;
4138c2ecf20Sopenharmony_ci	}
4148c2ecf20Sopenharmony_ci	if (strcmp(s1, "CRT") == 0)
4158c2ecf20Sopenharmony_ci		rinfo->mon1_type = MT_CRT;
4168c2ecf20Sopenharmony_ci	else if (strcmp(s1, "TMDS") == 0)
4178c2ecf20Sopenharmony_ci		rinfo->mon1_type = MT_DFP;
4188c2ecf20Sopenharmony_ci	else if (strcmp(s1, "LVDS") == 0)
4198c2ecf20Sopenharmony_ci		rinfo->mon1_type = MT_LCD;
4208c2ecf20Sopenharmony_ci
4218c2ecf20Sopenharmony_ci	if (strcmp(s2, "CRT") == 0)
4228c2ecf20Sopenharmony_ci		rinfo->mon2_type = MT_CRT;
4238c2ecf20Sopenharmony_ci	else if (strcmp(s2, "TMDS") == 0)
4248c2ecf20Sopenharmony_ci		rinfo->mon2_type = MT_DFP;
4258c2ecf20Sopenharmony_ci	else if (strcmp(s2, "LVDS") == 0)
4268c2ecf20Sopenharmony_ci		rinfo->mon2_type = MT_LCD;
4278c2ecf20Sopenharmony_ci
4288c2ecf20Sopenharmony_ci	return 1;
4298c2ecf20Sopenharmony_ci}
4308c2ecf20Sopenharmony_ci
4318c2ecf20Sopenharmony_ci/*
4328c2ecf20Sopenharmony_ci * Probe display on both primary and secondary card's connector (if any)
4338c2ecf20Sopenharmony_ci * by various available techniques (i2c, OF device tree, BIOS, ...) and
4348c2ecf20Sopenharmony_ci * try to retrieve EDID. The algorithm here comes from XFree's radeon
4358c2ecf20Sopenharmony_ci * driver
4368c2ecf20Sopenharmony_ci */
4378c2ecf20Sopenharmony_civoid radeon_probe_screens(struct radeonfb_info *rinfo,
4388c2ecf20Sopenharmony_ci			  const char *monitor_layout, int ignore_edid)
4398c2ecf20Sopenharmony_ci{
4408c2ecf20Sopenharmony_ci#ifdef CONFIG_FB_RADEON_I2C
4418c2ecf20Sopenharmony_ci	int ddc_crt2_used = 0;
4428c2ecf20Sopenharmony_ci#endif
4438c2ecf20Sopenharmony_ci	int tmp, i;
4448c2ecf20Sopenharmony_ci
4458c2ecf20Sopenharmony_ci	radeon_parse_connector_info(rinfo);
4468c2ecf20Sopenharmony_ci
4478c2ecf20Sopenharmony_ci	if (radeon_parse_monitor_layout(rinfo, monitor_layout)) {
4488c2ecf20Sopenharmony_ci
4498c2ecf20Sopenharmony_ci		/*
4508c2ecf20Sopenharmony_ci		 * If user specified a monitor_layout option, use it instead
4518c2ecf20Sopenharmony_ci		 * of auto-detecting. Maybe we should only use this argument
4528c2ecf20Sopenharmony_ci		 * on the first radeon card probed or provide a way to specify
4538c2ecf20Sopenharmony_ci		 * a layout for each card ?
4548c2ecf20Sopenharmony_ci		 */
4558c2ecf20Sopenharmony_ci
4568c2ecf20Sopenharmony_ci		pr_debug("Using specified monitor layout: %s", monitor_layout);
4578c2ecf20Sopenharmony_ci#ifdef CONFIG_FB_RADEON_I2C
4588c2ecf20Sopenharmony_ci		if (!ignore_edid) {
4598c2ecf20Sopenharmony_ci			if (rinfo->mon1_type != MT_NONE)
4608c2ecf20Sopenharmony_ci				if (!radeon_probe_i2c_connector(rinfo, ddc_dvi, &rinfo->mon1_EDID)) {
4618c2ecf20Sopenharmony_ci					radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon1_EDID);
4628c2ecf20Sopenharmony_ci					ddc_crt2_used = 1;
4638c2ecf20Sopenharmony_ci				}
4648c2ecf20Sopenharmony_ci			if (rinfo->mon2_type != MT_NONE)
4658c2ecf20Sopenharmony_ci				if (!radeon_probe_i2c_connector(rinfo, ddc_vga, &rinfo->mon2_EDID) &&
4668c2ecf20Sopenharmony_ci				    !ddc_crt2_used)
4678c2ecf20Sopenharmony_ci					radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon2_EDID);
4688c2ecf20Sopenharmony_ci		}
4698c2ecf20Sopenharmony_ci#endif /* CONFIG_FB_RADEON_I2C */
4708c2ecf20Sopenharmony_ci		if (rinfo->mon1_type == MT_NONE) {
4718c2ecf20Sopenharmony_ci			if (rinfo->mon2_type != MT_NONE) {
4728c2ecf20Sopenharmony_ci				rinfo->mon1_type = rinfo->mon2_type;
4738c2ecf20Sopenharmony_ci				rinfo->mon1_EDID = rinfo->mon2_EDID;
4748c2ecf20Sopenharmony_ci			} else {
4758c2ecf20Sopenharmony_ci				rinfo->mon1_type = MT_CRT;
4768c2ecf20Sopenharmony_ci				printk(KERN_INFO "radeonfb: No valid monitor, assuming CRT on first port\n");
4778c2ecf20Sopenharmony_ci			}
4788c2ecf20Sopenharmony_ci			rinfo->mon2_type = MT_NONE;
4798c2ecf20Sopenharmony_ci			rinfo->mon2_EDID = NULL;
4808c2ecf20Sopenharmony_ci		}
4818c2ecf20Sopenharmony_ci	} else {
4828c2ecf20Sopenharmony_ci		/*
4838c2ecf20Sopenharmony_ci		 * Auto-detecting display type (well... trying to ...)
4848c2ecf20Sopenharmony_ci		 */
4858c2ecf20Sopenharmony_ci
4868c2ecf20Sopenharmony_ci		pr_debug("Starting monitor auto detection...\n");
4878c2ecf20Sopenharmony_ci
4888c2ecf20Sopenharmony_ci#if defined(DEBUG) && defined(CONFIG_FB_RADEON_I2C)
4898c2ecf20Sopenharmony_ci		{
4908c2ecf20Sopenharmony_ci			u8 *EDIDs[4] = { NULL, NULL, NULL, NULL };
4918c2ecf20Sopenharmony_ci			int mon_types[4] = {MT_NONE, MT_NONE, MT_NONE, MT_NONE};
4928c2ecf20Sopenharmony_ci			int i;
4938c2ecf20Sopenharmony_ci
4948c2ecf20Sopenharmony_ci			for (i = 0; i < 4; i++)
4958c2ecf20Sopenharmony_ci				mon_types[i] = radeon_probe_i2c_connector(rinfo,
4968c2ecf20Sopenharmony_ci									  i+1, &EDIDs[i]);
4978c2ecf20Sopenharmony_ci		}
4988c2ecf20Sopenharmony_ci#endif /* DEBUG */
4998c2ecf20Sopenharmony_ci		/*
5008c2ecf20Sopenharmony_ci		 * Old single head cards
5018c2ecf20Sopenharmony_ci		 */
5028c2ecf20Sopenharmony_ci		if (!rinfo->has_CRTC2) {
5038c2ecf20Sopenharmony_ci#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
5048c2ecf20Sopenharmony_ci			if (rinfo->mon1_type == MT_NONE)
5058c2ecf20Sopenharmony_ci				rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0,
5068c2ecf20Sopenharmony_ci									&rinfo->mon1_EDID);
5078c2ecf20Sopenharmony_ci#endif /* CONFIG_PPC || CONFIG_SPARC */
5088c2ecf20Sopenharmony_ci#ifdef CONFIG_FB_RADEON_I2C
5098c2ecf20Sopenharmony_ci			if (rinfo->mon1_type == MT_NONE)
5108c2ecf20Sopenharmony_ci				rinfo->mon1_type =
5118c2ecf20Sopenharmony_ci					radeon_probe_i2c_connector(rinfo, ddc_dvi,
5128c2ecf20Sopenharmony_ci								   &rinfo->mon1_EDID);
5138c2ecf20Sopenharmony_ci			if (rinfo->mon1_type == MT_NONE)
5148c2ecf20Sopenharmony_ci				rinfo->mon1_type =
5158c2ecf20Sopenharmony_ci					radeon_probe_i2c_connector(rinfo, ddc_vga,
5168c2ecf20Sopenharmony_ci								   &rinfo->mon1_EDID);
5178c2ecf20Sopenharmony_ci			if (rinfo->mon1_type == MT_NONE)
5188c2ecf20Sopenharmony_ci				rinfo->mon1_type =
5198c2ecf20Sopenharmony_ci					radeon_probe_i2c_connector(rinfo, ddc_crt2,
5208c2ecf20Sopenharmony_ci								   &rinfo->mon1_EDID);
5218c2ecf20Sopenharmony_ci#endif /* CONFIG_FB_RADEON_I2C */
5228c2ecf20Sopenharmony_ci			if (rinfo->mon1_type == MT_NONE)
5238c2ecf20Sopenharmony_ci				rinfo->mon1_type = MT_CRT;
5248c2ecf20Sopenharmony_ci			goto bail;
5258c2ecf20Sopenharmony_ci		}
5268c2ecf20Sopenharmony_ci
5278c2ecf20Sopenharmony_ci		/*
5288c2ecf20Sopenharmony_ci		 * Check for cards with reversed DACs or TMDS controllers using BIOS
5298c2ecf20Sopenharmony_ci		 */
5308c2ecf20Sopenharmony_ci		if (rinfo->bios_seg &&
5318c2ecf20Sopenharmony_ci		    (tmp = BIOS_IN16(rinfo->fp_bios_start + 0x50))) {
5328c2ecf20Sopenharmony_ci			for (i = 1; i < 4; i++) {
5338c2ecf20Sopenharmony_ci				unsigned int tmp0;
5348c2ecf20Sopenharmony_ci
5358c2ecf20Sopenharmony_ci				if (!BIOS_IN8(tmp + i*2) && i > 1)
5368c2ecf20Sopenharmony_ci					break;
5378c2ecf20Sopenharmony_ci				tmp0 = BIOS_IN16(tmp + i*2);
5388c2ecf20Sopenharmony_ci				if ((!(tmp0 & 0x01)) && (((tmp0 >> 8) & 0x0f) == ddc_dvi)) {
5398c2ecf20Sopenharmony_ci					rinfo->reversed_DAC = 1;
5408c2ecf20Sopenharmony_ci					printk(KERN_INFO "radeonfb: Reversed DACs detected\n");
5418c2ecf20Sopenharmony_ci				}
5428c2ecf20Sopenharmony_ci				if ((((tmp0 >> 8) & 0x0f) == ddc_dvi) && ((tmp0 >> 4) & 0x01)) {
5438c2ecf20Sopenharmony_ci					rinfo->reversed_TMDS = 1;
5448c2ecf20Sopenharmony_ci					printk(KERN_INFO "radeonfb: Reversed TMDS detected\n");
5458c2ecf20Sopenharmony_ci				}
5468c2ecf20Sopenharmony_ci			}
5478c2ecf20Sopenharmony_ci		}
5488c2ecf20Sopenharmony_ci
5498c2ecf20Sopenharmony_ci		/*
5508c2ecf20Sopenharmony_ci		 * Probe primary head (DVI or laptop internal panel)
5518c2ecf20Sopenharmony_ci		 */
5528c2ecf20Sopenharmony_ci#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
5538c2ecf20Sopenharmony_ci		if (rinfo->mon1_type == MT_NONE)
5548c2ecf20Sopenharmony_ci			rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0,
5558c2ecf20Sopenharmony_ci								&rinfo->mon1_EDID);
5568c2ecf20Sopenharmony_ci#endif /* CONFIG_PPC || CONFIG_SPARC */
5578c2ecf20Sopenharmony_ci#ifdef CONFIG_FB_RADEON_I2C
5588c2ecf20Sopenharmony_ci		if (rinfo->mon1_type == MT_NONE)
5598c2ecf20Sopenharmony_ci			rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_dvi,
5608c2ecf20Sopenharmony_ci								      &rinfo->mon1_EDID);
5618c2ecf20Sopenharmony_ci		if (rinfo->mon1_type == MT_NONE) {
5628c2ecf20Sopenharmony_ci			rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_crt2,
5638c2ecf20Sopenharmony_ci								      &rinfo->mon1_EDID);
5648c2ecf20Sopenharmony_ci			if (rinfo->mon1_type != MT_NONE)
5658c2ecf20Sopenharmony_ci				ddc_crt2_used = 1;
5668c2ecf20Sopenharmony_ci		}
5678c2ecf20Sopenharmony_ci#endif /* CONFIG_FB_RADEON_I2C */
5688c2ecf20Sopenharmony_ci		if (rinfo->mon1_type == MT_NONE && rinfo->is_mobility &&
5698c2ecf20Sopenharmony_ci		    ((rinfo->bios_seg && (INREG(BIOS_4_SCRATCH) & 4))
5708c2ecf20Sopenharmony_ci		     || (INREG(LVDS_GEN_CNTL) & LVDS_ON))) {
5718c2ecf20Sopenharmony_ci			rinfo->mon1_type = MT_LCD;
5728c2ecf20Sopenharmony_ci			printk("Non-DDC laptop panel detected\n");
5738c2ecf20Sopenharmony_ci		}
5748c2ecf20Sopenharmony_ci		if (rinfo->mon1_type == MT_NONE)
5758c2ecf20Sopenharmony_ci			rinfo->mon1_type = radeon_crt_is_connected(rinfo, rinfo->reversed_DAC);
5768c2ecf20Sopenharmony_ci
5778c2ecf20Sopenharmony_ci		/*
5788c2ecf20Sopenharmony_ci		 * Probe secondary head (mostly VGA, can be DVI)
5798c2ecf20Sopenharmony_ci		 */
5808c2ecf20Sopenharmony_ci#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
5818c2ecf20Sopenharmony_ci		if (rinfo->mon2_type == MT_NONE)
5828c2ecf20Sopenharmony_ci			rinfo->mon2_type = radeon_probe_OF_head(rinfo, 1,
5838c2ecf20Sopenharmony_ci								&rinfo->mon2_EDID);
5848c2ecf20Sopenharmony_ci#endif /* CONFIG_PPC || defined(CONFIG_SPARC) */
5858c2ecf20Sopenharmony_ci#ifdef CONFIG_FB_RADEON_I2C
5868c2ecf20Sopenharmony_ci		if (rinfo->mon2_type == MT_NONE)
5878c2ecf20Sopenharmony_ci			rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_vga,
5888c2ecf20Sopenharmony_ci								      &rinfo->mon2_EDID);
5898c2ecf20Sopenharmony_ci		if (rinfo->mon2_type == MT_NONE && !ddc_crt2_used)
5908c2ecf20Sopenharmony_ci			rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_crt2,
5918c2ecf20Sopenharmony_ci								      &rinfo->mon2_EDID);
5928c2ecf20Sopenharmony_ci#endif /* CONFIG_FB_RADEON_I2C */
5938c2ecf20Sopenharmony_ci		if (rinfo->mon2_type == MT_NONE)
5948c2ecf20Sopenharmony_ci			rinfo->mon2_type = radeon_crt_is_connected(rinfo, !rinfo->reversed_DAC);
5958c2ecf20Sopenharmony_ci
5968c2ecf20Sopenharmony_ci		/*
5978c2ecf20Sopenharmony_ci		 * If we only detected port 2, we swap them, if none detected,
5988c2ecf20Sopenharmony_ci		 * assume CRT (maybe fallback to old BIOS_SCRATCH stuff ? or look
5998c2ecf20Sopenharmony_ci		 * at FP registers ?)
6008c2ecf20Sopenharmony_ci		 */
6018c2ecf20Sopenharmony_ci		if (rinfo->mon1_type == MT_NONE) {
6028c2ecf20Sopenharmony_ci			if (rinfo->mon2_type != MT_NONE) {
6038c2ecf20Sopenharmony_ci				rinfo->mon1_type = rinfo->mon2_type;
6048c2ecf20Sopenharmony_ci				rinfo->mon1_EDID = rinfo->mon2_EDID;
6058c2ecf20Sopenharmony_ci			} else
6068c2ecf20Sopenharmony_ci				rinfo->mon1_type = MT_CRT;
6078c2ecf20Sopenharmony_ci			rinfo->mon2_type = MT_NONE;
6088c2ecf20Sopenharmony_ci			rinfo->mon2_EDID = NULL;
6098c2ecf20Sopenharmony_ci		}
6108c2ecf20Sopenharmony_ci
6118c2ecf20Sopenharmony_ci		/*
6128c2ecf20Sopenharmony_ci		 * Deal with reversed TMDS
6138c2ecf20Sopenharmony_ci		 */
6148c2ecf20Sopenharmony_ci		if (rinfo->reversed_TMDS) {
6158c2ecf20Sopenharmony_ci			/* Always keep internal TMDS as primary head */
6168c2ecf20Sopenharmony_ci			if (rinfo->mon1_type == MT_DFP || rinfo->mon2_type == MT_DFP) {
6178c2ecf20Sopenharmony_ci				int tmp_type = rinfo->mon1_type;
6188c2ecf20Sopenharmony_ci				u8 *tmp_EDID = rinfo->mon1_EDID;
6198c2ecf20Sopenharmony_ci				rinfo->mon1_type = rinfo->mon2_type;
6208c2ecf20Sopenharmony_ci				rinfo->mon1_EDID = rinfo->mon2_EDID;
6218c2ecf20Sopenharmony_ci				rinfo->mon2_type = tmp_type;
6228c2ecf20Sopenharmony_ci				rinfo->mon2_EDID = tmp_EDID;
6238c2ecf20Sopenharmony_ci				if (rinfo->mon1_type == MT_CRT || rinfo->mon2_type == MT_CRT)
6248c2ecf20Sopenharmony_ci					rinfo->reversed_DAC ^= 1;
6258c2ecf20Sopenharmony_ci			}
6268c2ecf20Sopenharmony_ci		}
6278c2ecf20Sopenharmony_ci	}
6288c2ecf20Sopenharmony_ci	if (ignore_edid) {
6298c2ecf20Sopenharmony_ci		kfree(rinfo->mon1_EDID);
6308c2ecf20Sopenharmony_ci		rinfo->mon1_EDID = NULL;
6318c2ecf20Sopenharmony_ci		kfree(rinfo->mon2_EDID);
6328c2ecf20Sopenharmony_ci		rinfo->mon2_EDID = NULL;
6338c2ecf20Sopenharmony_ci	}
6348c2ecf20Sopenharmony_ci
6358c2ecf20Sopenharmony_ci bail:
6368c2ecf20Sopenharmony_ci	printk(KERN_INFO "radeonfb: Monitor 1 type %s found\n",
6378c2ecf20Sopenharmony_ci	       radeon_get_mon_name(rinfo->mon1_type));
6388c2ecf20Sopenharmony_ci	if (rinfo->mon1_EDID)
6398c2ecf20Sopenharmony_ci		printk(KERN_INFO "radeonfb: EDID probed\n");
6408c2ecf20Sopenharmony_ci	if (!rinfo->has_CRTC2)
6418c2ecf20Sopenharmony_ci		return;
6428c2ecf20Sopenharmony_ci	printk(KERN_INFO "radeonfb: Monitor 2 type %s found\n",
6438c2ecf20Sopenharmony_ci	       radeon_get_mon_name(rinfo->mon2_type));
6448c2ecf20Sopenharmony_ci	if (rinfo->mon2_EDID)
6458c2ecf20Sopenharmony_ci		printk(KERN_INFO "radeonfb: EDID probed\n");
6468c2ecf20Sopenharmony_ci}
6478c2ecf20Sopenharmony_ci
6488c2ecf20Sopenharmony_ci
6498c2ecf20Sopenharmony_ci/*
6508c2ecf20Sopenharmony_ci * This function applies any arch/model/machine specific fixups
6518c2ecf20Sopenharmony_ci * to the panel info. It may eventually alter EDID block as
6528c2ecf20Sopenharmony_ci * well or whatever is specific to a given model and not probed
6538c2ecf20Sopenharmony_ci * properly by the default code
6548c2ecf20Sopenharmony_ci */
6558c2ecf20Sopenharmony_cistatic void radeon_fixup_panel_info(struct radeonfb_info *rinfo)
6568c2ecf20Sopenharmony_ci{
6578c2ecf20Sopenharmony_ci#ifdef CONFIG_PPC
6588c2ecf20Sopenharmony_ci	/*
6598c2ecf20Sopenharmony_ci	 * LCD Flat panels should use fixed dividers, we enfore that on
6608c2ecf20Sopenharmony_ci	 * PPC only for now...
6618c2ecf20Sopenharmony_ci	 */
6628c2ecf20Sopenharmony_ci	if (!rinfo->panel_info.use_bios_dividers && rinfo->mon1_type == MT_LCD
6638c2ecf20Sopenharmony_ci	    && rinfo->is_mobility) {
6648c2ecf20Sopenharmony_ci		int ppll_div_sel;
6658c2ecf20Sopenharmony_ci		u32 ppll_divn;
6668c2ecf20Sopenharmony_ci		ppll_div_sel = INREG8(CLOCK_CNTL_INDEX + 1) & 0x3;
6678c2ecf20Sopenharmony_ci		radeon_pll_errata_after_index(rinfo);
6688c2ecf20Sopenharmony_ci		ppll_divn = INPLL(PPLL_DIV_0 + ppll_div_sel);
6698c2ecf20Sopenharmony_ci		rinfo->panel_info.ref_divider = rinfo->pll.ref_div;
6708c2ecf20Sopenharmony_ci		rinfo->panel_info.fbk_divider = ppll_divn & 0x7ff;
6718c2ecf20Sopenharmony_ci		rinfo->panel_info.post_divider = (ppll_divn >> 16) & 0x7;
6728c2ecf20Sopenharmony_ci		rinfo->panel_info.use_bios_dividers = 1;
6738c2ecf20Sopenharmony_ci
6748c2ecf20Sopenharmony_ci		printk(KERN_DEBUG "radeonfb: Using Firmware dividers 0x%08x "
6758c2ecf20Sopenharmony_ci		       "from PPLL %d\n",
6768c2ecf20Sopenharmony_ci		       rinfo->panel_info.fbk_divider |
6778c2ecf20Sopenharmony_ci		       (rinfo->panel_info.post_divider << 16),
6788c2ecf20Sopenharmony_ci		       ppll_div_sel);
6798c2ecf20Sopenharmony_ci	}
6808c2ecf20Sopenharmony_ci#endif /* CONFIG_PPC */
6818c2ecf20Sopenharmony_ci}
6828c2ecf20Sopenharmony_ci
6838c2ecf20Sopenharmony_ci
6848c2ecf20Sopenharmony_ci/*
6858c2ecf20Sopenharmony_ci * Fill up panel infos from a mode definition, either returned by the EDID
6868c2ecf20Sopenharmony_ci * or from the default mode when we can't do any better
6878c2ecf20Sopenharmony_ci */
6888c2ecf20Sopenharmony_cistatic void radeon_var_to_panel_info(struct radeonfb_info *rinfo, struct fb_var_screeninfo *var)
6898c2ecf20Sopenharmony_ci{
6908c2ecf20Sopenharmony_ci	rinfo->panel_info.xres = var->xres;
6918c2ecf20Sopenharmony_ci	rinfo->panel_info.yres = var->yres;
6928c2ecf20Sopenharmony_ci	rinfo->panel_info.clock = 100000000 / var->pixclock;
6938c2ecf20Sopenharmony_ci	rinfo->panel_info.hOver_plus = var->right_margin;
6948c2ecf20Sopenharmony_ci	rinfo->panel_info.hSync_width = var->hsync_len;
6958c2ecf20Sopenharmony_ci       	rinfo->panel_info.hblank = var->left_margin +
6968c2ecf20Sopenharmony_ci		(var->right_margin + var->hsync_len);
6978c2ecf20Sopenharmony_ci	rinfo->panel_info.vOver_plus = var->lower_margin;
6988c2ecf20Sopenharmony_ci	rinfo->panel_info.vSync_width = var->vsync_len;
6998c2ecf20Sopenharmony_ci       	rinfo->panel_info.vblank = var->upper_margin +
7008c2ecf20Sopenharmony_ci		(var->lower_margin + var->vsync_len);
7018c2ecf20Sopenharmony_ci	rinfo->panel_info.hAct_high =
7028c2ecf20Sopenharmony_ci		(var->sync & FB_SYNC_HOR_HIGH_ACT) != 0;
7038c2ecf20Sopenharmony_ci	rinfo->panel_info.vAct_high =
7048c2ecf20Sopenharmony_ci		(var->sync & FB_SYNC_VERT_HIGH_ACT) != 0;
7058c2ecf20Sopenharmony_ci	rinfo->panel_info.valid = 1;
7068c2ecf20Sopenharmony_ci	/* We use a default of 200ms for the panel power delay,
7078c2ecf20Sopenharmony_ci	 * I need to have a real schedule() instead of mdelay's in the panel code.
7088c2ecf20Sopenharmony_ci	 * we might be possible to figure out a better power delay either from
7098c2ecf20Sopenharmony_ci	 * MacOS OF tree or from the EDID block (proprietary extensions ?)
7108c2ecf20Sopenharmony_ci	 */
7118c2ecf20Sopenharmony_ci	rinfo->panel_info.pwr_delay = 200;
7128c2ecf20Sopenharmony_ci}
7138c2ecf20Sopenharmony_ci
7148c2ecf20Sopenharmony_cistatic void radeon_videomode_to_var(struct fb_var_screeninfo *var,
7158c2ecf20Sopenharmony_ci				    const struct fb_videomode *mode)
7168c2ecf20Sopenharmony_ci{
7178c2ecf20Sopenharmony_ci	var->xres = mode->xres;
7188c2ecf20Sopenharmony_ci	var->yres = mode->yres;
7198c2ecf20Sopenharmony_ci	var->xres_virtual = mode->xres;
7208c2ecf20Sopenharmony_ci	var->yres_virtual = mode->yres;
7218c2ecf20Sopenharmony_ci	var->xoffset = 0;
7228c2ecf20Sopenharmony_ci	var->yoffset = 0;
7238c2ecf20Sopenharmony_ci	var->pixclock = mode->pixclock;
7248c2ecf20Sopenharmony_ci	var->left_margin = mode->left_margin;
7258c2ecf20Sopenharmony_ci	var->right_margin = mode->right_margin;
7268c2ecf20Sopenharmony_ci	var->upper_margin = mode->upper_margin;
7278c2ecf20Sopenharmony_ci	var->lower_margin = mode->lower_margin;
7288c2ecf20Sopenharmony_ci	var->hsync_len = mode->hsync_len;
7298c2ecf20Sopenharmony_ci	var->vsync_len = mode->vsync_len;
7308c2ecf20Sopenharmony_ci	var->sync = mode->sync;
7318c2ecf20Sopenharmony_ci	var->vmode = mode->vmode;
7328c2ecf20Sopenharmony_ci}
7338c2ecf20Sopenharmony_ci
7348c2ecf20Sopenharmony_ci#ifdef CONFIG_PPC_PSERIES
7358c2ecf20Sopenharmony_cistatic int is_powerblade(const char *model)
7368c2ecf20Sopenharmony_ci{
7378c2ecf20Sopenharmony_ci	struct device_node *root;
7388c2ecf20Sopenharmony_ci	const char* cp;
7398c2ecf20Sopenharmony_ci	int len, l, rc = 0;
7408c2ecf20Sopenharmony_ci
7418c2ecf20Sopenharmony_ci	root = of_find_node_by_path("/");
7428c2ecf20Sopenharmony_ci	if (root && model) {
7438c2ecf20Sopenharmony_ci		l = strlen(model);
7448c2ecf20Sopenharmony_ci		cp = of_get_property(root, "model", &len);
7458c2ecf20Sopenharmony_ci		if (cp)
7468c2ecf20Sopenharmony_ci			rc = memcmp(model, cp, min(len, l)) == 0;
7478c2ecf20Sopenharmony_ci		of_node_put(root);
7488c2ecf20Sopenharmony_ci	}
7498c2ecf20Sopenharmony_ci	return rc;
7508c2ecf20Sopenharmony_ci}
7518c2ecf20Sopenharmony_ci#endif
7528c2ecf20Sopenharmony_ci
7538c2ecf20Sopenharmony_ci/*
7548c2ecf20Sopenharmony_ci * Build the modedb for head 1 (head 2 will come later), check panel infos
7558c2ecf20Sopenharmony_ci * from either BIOS or EDID, and pick up the default mode
7568c2ecf20Sopenharmony_ci */
7578c2ecf20Sopenharmony_civoid radeon_check_modes(struct radeonfb_info *rinfo, const char *mode_option)
7588c2ecf20Sopenharmony_ci{
7598c2ecf20Sopenharmony_ci	struct fb_info * info = rinfo->info;
7608c2ecf20Sopenharmony_ci	int has_default_mode = 0;
7618c2ecf20Sopenharmony_ci
7628c2ecf20Sopenharmony_ci	/*
7638c2ecf20Sopenharmony_ci	 * Fill default var first
7648c2ecf20Sopenharmony_ci	 */
7658c2ecf20Sopenharmony_ci	info->var = radeonfb_default_var;
7668c2ecf20Sopenharmony_ci	INIT_LIST_HEAD(&info->modelist);
7678c2ecf20Sopenharmony_ci
7688c2ecf20Sopenharmony_ci	/*
7698c2ecf20Sopenharmony_ci	 * First check out what BIOS has to say
7708c2ecf20Sopenharmony_ci	 */
7718c2ecf20Sopenharmony_ci	if (rinfo->mon1_type == MT_LCD)
7728c2ecf20Sopenharmony_ci		radeon_get_panel_info_BIOS(rinfo);
7738c2ecf20Sopenharmony_ci
7748c2ecf20Sopenharmony_ci	/*
7758c2ecf20Sopenharmony_ci	 * Parse EDID detailed timings and deduce panel infos if any. Right now
7768c2ecf20Sopenharmony_ci	 * we only deal with first entry returned by parse_EDID, we may do better
7778c2ecf20Sopenharmony_ci	 * some day...
7788c2ecf20Sopenharmony_ci	 */
7798c2ecf20Sopenharmony_ci	if (!rinfo->panel_info.use_bios_dividers && rinfo->mon1_type != MT_CRT
7808c2ecf20Sopenharmony_ci	    && rinfo->mon1_EDID) {
7818c2ecf20Sopenharmony_ci		struct fb_var_screeninfo var;
7828c2ecf20Sopenharmony_ci		pr_debug("Parsing EDID data for panel info\n");
7838c2ecf20Sopenharmony_ci		if (fb_parse_edid(rinfo->mon1_EDID, &var) == 0) {
7848c2ecf20Sopenharmony_ci			if (var.xres >= rinfo->panel_info.xres &&
7858c2ecf20Sopenharmony_ci			    var.yres >= rinfo->panel_info.yres)
7868c2ecf20Sopenharmony_ci				radeon_var_to_panel_info(rinfo, &var);
7878c2ecf20Sopenharmony_ci		}
7888c2ecf20Sopenharmony_ci	}
7898c2ecf20Sopenharmony_ci
7908c2ecf20Sopenharmony_ci	/*
7918c2ecf20Sopenharmony_ci	 * Do any additional platform/arch fixups to the panel infos
7928c2ecf20Sopenharmony_ci	 */
7938c2ecf20Sopenharmony_ci	radeon_fixup_panel_info(rinfo);
7948c2ecf20Sopenharmony_ci
7958c2ecf20Sopenharmony_ci	/*
7968c2ecf20Sopenharmony_ci	 * If we have some valid panel infos, we setup the default mode based on
7978c2ecf20Sopenharmony_ci	 * those
7988c2ecf20Sopenharmony_ci	 */
7998c2ecf20Sopenharmony_ci	if (rinfo->mon1_type != MT_CRT && rinfo->panel_info.valid) {
8008c2ecf20Sopenharmony_ci		struct fb_var_screeninfo *var = &info->var;
8018c2ecf20Sopenharmony_ci
8028c2ecf20Sopenharmony_ci		pr_debug("Setting up default mode based on panel info\n");
8038c2ecf20Sopenharmony_ci		var->xres = rinfo->panel_info.xres;
8048c2ecf20Sopenharmony_ci		var->yres = rinfo->panel_info.yres;
8058c2ecf20Sopenharmony_ci		var->xres_virtual = rinfo->panel_info.xres;
8068c2ecf20Sopenharmony_ci		var->yres_virtual = rinfo->panel_info.yres;
8078c2ecf20Sopenharmony_ci		var->xoffset = var->yoffset = 0;
8088c2ecf20Sopenharmony_ci		var->bits_per_pixel = 8;
8098c2ecf20Sopenharmony_ci		var->pixclock = 100000000 / rinfo->panel_info.clock;
8108c2ecf20Sopenharmony_ci		var->left_margin = (rinfo->panel_info.hblank - rinfo->panel_info.hOver_plus
8118c2ecf20Sopenharmony_ci				    - rinfo->panel_info.hSync_width);
8128c2ecf20Sopenharmony_ci		var->right_margin = rinfo->panel_info.hOver_plus;
8138c2ecf20Sopenharmony_ci		var->upper_margin = (rinfo->panel_info.vblank - rinfo->panel_info.vOver_plus
8148c2ecf20Sopenharmony_ci				     - rinfo->panel_info.vSync_width);
8158c2ecf20Sopenharmony_ci		var->lower_margin = rinfo->panel_info.vOver_plus;
8168c2ecf20Sopenharmony_ci		var->hsync_len = rinfo->panel_info.hSync_width;
8178c2ecf20Sopenharmony_ci		var->vsync_len = rinfo->panel_info.vSync_width;
8188c2ecf20Sopenharmony_ci		var->sync = 0;
8198c2ecf20Sopenharmony_ci		if (rinfo->panel_info.hAct_high)
8208c2ecf20Sopenharmony_ci			var->sync |= FB_SYNC_HOR_HIGH_ACT;
8218c2ecf20Sopenharmony_ci		if (rinfo->panel_info.vAct_high)
8228c2ecf20Sopenharmony_ci			var->sync |= FB_SYNC_VERT_HIGH_ACT;
8238c2ecf20Sopenharmony_ci		var->vmode = 0;
8248c2ecf20Sopenharmony_ci		has_default_mode = 1;
8258c2ecf20Sopenharmony_ci	}
8268c2ecf20Sopenharmony_ci
8278c2ecf20Sopenharmony_ci	/*
8288c2ecf20Sopenharmony_ci	 * Now build modedb from EDID
8298c2ecf20Sopenharmony_ci	 */
8308c2ecf20Sopenharmony_ci	if (rinfo->mon1_EDID) {
8318c2ecf20Sopenharmony_ci		fb_edid_to_monspecs(rinfo->mon1_EDID, &info->monspecs);
8328c2ecf20Sopenharmony_ci		fb_videomode_to_modelist(info->monspecs.modedb,
8338c2ecf20Sopenharmony_ci					 info->monspecs.modedb_len,
8348c2ecf20Sopenharmony_ci					 &info->modelist);
8358c2ecf20Sopenharmony_ci		rinfo->mon1_modedb = info->monspecs.modedb;
8368c2ecf20Sopenharmony_ci		rinfo->mon1_dbsize = info->monspecs.modedb_len;
8378c2ecf20Sopenharmony_ci	}
8388c2ecf20Sopenharmony_ci
8398c2ecf20Sopenharmony_ci
8408c2ecf20Sopenharmony_ci	/*
8418c2ecf20Sopenharmony_ci	 * Finally, if we don't have panel infos we need to figure some (or
8428c2ecf20Sopenharmony_ci	 * we try to read it from card), we try to pick a default mode
8438c2ecf20Sopenharmony_ci	 * and create some panel infos. Whatever...
8448c2ecf20Sopenharmony_ci	 */
8458c2ecf20Sopenharmony_ci	if (rinfo->mon1_type != MT_CRT && !rinfo->panel_info.valid) {
8468c2ecf20Sopenharmony_ci		struct fb_videomode	*modedb;
8478c2ecf20Sopenharmony_ci		int			dbsize;
8488c2ecf20Sopenharmony_ci		char			modename[32];
8498c2ecf20Sopenharmony_ci
8508c2ecf20Sopenharmony_ci		pr_debug("Guessing panel info...\n");
8518c2ecf20Sopenharmony_ci		if (rinfo->panel_info.xres == 0 || rinfo->panel_info.yres == 0) {
8528c2ecf20Sopenharmony_ci			u32 tmp = INREG(FP_HORZ_STRETCH) & HORZ_PANEL_SIZE;
8538c2ecf20Sopenharmony_ci			rinfo->panel_info.xres = ((tmp >> HORZ_PANEL_SHIFT) + 1) * 8;
8548c2ecf20Sopenharmony_ci			tmp = INREG(FP_VERT_STRETCH) & VERT_PANEL_SIZE;
8558c2ecf20Sopenharmony_ci			rinfo->panel_info.yres = (tmp >> VERT_PANEL_SHIFT) + 1;
8568c2ecf20Sopenharmony_ci		}
8578c2ecf20Sopenharmony_ci		if (rinfo->panel_info.xres == 0 || rinfo->panel_info.yres == 0) {
8588c2ecf20Sopenharmony_ci			printk(KERN_WARNING "radeonfb: Can't find panel size, going back to CRT\n");
8598c2ecf20Sopenharmony_ci			rinfo->mon1_type = MT_CRT;
8608c2ecf20Sopenharmony_ci			goto pickup_default;
8618c2ecf20Sopenharmony_ci		}
8628c2ecf20Sopenharmony_ci		printk(KERN_WARNING "radeonfb: Assuming panel size %dx%d\n",
8638c2ecf20Sopenharmony_ci		       rinfo->panel_info.xres, rinfo->panel_info.yres);
8648c2ecf20Sopenharmony_ci		modedb = rinfo->mon1_modedb;
8658c2ecf20Sopenharmony_ci		dbsize = rinfo->mon1_dbsize;
8668c2ecf20Sopenharmony_ci		snprintf(modename, 31, "%dx%d", rinfo->panel_info.xres, rinfo->panel_info.yres);
8678c2ecf20Sopenharmony_ci		if (fb_find_mode(&info->var, info, modename,
8688c2ecf20Sopenharmony_ci				 modedb, dbsize, NULL, 8) == 0) {
8698c2ecf20Sopenharmony_ci			printk(KERN_WARNING "radeonfb: Can't find mode for panel size, going back to CRT\n");
8708c2ecf20Sopenharmony_ci			rinfo->mon1_type = MT_CRT;
8718c2ecf20Sopenharmony_ci			goto pickup_default;
8728c2ecf20Sopenharmony_ci		}
8738c2ecf20Sopenharmony_ci		has_default_mode = 1;
8748c2ecf20Sopenharmony_ci		radeon_var_to_panel_info(rinfo, &info->var);
8758c2ecf20Sopenharmony_ci	}
8768c2ecf20Sopenharmony_ci
8778c2ecf20Sopenharmony_ci pickup_default:
8788c2ecf20Sopenharmony_ci	/*
8798c2ecf20Sopenharmony_ci	 * Apply passed-in mode option if any
8808c2ecf20Sopenharmony_ci	 */
8818c2ecf20Sopenharmony_ci	if (mode_option) {
8828c2ecf20Sopenharmony_ci		if (fb_find_mode(&info->var, info, mode_option,
8838c2ecf20Sopenharmony_ci				 info->monspecs.modedb,
8848c2ecf20Sopenharmony_ci				 info->monspecs.modedb_len, NULL, 8) != 0)
8858c2ecf20Sopenharmony_ci			has_default_mode = 1;
8868c2ecf20Sopenharmony_ci 	}
8878c2ecf20Sopenharmony_ci
8888c2ecf20Sopenharmony_ci#ifdef CONFIG_PPC_PSERIES
8898c2ecf20Sopenharmony_ci	if (!has_default_mode && (
8908c2ecf20Sopenharmony_ci		is_powerblade("IBM,8842") || /* JS20 */
8918c2ecf20Sopenharmony_ci		is_powerblade("IBM,8844") || /* JS21 */
8928c2ecf20Sopenharmony_ci		is_powerblade("IBM,7998") || /* JS12/JS21/JS22 */
8938c2ecf20Sopenharmony_ci		is_powerblade("IBM,0792") || /* QS21 */
8948c2ecf20Sopenharmony_ci		is_powerblade("IBM,0793")    /* QS22 */
8958c2ecf20Sopenharmony_ci	    )) {
8968c2ecf20Sopenharmony_ci		printk("Falling back to 800x600 on JSxx hardware\n");
8978c2ecf20Sopenharmony_ci		if (fb_find_mode(&info->var, info, "800x600@60",
8988c2ecf20Sopenharmony_ci				 info->monspecs.modedb,
8998c2ecf20Sopenharmony_ci				 info->monspecs.modedb_len, NULL, 8) != 0)
9008c2ecf20Sopenharmony_ci			has_default_mode = 1;
9018c2ecf20Sopenharmony_ci	}
9028c2ecf20Sopenharmony_ci#endif
9038c2ecf20Sopenharmony_ci
9048c2ecf20Sopenharmony_ci	/*
9058c2ecf20Sopenharmony_ci	 * Still no mode, let's pick up a default from the db
9068c2ecf20Sopenharmony_ci	 */
9078c2ecf20Sopenharmony_ci	if (!has_default_mode && info->monspecs.modedb != NULL) {
9088c2ecf20Sopenharmony_ci		struct fb_monspecs *specs = &info->monspecs;
9098c2ecf20Sopenharmony_ci		struct fb_videomode *modedb = NULL;
9108c2ecf20Sopenharmony_ci
9118c2ecf20Sopenharmony_ci		/* get preferred timing */
9128c2ecf20Sopenharmony_ci		if (specs->misc & FB_MISC_1ST_DETAIL) {
9138c2ecf20Sopenharmony_ci			int i;
9148c2ecf20Sopenharmony_ci
9158c2ecf20Sopenharmony_ci			for (i = 0; i < specs->modedb_len; i++) {
9168c2ecf20Sopenharmony_ci				if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
9178c2ecf20Sopenharmony_ci					modedb = &specs->modedb[i];
9188c2ecf20Sopenharmony_ci					break;
9198c2ecf20Sopenharmony_ci				}
9208c2ecf20Sopenharmony_ci			}
9218c2ecf20Sopenharmony_ci		} else {
9228c2ecf20Sopenharmony_ci			/* otherwise, get first mode in database */
9238c2ecf20Sopenharmony_ci			modedb = &specs->modedb[0];
9248c2ecf20Sopenharmony_ci		}
9258c2ecf20Sopenharmony_ci		if (modedb != NULL) {
9268c2ecf20Sopenharmony_ci			info->var.bits_per_pixel = 8;
9278c2ecf20Sopenharmony_ci			radeon_videomode_to_var(&info->var, modedb);
9288c2ecf20Sopenharmony_ci			has_default_mode = 1;
9298c2ecf20Sopenharmony_ci		}
9308c2ecf20Sopenharmony_ci	}
9318c2ecf20Sopenharmony_ci	if (1) {
9328c2ecf20Sopenharmony_ci		struct fb_videomode mode;
9338c2ecf20Sopenharmony_ci		/* Make sure that whatever mode got selected is actually in the
9348c2ecf20Sopenharmony_ci		 * modelist or the kernel may die
9358c2ecf20Sopenharmony_ci		 */
9368c2ecf20Sopenharmony_ci		fb_var_to_videomode(&mode, &info->var);
9378c2ecf20Sopenharmony_ci		fb_add_videomode(&mode, &info->modelist);
9388c2ecf20Sopenharmony_ci	}
9398c2ecf20Sopenharmony_ci}
9408c2ecf20Sopenharmony_ci
9418c2ecf20Sopenharmony_ci/*
9428c2ecf20Sopenharmony_ci * The code below is used to pick up a mode in check_var and
9438c2ecf20Sopenharmony_ci * set_var. It should be made generic
9448c2ecf20Sopenharmony_ci */
9458c2ecf20Sopenharmony_ci
9468c2ecf20Sopenharmony_ci/*
9478c2ecf20Sopenharmony_ci * This is used when looking for modes. We assign a "distance" value
9488c2ecf20Sopenharmony_ci * to a mode in the modedb depending how "close" it is from what we
9498c2ecf20Sopenharmony_ci * are looking for.
9508c2ecf20Sopenharmony_ci * Currently, we don't compare that much, we could do better but
9518c2ecf20Sopenharmony_ci * the current fbcon doesn't quite mind ;)
9528c2ecf20Sopenharmony_ci */
9538c2ecf20Sopenharmony_cistatic int radeon_compare_modes(const struct fb_var_screeninfo *var,
9548c2ecf20Sopenharmony_ci				const struct fb_videomode *mode)
9558c2ecf20Sopenharmony_ci{
9568c2ecf20Sopenharmony_ci	int distance = 0;
9578c2ecf20Sopenharmony_ci
9588c2ecf20Sopenharmony_ci	distance = mode->yres - var->yres;
9598c2ecf20Sopenharmony_ci	distance += (mode->xres - var->xres)/2;
9608c2ecf20Sopenharmony_ci	return distance;
9618c2ecf20Sopenharmony_ci}
9628c2ecf20Sopenharmony_ci
9638c2ecf20Sopenharmony_ci/*
9648c2ecf20Sopenharmony_ci * This function is called by check_var, it gets the passed in mode parameter, and
9658c2ecf20Sopenharmony_ci * outputs a valid mode matching the passed-in one as closely as possible.
9668c2ecf20Sopenharmony_ci * We need something better ultimately. Things like fbcon basically pass us out
9678c2ecf20Sopenharmony_ci * current mode with xres/yres hacked, while things like XFree will actually
9688c2ecf20Sopenharmony_ci * produce a full timing that we should respect as much as possible.
9698c2ecf20Sopenharmony_ci *
9708c2ecf20Sopenharmony_ci * This is why I added the FB_ACTIVATE_FIND that is used by fbcon. Without this,
9718c2ecf20Sopenharmony_ci * we do a simple spec match, that's all. With it, we actually look for a mode in
9728c2ecf20Sopenharmony_ci * either our monitor modedb or the vesa one if none
9738c2ecf20Sopenharmony_ci *
9748c2ecf20Sopenharmony_ci */
9758c2ecf20Sopenharmony_ciint  radeon_match_mode(struct radeonfb_info *rinfo,
9768c2ecf20Sopenharmony_ci		       struct fb_var_screeninfo *dest,
9778c2ecf20Sopenharmony_ci		       const struct fb_var_screeninfo *src)
9788c2ecf20Sopenharmony_ci{
9798c2ecf20Sopenharmony_ci	const struct fb_videomode	*db = vesa_modes;
9808c2ecf20Sopenharmony_ci	int				i, dbsize = 34;
9818c2ecf20Sopenharmony_ci	int				has_rmx, native_db = 0;
9828c2ecf20Sopenharmony_ci	int				distance = INT_MAX;
9838c2ecf20Sopenharmony_ci	const struct fb_videomode	*candidate = NULL;
9848c2ecf20Sopenharmony_ci
9858c2ecf20Sopenharmony_ci	/* Start with a copy of the requested mode */
9868c2ecf20Sopenharmony_ci	memcpy(dest, src, sizeof(struct fb_var_screeninfo));
9878c2ecf20Sopenharmony_ci
9888c2ecf20Sopenharmony_ci	/* Check if we have a modedb built from EDID */
9898c2ecf20Sopenharmony_ci	if (rinfo->mon1_modedb) {
9908c2ecf20Sopenharmony_ci		db = rinfo->mon1_modedb;
9918c2ecf20Sopenharmony_ci		dbsize = rinfo->mon1_dbsize;
9928c2ecf20Sopenharmony_ci		native_db = 1;
9938c2ecf20Sopenharmony_ci	}
9948c2ecf20Sopenharmony_ci
9958c2ecf20Sopenharmony_ci	/* Check if we have a scaler allowing any fancy mode */
9968c2ecf20Sopenharmony_ci	has_rmx = rinfo->mon1_type == MT_LCD || rinfo->mon1_type == MT_DFP;
9978c2ecf20Sopenharmony_ci
9988c2ecf20Sopenharmony_ci	/* If we have a scaler and are passed FB_ACTIVATE_TEST or
9998c2ecf20Sopenharmony_ci	 * FB_ACTIVATE_NOW, just do basic checking and return if the
10008c2ecf20Sopenharmony_ci	 * mode match
10018c2ecf20Sopenharmony_ci	 */
10028c2ecf20Sopenharmony_ci	if ((src->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_TEST ||
10038c2ecf20Sopenharmony_ci	    (src->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
10048c2ecf20Sopenharmony_ci		/* We don't have an RMX, validate timings. If we don't have
10058c2ecf20Sopenharmony_ci	 	 * monspecs, we should be paranoid and not let use go above
10068c2ecf20Sopenharmony_ci		 * 640x480-60, but I assume userland knows what it's doing here
10078c2ecf20Sopenharmony_ci		 * (though I may be proven wrong...)
10088c2ecf20Sopenharmony_ci		 */
10098c2ecf20Sopenharmony_ci		if (has_rmx == 0 && rinfo->mon1_modedb)
10108c2ecf20Sopenharmony_ci			if (fb_validate_mode((struct fb_var_screeninfo *)src, rinfo->info))
10118c2ecf20Sopenharmony_ci				return -EINVAL;
10128c2ecf20Sopenharmony_ci		return 0;
10138c2ecf20Sopenharmony_ci	}
10148c2ecf20Sopenharmony_ci
10158c2ecf20Sopenharmony_ci	/* Now look for a mode in the database */
10168c2ecf20Sopenharmony_ci	while (db) {
10178c2ecf20Sopenharmony_ci		for (i = 0; i < dbsize; i++) {
10188c2ecf20Sopenharmony_ci			int d;
10198c2ecf20Sopenharmony_ci
10208c2ecf20Sopenharmony_ci			if (db[i].yres < src->yres)
10218c2ecf20Sopenharmony_ci				continue;
10228c2ecf20Sopenharmony_ci			if (db[i].xres < src->xres)
10238c2ecf20Sopenharmony_ci				continue;
10248c2ecf20Sopenharmony_ci			d = radeon_compare_modes(src, &db[i]);
10258c2ecf20Sopenharmony_ci			/* If the new mode is at least as good as the previous one,
10268c2ecf20Sopenharmony_ci			 * then it's our new candidate
10278c2ecf20Sopenharmony_ci			 */
10288c2ecf20Sopenharmony_ci			if (d < distance) {
10298c2ecf20Sopenharmony_ci				candidate = &db[i];
10308c2ecf20Sopenharmony_ci				distance = d;
10318c2ecf20Sopenharmony_ci			}
10328c2ecf20Sopenharmony_ci		}
10338c2ecf20Sopenharmony_ci		db = NULL;
10348c2ecf20Sopenharmony_ci		/* If we have a scaler, we allow any mode from the database */
10358c2ecf20Sopenharmony_ci		if (native_db && has_rmx) {
10368c2ecf20Sopenharmony_ci			db = vesa_modes;
10378c2ecf20Sopenharmony_ci			dbsize = 34;
10388c2ecf20Sopenharmony_ci			native_db = 0;
10398c2ecf20Sopenharmony_ci		}
10408c2ecf20Sopenharmony_ci	}
10418c2ecf20Sopenharmony_ci
10428c2ecf20Sopenharmony_ci	/* If we have found a match, return it */
10438c2ecf20Sopenharmony_ci	if (candidate != NULL) {
10448c2ecf20Sopenharmony_ci		radeon_videomode_to_var(dest, candidate);
10458c2ecf20Sopenharmony_ci		return 0;
10468c2ecf20Sopenharmony_ci	}
10478c2ecf20Sopenharmony_ci
10488c2ecf20Sopenharmony_ci	/* If we haven't and don't have a scaler, fail */
10498c2ecf20Sopenharmony_ci	if (!has_rmx)
10508c2ecf20Sopenharmony_ci		return -EINVAL;
10518c2ecf20Sopenharmony_ci
10528c2ecf20Sopenharmony_ci	return 0;
10538c2ecf20Sopenharmony_ci}
1054