18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci *   Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch)
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No.
88c2ecf20Sopenharmony_ci * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin
98c2ecf20Sopenharmony_ci * Model No. U232-P9). See http://www.mct.com.tw/products/product_us232.html
108c2ecf20Sopenharmony_ci * for further information. The properties of this device are listed at the end
118c2ecf20Sopenharmony_ci * of this file. This device was used in the Dlink DSB-S25.
128c2ecf20Sopenharmony_ci *
138c2ecf20Sopenharmony_ci * All of the information about the device was acquired by using SniffUSB
148c2ecf20Sopenharmony_ci * on Windows98. The technical details of the reverse engineering are
158c2ecf20Sopenharmony_ci * summarized at the end of this file.
168c2ecf20Sopenharmony_ci */
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#ifndef __LINUX_USB_SERIAL_MCT_U232_H
198c2ecf20Sopenharmony_ci#define __LINUX_USB_SERIAL_MCT_U232_H
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci#define MCT_U232_VID	                0x0711	/* Vendor Id */
228c2ecf20Sopenharmony_ci#define MCT_U232_PID	                0x0210	/* Original MCT Product Id */
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci/* U232-P25, Sitecom */
258c2ecf20Sopenharmony_ci#define MCT_U232_SITECOM_PID		0x0230	/* Sitecom Product Id */
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/* DU-H3SP USB BAY hub */
288c2ecf20Sopenharmony_ci#define MCT_U232_DU_H3SP_PID		0x0200	/* D-Link DU-H3SP USB BAY */
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci/* Belkin badge the MCT U232-P9 as the F5U109 */
318c2ecf20Sopenharmony_ci#define MCT_U232_BELKIN_F5U109_VID	0x050d	/* Vendor Id */
328c2ecf20Sopenharmony_ci#define MCT_U232_BELKIN_F5U109_PID	0x0109	/* Product Id */
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci/*
358c2ecf20Sopenharmony_ci * Vendor Request Interface
368c2ecf20Sopenharmony_ci */
378c2ecf20Sopenharmony_ci#define MCT_U232_SET_REQUEST_TYPE	0x40
388c2ecf20Sopenharmony_ci#define MCT_U232_GET_REQUEST_TYPE	0xc0
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci/* Get Modem Status Register (MSR) */
418c2ecf20Sopenharmony_ci#define MCT_U232_GET_MODEM_STAT_REQUEST	2
428c2ecf20Sopenharmony_ci#define MCT_U232_GET_MODEM_STAT_SIZE	1
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci/* Get Line Control Register (LCR) */
458c2ecf20Sopenharmony_ci/* ... not used by this driver */
468c2ecf20Sopenharmony_ci#define MCT_U232_GET_LINE_CTRL_REQUEST	6
478c2ecf20Sopenharmony_ci#define MCT_U232_GET_LINE_CTRL_SIZE	1
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci/* Set Baud Rate Divisor */
508c2ecf20Sopenharmony_ci#define MCT_U232_SET_BAUD_RATE_REQUEST	5
518c2ecf20Sopenharmony_ci#define MCT_U232_SET_BAUD_RATE_SIZE	4
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci/* Set Line Control Register (LCR) */
548c2ecf20Sopenharmony_ci#define MCT_U232_SET_LINE_CTRL_REQUEST	7
558c2ecf20Sopenharmony_ci#define MCT_U232_SET_LINE_CTRL_SIZE	1
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci/* Set Modem Control Register (MCR) */
588c2ecf20Sopenharmony_ci#define MCT_U232_SET_MODEM_CTRL_REQUEST	10
598c2ecf20Sopenharmony_ci#define MCT_U232_SET_MODEM_CTRL_SIZE	1
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci/*
628c2ecf20Sopenharmony_ci * This USB device request code is not well understood.  It is transmitted by
638c2ecf20Sopenharmony_ci * the MCT-supplied Windows driver whenever the baud rate changes.
648c2ecf20Sopenharmony_ci */
658c2ecf20Sopenharmony_ci#define MCT_U232_SET_UNKNOWN1_REQUEST	11  /* Unknown functionality */
668c2ecf20Sopenharmony_ci#define MCT_U232_SET_UNKNOWN1_SIZE	1
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci/*
698c2ecf20Sopenharmony_ci * This USB device request code appears to control whether CTS is required
708c2ecf20Sopenharmony_ci * during transmission.
718c2ecf20Sopenharmony_ci *
728c2ecf20Sopenharmony_ci * Sending a zero byte allows data transmission to a device which is not
738c2ecf20Sopenharmony_ci * asserting CTS.  Sending a '1' byte will cause transmission to be deferred
748c2ecf20Sopenharmony_ci * until the device asserts CTS.
758c2ecf20Sopenharmony_ci */
768c2ecf20Sopenharmony_ci#define MCT_U232_SET_CTS_REQUEST	12
778c2ecf20Sopenharmony_ci#define MCT_U232_SET_CTS_SIZE		1
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci#define MCT_U232_MAX_SIZE		4	/* of MCT_XXX_SIZE */
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci/*
828c2ecf20Sopenharmony_ci * Baud rate (divisor)
838c2ecf20Sopenharmony_ci * Actually, there are two of them, MCT website calls them "Philips solution"
848c2ecf20Sopenharmony_ci * and "Intel solution". They are the regular MCT and "Sitecom" for us.
858c2ecf20Sopenharmony_ci * This is pointless to document in the header, see the code for the bits.
868c2ecf20Sopenharmony_ci */
878c2ecf20Sopenharmony_cistatic int mct_u232_calculate_baud_rate(struct usb_serial *serial,
888c2ecf20Sopenharmony_ci					speed_t value, speed_t *result);
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci/*
918c2ecf20Sopenharmony_ci * Line Control Register (LCR)
928c2ecf20Sopenharmony_ci */
938c2ecf20Sopenharmony_ci#define MCT_U232_SET_BREAK              0x40
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci#define MCT_U232_PARITY_SPACE		0x38
968c2ecf20Sopenharmony_ci#define MCT_U232_PARITY_MARK		0x28
978c2ecf20Sopenharmony_ci#define MCT_U232_PARITY_EVEN		0x18
988c2ecf20Sopenharmony_ci#define MCT_U232_PARITY_ODD		0x08
998c2ecf20Sopenharmony_ci#define MCT_U232_PARITY_NONE		0x00
1008c2ecf20Sopenharmony_ci
1018c2ecf20Sopenharmony_ci#define MCT_U232_DATA_BITS_5            0x00
1028c2ecf20Sopenharmony_ci#define MCT_U232_DATA_BITS_6            0x01
1038c2ecf20Sopenharmony_ci#define MCT_U232_DATA_BITS_7            0x02
1048c2ecf20Sopenharmony_ci#define MCT_U232_DATA_BITS_8            0x03
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_ci#define MCT_U232_STOP_BITS_2            0x04
1078c2ecf20Sopenharmony_ci#define MCT_U232_STOP_BITS_1            0x00
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci/*
1108c2ecf20Sopenharmony_ci * Modem Control Register (MCR)
1118c2ecf20Sopenharmony_ci */
1128c2ecf20Sopenharmony_ci#define MCT_U232_MCR_NONE               0x8     /* Deactivate DTR and RTS */
1138c2ecf20Sopenharmony_ci#define MCT_U232_MCR_RTS                0xa     /* Activate RTS */
1148c2ecf20Sopenharmony_ci#define MCT_U232_MCR_DTR                0x9     /* Activate DTR */
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_ci/*
1178c2ecf20Sopenharmony_ci * Modem Status Register (MSR)
1188c2ecf20Sopenharmony_ci */
1198c2ecf20Sopenharmony_ci#define MCT_U232_MSR_INDEX              0x0     /* data[index] */
1208c2ecf20Sopenharmony_ci#define MCT_U232_MSR_CD                 0x80    /* Current CD */
1218c2ecf20Sopenharmony_ci#define MCT_U232_MSR_RI                 0x40    /* Current RI */
1228c2ecf20Sopenharmony_ci#define MCT_U232_MSR_DSR                0x20    /* Current DSR */
1238c2ecf20Sopenharmony_ci#define MCT_U232_MSR_CTS                0x10    /* Current CTS */
1248c2ecf20Sopenharmony_ci#define MCT_U232_MSR_DCD                0x08    /* Delta CD */
1258c2ecf20Sopenharmony_ci#define MCT_U232_MSR_DRI                0x04    /* Delta RI */
1268c2ecf20Sopenharmony_ci#define MCT_U232_MSR_DDSR               0x02    /* Delta DSR */
1278c2ecf20Sopenharmony_ci#define MCT_U232_MSR_DCTS               0x01    /* Delta CTS */
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_ci/*
1308c2ecf20Sopenharmony_ci * Line Status Register (LSR)
1318c2ecf20Sopenharmony_ci */
1328c2ecf20Sopenharmony_ci#define MCT_U232_LSR_INDEX	1	/* data[index] */
1338c2ecf20Sopenharmony_ci#define MCT_U232_LSR_ERR	0x80	/* OE | PE | FE | BI */
1348c2ecf20Sopenharmony_ci#define MCT_U232_LSR_TEMT	0x40	/* transmit register empty */
1358c2ecf20Sopenharmony_ci#define MCT_U232_LSR_THRE	0x20	/* transmit holding register empty */
1368c2ecf20Sopenharmony_ci#define MCT_U232_LSR_BI		0x10	/* break indicator */
1378c2ecf20Sopenharmony_ci#define MCT_U232_LSR_FE		0x08	/* framing error */
1388c2ecf20Sopenharmony_ci#define MCT_U232_LSR_OE		0x02	/* overrun error */
1398c2ecf20Sopenharmony_ci#define MCT_U232_LSR_PE		0x04	/* parity error */
1408c2ecf20Sopenharmony_ci#define MCT_U232_LSR_OE		0x02	/* overrun error */
1418c2ecf20Sopenharmony_ci#define MCT_U232_LSR_DR		0x01	/* receive data ready */
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_ci
1448c2ecf20Sopenharmony_ci/* -----------------------------------------------------------------------------
1458c2ecf20Sopenharmony_ci * Technical Specification reverse engineered with SniffUSB on Windows98
1468c2ecf20Sopenharmony_ci * =====================================================================
1478c2ecf20Sopenharmony_ci *
1488c2ecf20Sopenharmony_ci *  The technical details of the device have been acquired be using "SniffUSB"
1498c2ecf20Sopenharmony_ci *  and the vendor-supplied device driver (version 2.3A) under Windows98. To
1508c2ecf20Sopenharmony_ci *  identify the USB vendor-specific requests and to assign them to terminal
1518c2ecf20Sopenharmony_ci *  settings (flow control, baud rate, etc.) the program "SerialSettings" from
1528c2ecf20Sopenharmony_ci *  William G. Greathouse has been proven to be very useful. I also used the
1538c2ecf20Sopenharmony_ci *  Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and
1548c2ecf20Sopenharmony_ci *  observations are summarized below:
1558c2ecf20Sopenharmony_ci *
1568c2ecf20Sopenharmony_ci *  The USB requests seem to be directly mapped to the registers of a 8250,
1578c2ecf20Sopenharmony_ci *  16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output
1588c2ecf20Sopenharmony_ci *  devices") contains a comprehensive description of UARTs and its registers.
1598c2ecf20Sopenharmony_ci *  The bit descriptions are actually taken from there.
1608c2ecf20Sopenharmony_ci *
1618c2ecf20Sopenharmony_ci *
1628c2ecf20Sopenharmony_ci * Baud rate (divisor)
1638c2ecf20Sopenharmony_ci * -------------------
1648c2ecf20Sopenharmony_ci *
1658c2ecf20Sopenharmony_ci *   BmRequestType:  0x40 (0100 0000B)
1668c2ecf20Sopenharmony_ci *   bRequest:       0x05
1678c2ecf20Sopenharmony_ci *   wValue:         0x0000
1688c2ecf20Sopenharmony_ci *   wIndex:         0x0000
1698c2ecf20Sopenharmony_ci *   wLength:        0x0004
1708c2ecf20Sopenharmony_ci *   Data:           divisor = 115200 / baud_rate
1718c2ecf20Sopenharmony_ci *
1728c2ecf20Sopenharmony_ci *   SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4
1738c2ecf20Sopenharmony_ci *   shown above, observations with a Belkin F5U109 adapter, using the
1748c2ecf20Sopenharmony_ci *   MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for
1758c2ecf20Sopenharmony_ci *   Win98/Me"), show this request has a length of 1 byte, presumably because
1768c2ecf20Sopenharmony_ci *   of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter
1778c2ecf20Sopenharmony_ci *   use a baud-rate code instead of a conventional RS-232 baud rate divisor.
1788c2ecf20Sopenharmony_ci *   The current source code for this driver does not reflect this fact, but
1798c2ecf20Sopenharmony_ci *   the driver works fine with this adapter/driver combination nonetheless.
1808c2ecf20Sopenharmony_ci *
1818c2ecf20Sopenharmony_ci *
1828c2ecf20Sopenharmony_ci * Line Control Register (LCR)
1838c2ecf20Sopenharmony_ci * ---------------------------
1848c2ecf20Sopenharmony_ci *
1858c2ecf20Sopenharmony_ci *  BmRequestType:  0x40 (0100 0000B)    0xc0 (1100 0000B)
1868c2ecf20Sopenharmony_ci *  bRequest:       0x07                 0x06
1878c2ecf20Sopenharmony_ci *  wValue:         0x0000
1888c2ecf20Sopenharmony_ci *  wIndex:         0x0000
1898c2ecf20Sopenharmony_ci *  wLength:        0x0001
1908c2ecf20Sopenharmony_ci *  Data:           LCR (see below)
1918c2ecf20Sopenharmony_ci *
1928c2ecf20Sopenharmony_ci *  Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data
1938c2ecf20Sopenharmony_ci *	   transmit/receive register (THR/RBR) and the Interrupt Enable Register
1948c2ecf20Sopenharmony_ci *	   (IER) is disabled. Any access to these ports is now redirected to the
1958c2ecf20Sopenharmony_ci *	   Divisor Latch Registers. Setting this bit, loading the Divisor
1968c2ecf20Sopenharmony_ci *	   Registers, and clearing DLAB should be done with interrupts disabled.
1978c2ecf20Sopenharmony_ci *  Bit 6: Set Break. When set to "1", the transmitter begins to transmit
1988c2ecf20Sopenharmony_ci *	   continuous Spacing until this bit is set to "0". This overrides any
1998c2ecf20Sopenharmony_ci *	   bits of characters that are being transmitted.
2008c2ecf20Sopenharmony_ci *  Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity
2018c2ecf20Sopenharmony_ci *	   to always be "1" or "0", based on the value of Bit 4.
2028c2ecf20Sopenharmony_ci *  Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0",
2038c2ecf20Sopenharmony_ci *	   setting this bit causes even parity to be transmitted and expected.
2048c2ecf20Sopenharmony_ci *	   Otherwise, odd parity is used.
2058c2ecf20Sopenharmony_ci *  Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted
2068c2ecf20Sopenharmony_ci *	   between the last bit of the data and the Stop Bit. The UART will also
2078c2ecf20Sopenharmony_ci *	   expect parity to be present in the received data.
2088c2ecf20Sopenharmony_ci *  Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words,
2098c2ecf20Sopenharmony_ci *	   1.5 Stop Bits are transmitted and expected in each data word. For
2108c2ecf20Sopenharmony_ci *	   6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected.
2118c2ecf20Sopenharmony_ci *	   When this bit is set to "0", one Stop Bit is used on each data word.
2128c2ecf20Sopenharmony_ci *  Bit 1: Word Length Select Bit #1 (WLSB1)
2138c2ecf20Sopenharmony_ci *  Bit 0: Word Length Select Bit #0 (WLSB0)
2148c2ecf20Sopenharmony_ci *	   Together these bits specify the number of bits in each data word.
2158c2ecf20Sopenharmony_ci *	     1 0  Word Length
2168c2ecf20Sopenharmony_ci *	     0 0  5 Data Bits
2178c2ecf20Sopenharmony_ci *	     0 1  6 Data Bits
2188c2ecf20Sopenharmony_ci *	     1 0  7 Data Bits
2198c2ecf20Sopenharmony_ci *	     1 1  8 Data Bits
2208c2ecf20Sopenharmony_ci *
2218c2ecf20Sopenharmony_ci *  SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs
2228c2ecf20Sopenharmony_ci *  in the Win98 driver: the break does not work (bit 6 is not asserted) and the
2238c2ecf20Sopenharmony_ci *  stick parity bit is not cleared when set once. The LCR can also be read
2248c2ecf20Sopenharmony_ci *  back with USB request 6 but this has never been observed with SniffUSB.
2258c2ecf20Sopenharmony_ci *
2268c2ecf20Sopenharmony_ci *
2278c2ecf20Sopenharmony_ci * Modem Control Register (MCR)
2288c2ecf20Sopenharmony_ci * ----------------------------
2298c2ecf20Sopenharmony_ci *
2308c2ecf20Sopenharmony_ci *  BmRequestType:  0x40  (0100 0000B)
2318c2ecf20Sopenharmony_ci *  bRequest:       0x0a
2328c2ecf20Sopenharmony_ci *  wValue:         0x0000
2338c2ecf20Sopenharmony_ci *  wIndex:         0x0000
2348c2ecf20Sopenharmony_ci *  wLength:        0x0001
2358c2ecf20Sopenharmony_ci *  Data:           MCR (Bit 4..7, see below)
2368c2ecf20Sopenharmony_ci *
2378c2ecf20Sopenharmony_ci *  Bit 7: Reserved, always 0.
2388c2ecf20Sopenharmony_ci *  Bit 6: Reserved, always 0.
2398c2ecf20Sopenharmony_ci *  Bit 5: Reserved, always 0.
2408c2ecf20Sopenharmony_ci *  Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver
2418c2ecf20Sopenharmony_ci *	   are internally connected together to allow diagnostic operations. In
2428c2ecf20Sopenharmony_ci *	   addition, the UART modem control outputs are connected to the UART
2438c2ecf20Sopenharmony_ci *	   modem control inputs. CTS is connected to RTS, DTR is connected to
2448c2ecf20Sopenharmony_ci *	   DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD.
2458c2ecf20Sopenharmony_ci *  Bit 3: OUT 2. An auxiliary output that the host processor may set high or
2468c2ecf20Sopenharmony_ci *	   low. In the IBM PC serial adapter (and most clones), OUT 2 is used
2478c2ecf20Sopenharmony_ci *	   to tri-state (disable) the interrupt signal from the
2488c2ecf20Sopenharmony_ci *	   8250/16450/16550 UART.
2498c2ecf20Sopenharmony_ci *  Bit 2: OUT 1. An auxiliary output that the host processor may set high or
2508c2ecf20Sopenharmony_ci *	   low. This output is not used on the IBM PC serial adapter.
2518c2ecf20Sopenharmony_ci *  Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS
2528c2ecf20Sopenharmony_ci *	   line is Low (Active).
2538c2ecf20Sopenharmony_ci *  Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART
2548c2ecf20Sopenharmony_ci *	   -DTR line is Low (Active).
2558c2ecf20Sopenharmony_ci *
2568c2ecf20Sopenharmony_ci *  SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been
2578c2ecf20Sopenharmony_ci *  seen _always_ set.
2588c2ecf20Sopenharmony_ci *
2598c2ecf20Sopenharmony_ci *
2608c2ecf20Sopenharmony_ci * Modem Status Register (MSR)
2618c2ecf20Sopenharmony_ci * ---------------------------
2628c2ecf20Sopenharmony_ci *
2638c2ecf20Sopenharmony_ci *  BmRequestType:  0xc0  (1100 0000B)
2648c2ecf20Sopenharmony_ci *  bRequest:       0x02
2658c2ecf20Sopenharmony_ci *  wValue:         0x0000
2668c2ecf20Sopenharmony_ci *  wIndex:         0x0000
2678c2ecf20Sopenharmony_ci *  wLength:        0x0001
2688c2ecf20Sopenharmony_ci *  Data:           MSR (see below)
2698c2ecf20Sopenharmony_ci *
2708c2ecf20Sopenharmony_ci *  Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the
2718c2ecf20Sopenharmony_ci *	   UART.
2728c2ecf20Sopenharmony_ci *  Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART.
2738c2ecf20Sopenharmony_ci *  Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART.
2748c2ecf20Sopenharmony_ci *  Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART.
2758c2ecf20Sopenharmony_ci *  Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has
2768c2ecf20Sopenharmony_ci *	   changed state one more more times since the last time the MSR was
2778c2ecf20Sopenharmony_ci *	   read by the host.
2788c2ecf20Sopenharmony_ci *  Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has
2798c2ecf20Sopenharmony_ci *	   had a low to high transition since the last time the MSR was read by
2808c2ecf20Sopenharmony_ci *	   the host.
2818c2ecf20Sopenharmony_ci *  Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed
2828c2ecf20Sopenharmony_ci *	   state one more more times since the last time the MSR was read by the
2838c2ecf20Sopenharmony_ci *	   host.
2848c2ecf20Sopenharmony_ci *  Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed
2858c2ecf20Sopenharmony_ci *	   state one more times since the last time the MSR was read by the
2868c2ecf20Sopenharmony_ci *	   host.
2878c2ecf20Sopenharmony_ci *
2888c2ecf20Sopenharmony_ci *  SniffUSB observations: the MSR is also returned as first byte on the
2898c2ecf20Sopenharmony_ci *  interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB
2908c2ecf20Sopenharmony_ci *  request to read MSR cannot be applied during normal device operation.
2918c2ecf20Sopenharmony_ci *
2928c2ecf20Sopenharmony_ci *
2938c2ecf20Sopenharmony_ci * Line Status Register (LSR)
2948c2ecf20Sopenharmony_ci * --------------------------
2958c2ecf20Sopenharmony_ci *
2968c2ecf20Sopenharmony_ci *  Bit 7   Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero.
2978c2ecf20Sopenharmony_ci *	    This bit is set to "1" when any of the bytes in the FIFO have one
2988c2ecf20Sopenharmony_ci *	    or more of the following error conditions: PE, FE, or BI.
2998c2ecf20Sopenharmony_ci *  Bit 6   Transmitter Empty (TEMT). When set to "1", there are no words
3008c2ecf20Sopenharmony_ci *	    remaining in the transmit FIFO or the transmit shift register. The
3018c2ecf20Sopenharmony_ci *	    transmitter is completely idle.
3028c2ecf20Sopenharmony_ci *  Bit 5   Transmitter Holding Register Empty (THRE). When set to "1", the
3038c2ecf20Sopenharmony_ci *	    FIFO (or holding register) now has room for at least one additional
3048c2ecf20Sopenharmony_ci *	    word to transmit. The transmitter may still be transmitting when
3058c2ecf20Sopenharmony_ci *	    this bit is set to "1".
3068c2ecf20Sopenharmony_ci *  Bit 4   Break Interrupt (BI). The receiver has detected a Break signal.
3078c2ecf20Sopenharmony_ci *  Bit 3   Framing Error (FE). A Start Bit was detected but the Stop Bit did
3088c2ecf20Sopenharmony_ci *	    not appear at the expected time. The received word is probably
3098c2ecf20Sopenharmony_ci *	    garbled.
3108c2ecf20Sopenharmony_ci *  Bit 2   Parity Error (PE). The parity bit was incorrect for the word
3118c2ecf20Sopenharmony_ci *	    received.
3128c2ecf20Sopenharmony_ci *  Bit 1   Overrun Error (OE). A new word was received and there was no room
3138c2ecf20Sopenharmony_ci *	    in the receive buffer. The newly-arrived word in the shift register
3148c2ecf20Sopenharmony_ci *	    is discarded. On 8250/16450 UARTs, the word in the holding register
3158c2ecf20Sopenharmony_ci *	    is discarded and the newly- arrived word is put in the holding
3168c2ecf20Sopenharmony_ci *	    register.
3178c2ecf20Sopenharmony_ci *  Bit 0   Data Ready (DR). One or more words are in the receive FIFO that the
3188c2ecf20Sopenharmony_ci *	    host may read. A word must be completely received and moved from
3198c2ecf20Sopenharmony_ci *	    the shift register into the FIFO (or holding register for
3208c2ecf20Sopenharmony_ci *	    8250/16450 designs) before this bit is set.
3218c2ecf20Sopenharmony_ci *
3228c2ecf20Sopenharmony_ci *  SniffUSB observations: the LSR is returned as second byte on the
3238c2ecf20Sopenharmony_ci *  interrupt-in endpoint 0x83 to signal error conditions. Such errors have
3248c2ecf20Sopenharmony_ci *  been seen with minicom/zmodem transfers (CRC errors).
3258c2ecf20Sopenharmony_ci *
3268c2ecf20Sopenharmony_ci *
3278c2ecf20Sopenharmony_ci * Unknown #1
3288c2ecf20Sopenharmony_ci * -------------------
3298c2ecf20Sopenharmony_ci *
3308c2ecf20Sopenharmony_ci *   BmRequestType:  0x40 (0100 0000B)
3318c2ecf20Sopenharmony_ci *   bRequest:       0x0b
3328c2ecf20Sopenharmony_ci *   wValue:         0x0000
3338c2ecf20Sopenharmony_ci *   wIndex:         0x0000
3348c2ecf20Sopenharmony_ci *   wLength:        0x0001
3358c2ecf20Sopenharmony_ci *   Data:           0x00
3368c2ecf20Sopenharmony_ci *
3378c2ecf20Sopenharmony_ci *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
3388c2ecf20Sopenharmony_ci *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
3398c2ecf20Sopenharmony_ci *   occurs immediately after a "Baud rate (divisor)" message.  It was not
3408c2ecf20Sopenharmony_ci *   observed at any other time.  It is unclear what purpose this message
3418c2ecf20Sopenharmony_ci *   serves.
3428c2ecf20Sopenharmony_ci *
3438c2ecf20Sopenharmony_ci *
3448c2ecf20Sopenharmony_ci * Unknown #2
3458c2ecf20Sopenharmony_ci * -------------------
3468c2ecf20Sopenharmony_ci *
3478c2ecf20Sopenharmony_ci *   BmRequestType:  0x40 (0100 0000B)
3488c2ecf20Sopenharmony_ci *   bRequest:       0x0c
3498c2ecf20Sopenharmony_ci *   wValue:         0x0000
3508c2ecf20Sopenharmony_ci *   wIndex:         0x0000
3518c2ecf20Sopenharmony_ci *   wLength:        0x0001
3528c2ecf20Sopenharmony_ci *   Data:           0x00
3538c2ecf20Sopenharmony_ci *
3548c2ecf20Sopenharmony_ci *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
3558c2ecf20Sopenharmony_ci *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
3568c2ecf20Sopenharmony_ci *   occurs immediately after the 'Unknown #1' message (see above).  It was
3578c2ecf20Sopenharmony_ci *   not observed at any other time.  It is unclear what other purpose (if
3588c2ecf20Sopenharmony_ci *   any) this message might serve, but without it, the USB/RS-232 adapter
3598c2ecf20Sopenharmony_ci *   will not write to RS-232 devices which do not assert the 'CTS' signal.
3608c2ecf20Sopenharmony_ci *
3618c2ecf20Sopenharmony_ci *
3628c2ecf20Sopenharmony_ci * Flow control
3638c2ecf20Sopenharmony_ci * ------------
3648c2ecf20Sopenharmony_ci *
3658c2ecf20Sopenharmony_ci *  SniffUSB observations: no flow control specific requests have been realized
3668c2ecf20Sopenharmony_ci *  apart from DTR/RTS settings. Both signals are dropped for no flow control
3678c2ecf20Sopenharmony_ci *  but asserted for hardware or software flow control.
3688c2ecf20Sopenharmony_ci *
3698c2ecf20Sopenharmony_ci *
3708c2ecf20Sopenharmony_ci * Endpoint usage
3718c2ecf20Sopenharmony_ci * --------------
3728c2ecf20Sopenharmony_ci *
3738c2ecf20Sopenharmony_ci *  SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint
3748c2ecf20Sopenharmony_ci *  0x81 is used to transmit and receive characters. The second interrupt-in
3758c2ecf20Sopenharmony_ci *  endpoint 0x83 signals exceptional conditions like modem line changes and
3768c2ecf20Sopenharmony_ci *  errors. The first byte returned is the MSR and the second byte the LSR.
3778c2ecf20Sopenharmony_ci *
3788c2ecf20Sopenharmony_ci *
3798c2ecf20Sopenharmony_ci * Other observations
3808c2ecf20Sopenharmony_ci * ------------------
3818c2ecf20Sopenharmony_ci *
3828c2ecf20Sopenharmony_ci *  Queued bulk transfers like used in visor.c did not work.
3838c2ecf20Sopenharmony_ci *
3848c2ecf20Sopenharmony_ci *
3858c2ecf20Sopenharmony_ci * Properties of the USB device used (as found in /var/log/messages)
3868c2ecf20Sopenharmony_ci * -----------------------------------------------------------------
3878c2ecf20Sopenharmony_ci *
3888c2ecf20Sopenharmony_ci *  Manufacturer: MCT Corporation.
3898c2ecf20Sopenharmony_ci *  Product: USB-232 Interfact Controller
3908c2ecf20Sopenharmony_ci *  SerialNumber: U2S22050
3918c2ecf20Sopenharmony_ci *
3928c2ecf20Sopenharmony_ci *    Length              = 18
3938c2ecf20Sopenharmony_ci *    DescriptorType      = 01
3948c2ecf20Sopenharmony_ci *    USB version         = 1.00
3958c2ecf20Sopenharmony_ci *    Vendor:Product      = 0711:0210
3968c2ecf20Sopenharmony_ci *    MaxPacketSize0      = 8
3978c2ecf20Sopenharmony_ci *    NumConfigurations   = 1
3988c2ecf20Sopenharmony_ci *    Device version      = 1.02
3998c2ecf20Sopenharmony_ci *    Device Class:SubClass:Protocol = 00:00:00
4008c2ecf20Sopenharmony_ci *      Per-interface classes
4018c2ecf20Sopenharmony_ci *  Configuration:
4028c2ecf20Sopenharmony_ci *    bLength             =    9
4038c2ecf20Sopenharmony_ci *    bDescriptorType     =   02
4048c2ecf20Sopenharmony_ci *    wTotalLength        = 0027
4058c2ecf20Sopenharmony_ci *    bNumInterfaces      =   01
4068c2ecf20Sopenharmony_ci *    bConfigurationValue =   01
4078c2ecf20Sopenharmony_ci *    iConfiguration      =   00
4088c2ecf20Sopenharmony_ci *    bmAttributes        =   c0
4098c2ecf20Sopenharmony_ci *    MaxPower            =  100mA
4108c2ecf20Sopenharmony_ci *
4118c2ecf20Sopenharmony_ci *    Interface: 0
4128c2ecf20Sopenharmony_ci *    Alternate Setting:  0
4138c2ecf20Sopenharmony_ci *      bLength             =    9
4148c2ecf20Sopenharmony_ci *      bDescriptorType     =   04
4158c2ecf20Sopenharmony_ci *      bInterfaceNumber    =   00
4168c2ecf20Sopenharmony_ci *      bAlternateSetting   =   00
4178c2ecf20Sopenharmony_ci *      bNumEndpoints       =   03
4188c2ecf20Sopenharmony_ci *      bInterface Class:SubClass:Protocol =   00:00:00
4198c2ecf20Sopenharmony_ci *      iInterface          =   00
4208c2ecf20Sopenharmony_ci *      Endpoint:
4218c2ecf20Sopenharmony_ci *	  bLength             =    7
4228c2ecf20Sopenharmony_ci *	  bDescriptorType     =   05
4238c2ecf20Sopenharmony_ci *	  bEndpointAddress    =   81 (in)
4248c2ecf20Sopenharmony_ci *	  bmAttributes        =   03 (Interrupt)
4258c2ecf20Sopenharmony_ci *	  wMaxPacketSize      = 0040
4268c2ecf20Sopenharmony_ci *	  bInterval           =   02
4278c2ecf20Sopenharmony_ci *      Endpoint:
4288c2ecf20Sopenharmony_ci *	  bLength             =    7
4298c2ecf20Sopenharmony_ci *	  bDescriptorType     =   05
4308c2ecf20Sopenharmony_ci *	  bEndpointAddress    =   01 (out)
4318c2ecf20Sopenharmony_ci *	  bmAttributes        =   02 (Bulk)
4328c2ecf20Sopenharmony_ci *	  wMaxPacketSize      = 0040
4338c2ecf20Sopenharmony_ci *	  bInterval           =   00
4348c2ecf20Sopenharmony_ci *      Endpoint:
4358c2ecf20Sopenharmony_ci *	  bLength             =    7
4368c2ecf20Sopenharmony_ci *	  bDescriptorType     =   05
4378c2ecf20Sopenharmony_ci *	  bEndpointAddress    =   83 (in)
4388c2ecf20Sopenharmony_ci *	  bmAttributes        =   03 (Interrupt)
4398c2ecf20Sopenharmony_ci *	  wMaxPacketSize      = 0002
4408c2ecf20Sopenharmony_ci *	  bInterval           =   02
4418c2ecf20Sopenharmony_ci *
4428c2ecf20Sopenharmony_ci *
4438c2ecf20Sopenharmony_ci * Hardware details (added by Martin Hamilton, 2001/12/06)
4448c2ecf20Sopenharmony_ci * -----------------------------------------------------------------
4458c2ecf20Sopenharmony_ci *
4468c2ecf20Sopenharmony_ci * This info was gleaned from opening a Belkin F5U109 DB9 USB serial
4478c2ecf20Sopenharmony_ci * adaptor, which turns out to simply be a re-badged U232-P9.  We
4488c2ecf20Sopenharmony_ci * know this because there is a sticky label on the circuit board
4498c2ecf20Sopenharmony_ci * which says "U232-P9" ;-)
4508c2ecf20Sopenharmony_ci *
4518c2ecf20Sopenharmony_ci * The circuit board inside the adaptor contains a Philips PDIUSBD12
4528c2ecf20Sopenharmony_ci * USB endpoint chip and a Philips P87C52UBAA microcontroller with
4538c2ecf20Sopenharmony_ci * embedded UART.  Exhaustive documentation for these is available at:
4548c2ecf20Sopenharmony_ci *
4558c2ecf20Sopenharmony_ci *   http://www.semiconductors.philips.com/pip/p87c52ubaa
4568c2ecf20Sopenharmony_ci *   http://www.nxp.com/acrobat_download/various/PDIUSBD12_PROGRAMMING_GUIDE.pdf
4578c2ecf20Sopenharmony_ci *
4588c2ecf20Sopenharmony_ci * Thanks to Julian Highfield for the pointer to the Philips database.
4598c2ecf20Sopenharmony_ci *
4608c2ecf20Sopenharmony_ci */
4618c2ecf20Sopenharmony_ci
4628c2ecf20Sopenharmony_ci#endif /* __LINUX_USB_SERIAL_MCT_U232_H */
4638c2ecf20Sopenharmony_ci
464