18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Driver for the NXP ISP1760 chip
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright 2014 Laurent Pinchart
68c2ecf20Sopenharmony_ci * Copyright 2007 Sebastian Siewior
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci * Contacts:
98c2ecf20Sopenharmony_ci *	Sebastian Siewior <bigeasy@linutronix.de>
108c2ecf20Sopenharmony_ci *	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
118c2ecf20Sopenharmony_ci */
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci#ifndef _ISP1760_CORE_H_
148c2ecf20Sopenharmony_ci#define _ISP1760_CORE_H_
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci#include <linux/ioport.h>
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#include "isp1760-hcd.h"
198c2ecf20Sopenharmony_ci#include "isp1760-udc.h"
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_cistruct device;
228c2ecf20Sopenharmony_cistruct gpio_desc;
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci/*
258c2ecf20Sopenharmony_ci * Device flags that can vary from board to board.  All of these
268c2ecf20Sopenharmony_ci * indicate the most "atypical" case, so that a devflags of 0 is
278c2ecf20Sopenharmony_ci * a sane default configuration.
288c2ecf20Sopenharmony_ci */
298c2ecf20Sopenharmony_ci#define ISP1760_FLAG_BUS_WIDTH_16	0x00000002 /* 16-bit data bus width */
308c2ecf20Sopenharmony_ci#define ISP1760_FLAG_OTG_EN		0x00000004 /* Port 1 supports OTG */
318c2ecf20Sopenharmony_ci#define ISP1760_FLAG_ANALOG_OC		0x00000008 /* Analog overcurrent */
328c2ecf20Sopenharmony_ci#define ISP1760_FLAG_DACK_POL_HIGH	0x00000010 /* DACK active high */
338c2ecf20Sopenharmony_ci#define ISP1760_FLAG_DREQ_POL_HIGH	0x00000020 /* DREQ active high */
348c2ecf20Sopenharmony_ci#define ISP1760_FLAG_ISP1761		0x00000040 /* Chip is ISP1761 */
358c2ecf20Sopenharmony_ci#define ISP1760_FLAG_INTR_POL_HIGH	0x00000080 /* Interrupt polarity active high */
368c2ecf20Sopenharmony_ci#define ISP1760_FLAG_INTR_EDGE_TRIG	0x00000100 /* Interrupt edge triggered */
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_cistruct isp1760_device {
398c2ecf20Sopenharmony_ci	struct device *dev;
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci	void __iomem *regs;
428c2ecf20Sopenharmony_ci	unsigned int devflags;
438c2ecf20Sopenharmony_ci	struct gpio_desc *rst_gpio;
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci	struct isp1760_hcd hcd;
468c2ecf20Sopenharmony_ci	struct isp1760_udc udc;
478c2ecf20Sopenharmony_ci};
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ciint isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
508c2ecf20Sopenharmony_ci		     struct device *dev, unsigned int devflags);
518c2ecf20Sopenharmony_civoid isp1760_unregister(struct device *dev);
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_civoid isp1760_set_pullup(struct isp1760_device *isp, bool enable);
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_cistatic inline u32 isp1760_read32(void __iomem *base, u32 reg)
568c2ecf20Sopenharmony_ci{
578c2ecf20Sopenharmony_ci	return readl(base + reg);
588c2ecf20Sopenharmony_ci}
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_cistatic inline void isp1760_write32(void __iomem *base, u32 reg, u32 val)
618c2ecf20Sopenharmony_ci{
628c2ecf20Sopenharmony_ci	writel(val, base + reg);
638c2ecf20Sopenharmony_ci}
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci#endif
66