1// SPDX-License-Identifier: GPL-2.0
2/*
3 * UHCI HCD (Host Controller Driver) PCI Bus Glue.
4 *
5 * Extracted from uhci-hcd.c:
6 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
7 *
8 * (C) Copyright 1999 Linus Torvalds
9 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
10 * (C) Copyright 1999 Randy Dunlap
11 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
12 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
13 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
14 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
15 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
16 *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
17 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
18 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
19 */
20
21#include "pci-quirks.h"
22
23/*
24 * Make sure the controller is completely inactive, unable to
25 * generate interrupts or do DMA.
26 */
27static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
28{
29	uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
30}
31
32/*
33 * Initialize a controller that was newly discovered or has just been
34 * resumed.  In either case we can't be sure of its previous state.
35 *
36 * Returns: 1 if the controller was reset, 0 otherwise.
37 */
38static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
39{
40	return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
41				uhci->io_addr);
42}
43
44/*
45 * Store the basic register settings needed by the controller.
46 * This function is called at the end of configure_hc in uhci-hcd.c.
47 */
48static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
49{
50	struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
51
52	/* Enable PIRQ */
53	pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
54
55	/* Disable platform-specific non-PME# wakeup */
56	if (pdev->vendor == PCI_VENDOR_ID_INTEL)
57		pci_write_config_byte(pdev, USBRES_INTEL, 0);
58}
59
60static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
61{
62	int port;
63
64	switch (to_pci_dev(uhci_dev(uhci))->vendor) {
65	default:
66		break;
67
68	case PCI_VENDOR_ID_GENESYS:
69		/* Genesys Logic's GL880S controllers don't generate
70		 * resume-detect interrupts.
71		 */
72		return 1;
73
74	case PCI_VENDOR_ID_INTEL:
75		/* Some of Intel's USB controllers have a bug that causes
76		 * resume-detect interrupts if any port has an over-current
77		 * condition.  To make matters worse, some motherboards
78		 * hardwire unused USB ports' over-current inputs active!
79		 * To prevent problems, we will not enable resume-detect
80		 * interrupts if any ports are OC.
81		 */
82		for (port = 0; port < uhci->rh_numports; ++port) {
83			if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
84					USBPORTSC_OC)
85				return 1;
86		}
87		break;
88	}
89	return 0;
90}
91
92static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
93{
94	int port;
95	const char *sys_info;
96	static const char bad_Asus_board[] = "A7V8X";
97
98	/* One of Asus's motherboards has a bug which causes it to
99	 * wake up immediately from suspend-to-RAM if any of the ports
100	 * are connected.  In such cases we will not set EGSM.
101	 */
102	sys_info = dmi_get_system_info(DMI_BOARD_NAME);
103	if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
104		for (port = 0; port < uhci->rh_numports; ++port) {
105			if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
106					USBPORTSC_CCS)
107				return 1;
108		}
109	}
110
111	return 0;
112}
113
114static int uhci_pci_init(struct usb_hcd *hcd)
115{
116	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
117
118	uhci->io_addr = (unsigned long) hcd->rsrc_start;
119
120	uhci->rh_numports = uhci_count_ports(hcd);
121
122	/*
123	 * Intel controllers report the OverCurrent bit active on.  VIA
124	 * and ZHAOXIN controllers report it active off, so we'll adjust
125	 * the bit value.  (It's not standardized in the UHCI spec.)
126	 */
127	if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA ||
128			to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_ZHAOXIN)
129		uhci->oc_low = 1;
130
131	/* HP's server management chip requires a longer port reset delay. */
132	if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
133		uhci->wait_for_hp = 1;
134
135	/* Intel controllers use non-PME wakeup signalling */
136	if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_INTEL)
137		device_set_wakeup_capable(uhci_dev(uhci), true);
138
139	/* Set up pointers to PCI-specific functions */
140	uhci->reset_hc = uhci_pci_reset_hc;
141	uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
142	uhci->configure_hc = uhci_pci_configure_hc;
143	uhci->resume_detect_interrupts_are_broken =
144		uhci_pci_resume_detect_interrupts_are_broken;
145	uhci->global_suspend_mode_is_broken =
146		uhci_pci_global_suspend_mode_is_broken;
147
148
149	/* Kick BIOS off this hardware and reset if the controller
150	 * isn't already safely quiescent.
151	 */
152	check_and_reset_hc(uhci);
153	return 0;
154}
155
156/* Make sure the controller is quiescent and that we're not using it
157 * any more.  This is mainly for the benefit of programs which, like kexec,
158 * expect the hardware to be idle: not doing DMA or generating IRQs.
159 *
160 * This routine may be called in a damaged or failing kernel.  Hence we
161 * do not acquire the spinlock before shutting down the controller.
162 */
163static void uhci_shutdown(struct pci_dev *pdev)
164{
165	struct usb_hcd *hcd = pci_get_drvdata(pdev);
166
167	uhci_hc_died(hcd_to_uhci(hcd));
168}
169
170#ifdef CONFIG_PM
171
172static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated);
173
174static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
175{
176	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
177	struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
178	int rc = 0;
179
180	dev_dbg(uhci_dev(uhci), "%s\n", __func__);
181
182	spin_lock_irq(&uhci->lock);
183	if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
184		goto done_okay;		/* Already suspended or dead */
185
186	/* All PCI host controllers are required to disable IRQ generation
187	 * at the source, so we must turn off PIRQ.
188	 */
189	pci_write_config_word(pdev, USBLEGSUP, 0);
190	clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
191
192	/* Enable platform-specific non-PME# wakeup */
193	if (do_wakeup) {
194		if (pdev->vendor == PCI_VENDOR_ID_INTEL)
195			pci_write_config_byte(pdev, USBRES_INTEL,
196					USBPORT1EN | USBPORT2EN);
197	}
198
199done_okay:
200	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
201	spin_unlock_irq(&uhci->lock);
202
203	synchronize_irq(hcd->irq);
204
205	/* Check for race with a wakeup request */
206	if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
207		uhci_pci_resume(hcd, false);
208		rc = -EBUSY;
209	}
210	return rc;
211}
212
213static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
214{
215	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
216
217	dev_dbg(uhci_dev(uhci), "%s\n", __func__);
218
219	/* Since we aren't in D3 any more, it's safe to set this flag
220	 * even if the controller was dead.
221	 */
222	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
223
224	spin_lock_irq(&uhci->lock);
225
226	/* Make sure resume from hibernation re-enumerates everything */
227	if (hibernated) {
228		uhci->reset_hc(uhci);
229		finish_reset(uhci);
230	}
231
232	/* The firmware may have changed the controller settings during
233	 * a system wakeup.  Check it and reconfigure to avoid problems.
234	 */
235	else {
236		check_and_reset_hc(uhci);
237	}
238	configure_hc(uhci);
239
240	/* Tell the core if the controller had to be reset */
241	if (uhci->rh_state == UHCI_RH_RESET)
242		usb_root_hub_lost_power(hcd->self.root_hub);
243
244	spin_unlock_irq(&uhci->lock);
245
246	/* If interrupts don't work and remote wakeup is enabled then
247	 * the suspended root hub needs to be polled.
248	 */
249	if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
250		set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
251
252	/* Does the root hub have a port wakeup pending? */
253	usb_hcd_poll_rh_status(hcd);
254	return 0;
255}
256
257#endif
258
259static const struct hc_driver uhci_driver = {
260	.description =		hcd_name,
261	.product_desc =		"UHCI Host Controller",
262	.hcd_priv_size =	sizeof(struct uhci_hcd),
263
264	/* Generic hardware linkage */
265	.irq =			uhci_irq,
266	.flags =		HCD_DMA | HCD_USB11,
267
268	/* Basic lifecycle operations */
269	.reset =		uhci_pci_init,
270	.start =		uhci_start,
271#ifdef CONFIG_PM
272	.pci_suspend =		uhci_pci_suspend,
273	.pci_resume =		uhci_pci_resume,
274	.bus_suspend =		uhci_rh_suspend,
275	.bus_resume =		uhci_rh_resume,
276#endif
277	.stop =			uhci_stop,
278
279	.urb_enqueue =		uhci_urb_enqueue,
280	.urb_dequeue =		uhci_urb_dequeue,
281
282	.endpoint_disable =	uhci_hcd_endpoint_disable,
283	.get_frame_number =	uhci_hcd_get_frame_number,
284
285	.hub_status_data =	uhci_hub_status_data,
286	.hub_control =		uhci_hub_control,
287};
288
289static const struct pci_device_id uhci_pci_ids[] = { {
290	/* handle any USB UHCI controller */
291	PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
292	}, { /* end: all zeroes */ }
293};
294
295MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
296
297static int uhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
298{
299	return usb_hcd_pci_probe(dev, id, &uhci_driver);
300}
301
302static struct pci_driver uhci_pci_driver = {
303	.name =		hcd_name,
304	.id_table =	uhci_pci_ids,
305
306	.probe =	uhci_pci_probe,
307	.remove =	usb_hcd_pci_remove,
308	.shutdown =	uhci_shutdown,
309
310#ifdef CONFIG_PM
311	.driver =	{
312		.pm =	&usb_hcd_pci_pm_ops
313	},
314#endif
315};
316
317MODULE_SOFTDEP("pre: ehci_pci");
318