1// SPDX-License-Identifier: GPL-2.0 2/* 3 * FOTG210 UDC Driver supports Bulk transfer so far 4 * 5 * Copyright (C) 2013 Faraday Technology Corporation 6 * 7 * Author : Yuan-Hsin Chen <yhchen@faraday-tech.com> 8 */ 9 10#include <linux/dma-mapping.h> 11#include <linux/err.h> 12#include <linux/interrupt.h> 13#include <linux/io.h> 14#include <linux/module.h> 15#include <linux/platform_device.h> 16#include <linux/usb/ch9.h> 17#include <linux/usb/gadget.h> 18 19#include "fotg210.h" 20 21#define DRIVER_DESC "FOTG210 USB Device Controller Driver" 22#define DRIVER_VERSION "30-April-2013" 23 24static const char udc_name[] = "fotg210_udc"; 25static const char * const fotg210_ep_name[] = { 26 "ep0", "ep1", "ep2", "ep3", "ep4"}; 27 28static void fotg210_disable_fifo_int(struct fotg210_ep *ep) 29{ 30 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); 31 32 if (ep->dir_in) 33 value |= DMISGR1_MF_IN_INT(ep->epnum - 1); 34 else 35 value |= DMISGR1_MF_OUTSPK_INT(ep->epnum - 1); 36 iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1); 37} 38 39static void fotg210_enable_fifo_int(struct fotg210_ep *ep) 40{ 41 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); 42 43 if (ep->dir_in) 44 value &= ~DMISGR1_MF_IN_INT(ep->epnum - 1); 45 else 46 value &= ~DMISGR1_MF_OUTSPK_INT(ep->epnum - 1); 47 iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1); 48} 49 50static void fotg210_set_cxdone(struct fotg210_udc *fotg210) 51{ 52 u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); 53 54 value |= DCFESR_CX_DONE; 55 iowrite32(value, fotg210->reg + FOTG210_DCFESR); 56} 57 58static void fotg210_done(struct fotg210_ep *ep, struct fotg210_request *req, 59 int status) 60{ 61 list_del_init(&req->queue); 62 63 /* don't modify queue heads during completion callback */ 64 if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN) 65 req->req.status = -ESHUTDOWN; 66 else 67 req->req.status = status; 68 69 spin_unlock(&ep->fotg210->lock); 70 usb_gadget_giveback_request(&ep->ep, &req->req); 71 spin_lock(&ep->fotg210->lock); 72 73 if (ep->epnum) { 74 if (list_empty(&ep->queue)) 75 fotg210_disable_fifo_int(ep); 76 } else { 77 fotg210_set_cxdone(ep->fotg210); 78 } 79} 80 81static void fotg210_fifo_ep_mapping(struct fotg210_ep *ep, u32 epnum, 82 u32 dir_in) 83{ 84 struct fotg210_udc *fotg210 = ep->fotg210; 85 u32 val; 86 87 /* Driver should map an ep to a fifo and then map the fifo 88 * to the ep. What a brain-damaged design! 89 */ 90 91 /* map a fifo to an ep */ 92 val = ioread32(fotg210->reg + FOTG210_EPMAP); 93 val &= ~EPMAP_FIFONOMSK(epnum, dir_in); 94 val |= EPMAP_FIFONO(epnum, dir_in); 95 iowrite32(val, fotg210->reg + FOTG210_EPMAP); 96 97 /* map the ep to the fifo */ 98 val = ioread32(fotg210->reg + FOTG210_FIFOMAP); 99 val &= ~FIFOMAP_EPNOMSK(epnum); 100 val |= FIFOMAP_EPNO(epnum); 101 iowrite32(val, fotg210->reg + FOTG210_FIFOMAP); 102 103 /* enable fifo */ 104 val = ioread32(fotg210->reg + FOTG210_FIFOCF); 105 val |= FIFOCF_FIFO_EN(epnum - 1); 106 iowrite32(val, fotg210->reg + FOTG210_FIFOCF); 107} 108 109static void fotg210_set_fifo_dir(struct fotg210_ep *ep, u32 epnum, u32 dir_in) 110{ 111 struct fotg210_udc *fotg210 = ep->fotg210; 112 u32 val; 113 114 val = ioread32(fotg210->reg + FOTG210_FIFOMAP); 115 val |= (dir_in ? FIFOMAP_DIRIN(epnum - 1) : FIFOMAP_DIROUT(epnum - 1)); 116 iowrite32(val, fotg210->reg + FOTG210_FIFOMAP); 117} 118 119static void fotg210_set_tfrtype(struct fotg210_ep *ep, u32 epnum, u32 type) 120{ 121 struct fotg210_udc *fotg210 = ep->fotg210; 122 u32 val; 123 124 val = ioread32(fotg210->reg + FOTG210_FIFOCF); 125 val |= FIFOCF_TYPE(type, epnum - 1); 126 iowrite32(val, fotg210->reg + FOTG210_FIFOCF); 127} 128 129static void fotg210_set_mps(struct fotg210_ep *ep, u32 epnum, u32 mps, 130 u32 dir_in) 131{ 132 struct fotg210_udc *fotg210 = ep->fotg210; 133 u32 val; 134 u32 offset = dir_in ? FOTG210_INEPMPSR(epnum) : 135 FOTG210_OUTEPMPSR(epnum); 136 137 val = ioread32(fotg210->reg + offset); 138 val |= INOUTEPMPSR_MPS(mps); 139 iowrite32(val, fotg210->reg + offset); 140} 141 142static int fotg210_config_ep(struct fotg210_ep *ep, 143 const struct usb_endpoint_descriptor *desc) 144{ 145 struct fotg210_udc *fotg210 = ep->fotg210; 146 147 fotg210_set_fifo_dir(ep, ep->epnum, ep->dir_in); 148 fotg210_set_tfrtype(ep, ep->epnum, ep->type); 149 fotg210_set_mps(ep, ep->epnum, ep->ep.maxpacket, ep->dir_in); 150 fotg210_fifo_ep_mapping(ep, ep->epnum, ep->dir_in); 151 152 fotg210->ep[ep->epnum] = ep; 153 154 return 0; 155} 156 157static int fotg210_ep_enable(struct usb_ep *_ep, 158 const struct usb_endpoint_descriptor *desc) 159{ 160 struct fotg210_ep *ep; 161 162 ep = container_of(_ep, struct fotg210_ep, ep); 163 164 ep->desc = desc; 165 ep->epnum = usb_endpoint_num(desc); 166 ep->type = usb_endpoint_type(desc); 167 ep->dir_in = usb_endpoint_dir_in(desc); 168 ep->ep.maxpacket = usb_endpoint_maxp(desc); 169 170 return fotg210_config_ep(ep, desc); 171} 172 173static void fotg210_reset_tseq(struct fotg210_udc *fotg210, u8 epnum) 174{ 175 struct fotg210_ep *ep = fotg210->ep[epnum]; 176 u32 value; 177 void __iomem *reg; 178 179 reg = (ep->dir_in) ? 180 fotg210->reg + FOTG210_INEPMPSR(epnum) : 181 fotg210->reg + FOTG210_OUTEPMPSR(epnum); 182 183 /* Note: Driver needs to set and clear INOUTEPMPSR_RESET_TSEQ 184 * bit. Controller wouldn't clear this bit. WTF!!! 185 */ 186 187 value = ioread32(reg); 188 value |= INOUTEPMPSR_RESET_TSEQ; 189 iowrite32(value, reg); 190 191 value = ioread32(reg); 192 value &= ~INOUTEPMPSR_RESET_TSEQ; 193 iowrite32(value, reg); 194} 195 196static int fotg210_ep_release(struct fotg210_ep *ep) 197{ 198 if (!ep->epnum) 199 return 0; 200 ep->epnum = 0; 201 ep->stall = 0; 202 ep->wedged = 0; 203 204 fotg210_reset_tseq(ep->fotg210, ep->epnum); 205 206 return 0; 207} 208 209static int fotg210_ep_disable(struct usb_ep *_ep) 210{ 211 struct fotg210_ep *ep; 212 struct fotg210_request *req; 213 unsigned long flags; 214 215 BUG_ON(!_ep); 216 217 ep = container_of(_ep, struct fotg210_ep, ep); 218 219 while (!list_empty(&ep->queue)) { 220 req = list_entry(ep->queue.next, 221 struct fotg210_request, queue); 222 spin_lock_irqsave(&ep->fotg210->lock, flags); 223 fotg210_done(ep, req, -ECONNRESET); 224 spin_unlock_irqrestore(&ep->fotg210->lock, flags); 225 } 226 227 return fotg210_ep_release(ep); 228} 229 230static struct usb_request *fotg210_ep_alloc_request(struct usb_ep *_ep, 231 gfp_t gfp_flags) 232{ 233 struct fotg210_request *req; 234 235 req = kzalloc(sizeof(struct fotg210_request), gfp_flags); 236 if (!req) 237 return NULL; 238 239 INIT_LIST_HEAD(&req->queue); 240 241 return &req->req; 242} 243 244static void fotg210_ep_free_request(struct usb_ep *_ep, 245 struct usb_request *_req) 246{ 247 struct fotg210_request *req; 248 249 req = container_of(_req, struct fotg210_request, req); 250 kfree(req); 251} 252 253static void fotg210_enable_dma(struct fotg210_ep *ep, 254 dma_addr_t d, u32 len) 255{ 256 u32 value; 257 struct fotg210_udc *fotg210 = ep->fotg210; 258 259 /* set transfer length and direction */ 260 value = ioread32(fotg210->reg + FOTG210_DMACPSR1); 261 value &= ~(DMACPSR1_DMA_LEN(0xFFFF) | DMACPSR1_DMA_TYPE(1)); 262 value |= DMACPSR1_DMA_LEN(len) | DMACPSR1_DMA_TYPE(ep->dir_in); 263 iowrite32(value, fotg210->reg + FOTG210_DMACPSR1); 264 265 /* set device DMA target FIFO number */ 266 value = ioread32(fotg210->reg + FOTG210_DMATFNR); 267 if (ep->epnum) 268 value |= DMATFNR_ACC_FN(ep->epnum - 1); 269 else 270 value |= DMATFNR_ACC_CXF; 271 iowrite32(value, fotg210->reg + FOTG210_DMATFNR); 272 273 /* set DMA memory address */ 274 iowrite32(d, fotg210->reg + FOTG210_DMACPSR2); 275 276 /* enable MDMA_EROR and MDMA_CMPLT interrupt */ 277 value = ioread32(fotg210->reg + FOTG210_DMISGR2); 278 value &= ~(DMISGR2_MDMA_CMPLT | DMISGR2_MDMA_ERROR); 279 iowrite32(value, fotg210->reg + FOTG210_DMISGR2); 280 281 /* start DMA */ 282 value = ioread32(fotg210->reg + FOTG210_DMACPSR1); 283 value |= DMACPSR1_DMA_START; 284 iowrite32(value, fotg210->reg + FOTG210_DMACPSR1); 285} 286 287static void fotg210_disable_dma(struct fotg210_ep *ep) 288{ 289 iowrite32(DMATFNR_DISDMA, ep->fotg210->reg + FOTG210_DMATFNR); 290} 291 292static void fotg210_wait_dma_done(struct fotg210_ep *ep) 293{ 294 u32 value; 295 296 do { 297 value = ioread32(ep->fotg210->reg + FOTG210_DISGR2); 298 if ((value & DISGR2_USBRST_INT) || 299 (value & DISGR2_DMA_ERROR)) 300 goto dma_reset; 301 } while (!(value & DISGR2_DMA_CMPLT)); 302 303 value &= ~DISGR2_DMA_CMPLT; 304 iowrite32(value, ep->fotg210->reg + FOTG210_DISGR2); 305 return; 306 307dma_reset: 308 value = ioread32(ep->fotg210->reg + FOTG210_DMACPSR1); 309 value |= DMACPSR1_DMA_ABORT; 310 iowrite32(value, ep->fotg210->reg + FOTG210_DMACPSR1); 311 312 /* reset fifo */ 313 if (ep->epnum) { 314 value = ioread32(ep->fotg210->reg + 315 FOTG210_FIBCR(ep->epnum - 1)); 316 value |= FIBCR_FFRST; 317 iowrite32(value, ep->fotg210->reg + 318 FOTG210_FIBCR(ep->epnum - 1)); 319 } else { 320 value = ioread32(ep->fotg210->reg + FOTG210_DCFESR); 321 value |= DCFESR_CX_CLR; 322 iowrite32(value, ep->fotg210->reg + FOTG210_DCFESR); 323 } 324} 325 326static void fotg210_start_dma(struct fotg210_ep *ep, 327 struct fotg210_request *req) 328{ 329 struct device *dev = &ep->fotg210->gadget.dev; 330 dma_addr_t d; 331 u8 *buffer; 332 u32 length; 333 334 if (ep->epnum) { 335 if (ep->dir_in) { 336 buffer = req->req.buf; 337 length = req->req.length; 338 } else { 339 buffer = req->req.buf + req->req.actual; 340 length = ioread32(ep->fotg210->reg + 341 FOTG210_FIBCR(ep->epnum - 1)) & FIBCR_BCFX; 342 if (length > req->req.length - req->req.actual) 343 length = req->req.length - req->req.actual; 344 } 345 } else { 346 buffer = req->req.buf + req->req.actual; 347 if (req->req.length - req->req.actual > ep->ep.maxpacket) 348 length = ep->ep.maxpacket; 349 else 350 length = req->req.length - req->req.actual; 351 } 352 353 d = dma_map_single(dev, buffer, length, 354 ep->dir_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); 355 356 if (dma_mapping_error(dev, d)) { 357 pr_err("dma_mapping_error\n"); 358 return; 359 } 360 361 fotg210_enable_dma(ep, d, length); 362 363 /* check if dma is done */ 364 fotg210_wait_dma_done(ep); 365 366 fotg210_disable_dma(ep); 367 368 /* update actual transfer length */ 369 req->req.actual += length; 370 371 dma_unmap_single(dev, d, length, DMA_TO_DEVICE); 372} 373 374static void fotg210_ep0_queue(struct fotg210_ep *ep, 375 struct fotg210_request *req) 376{ 377 if (!req->req.length) { 378 fotg210_done(ep, req, 0); 379 return; 380 } 381 if (ep->dir_in) { /* if IN */ 382 fotg210_start_dma(ep, req); 383 if (req->req.length == req->req.actual) 384 fotg210_done(ep, req, 0); 385 } else { /* OUT */ 386 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR0); 387 388 value &= ~DMISGR0_MCX_OUT_INT; 389 iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR0); 390 } 391} 392 393static int fotg210_ep_queue(struct usb_ep *_ep, struct usb_request *_req, 394 gfp_t gfp_flags) 395{ 396 struct fotg210_ep *ep; 397 struct fotg210_request *req; 398 unsigned long flags; 399 int request = 0; 400 401 ep = container_of(_ep, struct fotg210_ep, ep); 402 req = container_of(_req, struct fotg210_request, req); 403 404 if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN) 405 return -ESHUTDOWN; 406 407 spin_lock_irqsave(&ep->fotg210->lock, flags); 408 409 if (list_empty(&ep->queue)) 410 request = 1; 411 412 list_add_tail(&req->queue, &ep->queue); 413 414 req->req.actual = 0; 415 req->req.status = -EINPROGRESS; 416 417 if (!ep->epnum) /* ep0 */ 418 fotg210_ep0_queue(ep, req); 419 else if (request && !ep->stall) 420 fotg210_enable_fifo_int(ep); 421 422 spin_unlock_irqrestore(&ep->fotg210->lock, flags); 423 424 return 0; 425} 426 427static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 428{ 429 struct fotg210_ep *ep; 430 struct fotg210_request *req; 431 unsigned long flags; 432 433 ep = container_of(_ep, struct fotg210_ep, ep); 434 req = container_of(_req, struct fotg210_request, req); 435 436 spin_lock_irqsave(&ep->fotg210->lock, flags); 437 if (!list_empty(&ep->queue)) 438 fotg210_done(ep, req, -ECONNRESET); 439 spin_unlock_irqrestore(&ep->fotg210->lock, flags); 440 441 return 0; 442} 443 444static void fotg210_set_epnstall(struct fotg210_ep *ep) 445{ 446 struct fotg210_udc *fotg210 = ep->fotg210; 447 u32 value; 448 void __iomem *reg; 449 450 /* check if IN FIFO is empty before stall */ 451 if (ep->dir_in) { 452 do { 453 value = ioread32(fotg210->reg + FOTG210_DCFESR); 454 } while (!(value & DCFESR_FIFO_EMPTY(ep->epnum - 1))); 455 } 456 457 reg = (ep->dir_in) ? 458 fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : 459 fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); 460 value = ioread32(reg); 461 value |= INOUTEPMPSR_STL_EP; 462 iowrite32(value, reg); 463} 464 465static void fotg210_clear_epnstall(struct fotg210_ep *ep) 466{ 467 struct fotg210_udc *fotg210 = ep->fotg210; 468 u32 value; 469 void __iomem *reg; 470 471 reg = (ep->dir_in) ? 472 fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : 473 fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); 474 value = ioread32(reg); 475 value &= ~INOUTEPMPSR_STL_EP; 476 iowrite32(value, reg); 477} 478 479static int fotg210_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge) 480{ 481 struct fotg210_ep *ep; 482 struct fotg210_udc *fotg210; 483 unsigned long flags; 484 485 ep = container_of(_ep, struct fotg210_ep, ep); 486 487 fotg210 = ep->fotg210; 488 489 spin_lock_irqsave(&ep->fotg210->lock, flags); 490 491 if (value) { 492 fotg210_set_epnstall(ep); 493 ep->stall = 1; 494 if (wedge) 495 ep->wedged = 1; 496 } else { 497 fotg210_reset_tseq(fotg210, ep->epnum); 498 fotg210_clear_epnstall(ep); 499 ep->stall = 0; 500 ep->wedged = 0; 501 if (!list_empty(&ep->queue)) 502 fotg210_enable_fifo_int(ep); 503 } 504 505 spin_unlock_irqrestore(&ep->fotg210->lock, flags); 506 return 0; 507} 508 509static int fotg210_ep_set_halt(struct usb_ep *_ep, int value) 510{ 511 return fotg210_set_halt_and_wedge(_ep, value, 0); 512} 513 514static int fotg210_ep_set_wedge(struct usb_ep *_ep) 515{ 516 return fotg210_set_halt_and_wedge(_ep, 1, 1); 517} 518 519static void fotg210_ep_fifo_flush(struct usb_ep *_ep) 520{ 521} 522 523static const struct usb_ep_ops fotg210_ep_ops = { 524 .enable = fotg210_ep_enable, 525 .disable = fotg210_ep_disable, 526 527 .alloc_request = fotg210_ep_alloc_request, 528 .free_request = fotg210_ep_free_request, 529 530 .queue = fotg210_ep_queue, 531 .dequeue = fotg210_ep_dequeue, 532 533 .set_halt = fotg210_ep_set_halt, 534 .fifo_flush = fotg210_ep_fifo_flush, 535 .set_wedge = fotg210_ep_set_wedge, 536}; 537 538static void fotg210_clear_tx0byte(struct fotg210_udc *fotg210) 539{ 540 u32 value = ioread32(fotg210->reg + FOTG210_TX0BYTE); 541 542 value &= ~(TX0BYTE_EP1 | TX0BYTE_EP2 | TX0BYTE_EP3 543 | TX0BYTE_EP4); 544 iowrite32(value, fotg210->reg + FOTG210_TX0BYTE); 545} 546 547static void fotg210_clear_rx0byte(struct fotg210_udc *fotg210) 548{ 549 u32 value = ioread32(fotg210->reg + FOTG210_RX0BYTE); 550 551 value &= ~(RX0BYTE_EP1 | RX0BYTE_EP2 | RX0BYTE_EP3 552 | RX0BYTE_EP4); 553 iowrite32(value, fotg210->reg + FOTG210_RX0BYTE); 554} 555 556/* read 8-byte setup packet only */ 557static void fotg210_rdsetupp(struct fotg210_udc *fotg210, 558 u8 *buffer) 559{ 560 int i = 0; 561 u8 *tmp = buffer; 562 u32 data; 563 u32 length = 8; 564 565 iowrite32(DMATFNR_ACC_CXF, fotg210->reg + FOTG210_DMATFNR); 566 567 for (i = (length >> 2); i > 0; i--) { 568 data = ioread32(fotg210->reg + FOTG210_CXPORT); 569 *tmp = data & 0xFF; 570 *(tmp + 1) = (data >> 8) & 0xFF; 571 *(tmp + 2) = (data >> 16) & 0xFF; 572 *(tmp + 3) = (data >> 24) & 0xFF; 573 tmp = tmp + 4; 574 } 575 576 switch (length % 4) { 577 case 1: 578 data = ioread32(fotg210->reg + FOTG210_CXPORT); 579 *tmp = data & 0xFF; 580 break; 581 case 2: 582 data = ioread32(fotg210->reg + FOTG210_CXPORT); 583 *tmp = data & 0xFF; 584 *(tmp + 1) = (data >> 8) & 0xFF; 585 break; 586 case 3: 587 data = ioread32(fotg210->reg + FOTG210_CXPORT); 588 *tmp = data & 0xFF; 589 *(tmp + 1) = (data >> 8) & 0xFF; 590 *(tmp + 2) = (data >> 16) & 0xFF; 591 break; 592 default: 593 break; 594 } 595 596 iowrite32(DMATFNR_DISDMA, fotg210->reg + FOTG210_DMATFNR); 597} 598 599static void fotg210_set_configuration(struct fotg210_udc *fotg210) 600{ 601 u32 value = ioread32(fotg210->reg + FOTG210_DAR); 602 603 value |= DAR_AFT_CONF; 604 iowrite32(value, fotg210->reg + FOTG210_DAR); 605} 606 607static void fotg210_set_dev_addr(struct fotg210_udc *fotg210, u32 addr) 608{ 609 u32 value = ioread32(fotg210->reg + FOTG210_DAR); 610 611 value |= (addr & 0x7F); 612 iowrite32(value, fotg210->reg + FOTG210_DAR); 613} 614 615static void fotg210_set_cxstall(struct fotg210_udc *fotg210) 616{ 617 u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); 618 619 value |= DCFESR_CX_STL; 620 iowrite32(value, fotg210->reg + FOTG210_DCFESR); 621} 622 623static void fotg210_request_error(struct fotg210_udc *fotg210) 624{ 625 fotg210_set_cxstall(fotg210); 626 pr_err("request error!!\n"); 627} 628 629static void fotg210_set_address(struct fotg210_udc *fotg210, 630 struct usb_ctrlrequest *ctrl) 631{ 632 if (le16_to_cpu(ctrl->wValue) >= 0x0100) { 633 fotg210_request_error(fotg210); 634 } else { 635 fotg210_set_dev_addr(fotg210, le16_to_cpu(ctrl->wValue)); 636 fotg210_set_cxdone(fotg210); 637 } 638} 639 640static void fotg210_set_feature(struct fotg210_udc *fotg210, 641 struct usb_ctrlrequest *ctrl) 642{ 643 switch (ctrl->bRequestType & USB_RECIP_MASK) { 644 case USB_RECIP_DEVICE: 645 fotg210_set_cxdone(fotg210); 646 break; 647 case USB_RECIP_INTERFACE: 648 fotg210_set_cxdone(fotg210); 649 break; 650 case USB_RECIP_ENDPOINT: { 651 u8 epnum; 652 epnum = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK; 653 if (epnum) 654 fotg210_set_epnstall(fotg210->ep[epnum]); 655 else 656 fotg210_set_cxstall(fotg210); 657 fotg210_set_cxdone(fotg210); 658 } 659 break; 660 default: 661 fotg210_request_error(fotg210); 662 break; 663 } 664} 665 666static void fotg210_clear_feature(struct fotg210_udc *fotg210, 667 struct usb_ctrlrequest *ctrl) 668{ 669 struct fotg210_ep *ep = 670 fotg210->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK]; 671 672 switch (ctrl->bRequestType & USB_RECIP_MASK) { 673 case USB_RECIP_DEVICE: 674 fotg210_set_cxdone(fotg210); 675 break; 676 case USB_RECIP_INTERFACE: 677 fotg210_set_cxdone(fotg210); 678 break; 679 case USB_RECIP_ENDPOINT: 680 if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) { 681 if (ep->wedged) { 682 fotg210_set_cxdone(fotg210); 683 break; 684 } 685 if (ep->stall) 686 fotg210_set_halt_and_wedge(&ep->ep, 0, 0); 687 } 688 fotg210_set_cxdone(fotg210); 689 break; 690 default: 691 fotg210_request_error(fotg210); 692 break; 693 } 694} 695 696static int fotg210_is_epnstall(struct fotg210_ep *ep) 697{ 698 struct fotg210_udc *fotg210 = ep->fotg210; 699 u32 value; 700 void __iomem *reg; 701 702 reg = (ep->dir_in) ? 703 fotg210->reg + FOTG210_INEPMPSR(ep->epnum) : 704 fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum); 705 value = ioread32(reg); 706 return value & INOUTEPMPSR_STL_EP ? 1 : 0; 707} 708 709static void fotg210_get_status(struct fotg210_udc *fotg210, 710 struct usb_ctrlrequest *ctrl) 711{ 712 u8 epnum; 713 714 switch (ctrl->bRequestType & USB_RECIP_MASK) { 715 case USB_RECIP_DEVICE: 716 fotg210->ep0_data = cpu_to_le16(1 << USB_DEVICE_SELF_POWERED); 717 break; 718 case USB_RECIP_INTERFACE: 719 fotg210->ep0_data = cpu_to_le16(0); 720 break; 721 case USB_RECIP_ENDPOINT: 722 epnum = ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK; 723 if (epnum) 724 fotg210->ep0_data = 725 cpu_to_le16(fotg210_is_epnstall(fotg210->ep[epnum]) 726 << USB_ENDPOINT_HALT); 727 else 728 fotg210_request_error(fotg210); 729 break; 730 731 default: 732 fotg210_request_error(fotg210); 733 return; /* exit */ 734 } 735 736 fotg210->ep0_req->buf = &fotg210->ep0_data; 737 fotg210->ep0_req->length = 2; 738 739 spin_unlock(&fotg210->lock); 740 fotg210_ep_queue(fotg210->gadget.ep0, fotg210->ep0_req, GFP_ATOMIC); 741 spin_lock(&fotg210->lock); 742} 743 744static int fotg210_setup_packet(struct fotg210_udc *fotg210, 745 struct usb_ctrlrequest *ctrl) 746{ 747 u8 *p = (u8 *)ctrl; 748 u8 ret = 0; 749 750 fotg210_rdsetupp(fotg210, p); 751 752 fotg210->ep[0]->dir_in = ctrl->bRequestType & USB_DIR_IN; 753 754 if (fotg210->gadget.speed == USB_SPEED_UNKNOWN) { 755 u32 value = ioread32(fotg210->reg + FOTG210_DMCR); 756 fotg210->gadget.speed = value & DMCR_HS_EN ? 757 USB_SPEED_HIGH : USB_SPEED_FULL; 758 } 759 760 /* check request */ 761 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { 762 switch (ctrl->bRequest) { 763 case USB_REQ_GET_STATUS: 764 fotg210_get_status(fotg210, ctrl); 765 break; 766 case USB_REQ_CLEAR_FEATURE: 767 fotg210_clear_feature(fotg210, ctrl); 768 break; 769 case USB_REQ_SET_FEATURE: 770 fotg210_set_feature(fotg210, ctrl); 771 break; 772 case USB_REQ_SET_ADDRESS: 773 fotg210_set_address(fotg210, ctrl); 774 break; 775 case USB_REQ_SET_CONFIGURATION: 776 fotg210_set_configuration(fotg210); 777 ret = 1; 778 break; 779 default: 780 ret = 1; 781 break; 782 } 783 } else { 784 ret = 1; 785 } 786 787 return ret; 788} 789 790static void fotg210_ep0out(struct fotg210_udc *fotg210) 791{ 792 struct fotg210_ep *ep = fotg210->ep[0]; 793 794 if (!list_empty(&ep->queue) && !ep->dir_in) { 795 struct fotg210_request *req; 796 797 req = list_first_entry(&ep->queue, 798 struct fotg210_request, queue); 799 800 if (req->req.length) 801 fotg210_start_dma(ep, req); 802 803 if ((req->req.length - req->req.actual) < ep->ep.maxpacket) 804 fotg210_done(ep, req, 0); 805 } else { 806 pr_err("%s : empty queue\n", __func__); 807 } 808} 809 810static void fotg210_ep0in(struct fotg210_udc *fotg210) 811{ 812 struct fotg210_ep *ep = fotg210->ep[0]; 813 814 if ((!list_empty(&ep->queue)) && (ep->dir_in)) { 815 struct fotg210_request *req; 816 817 req = list_entry(ep->queue.next, 818 struct fotg210_request, queue); 819 820 if (req->req.length) 821 fotg210_start_dma(ep, req); 822 823 if (req->req.actual == req->req.length) 824 fotg210_done(ep, req, 0); 825 } else { 826 fotg210_set_cxdone(fotg210); 827 } 828} 829 830static void fotg210_clear_comabt_int(struct fotg210_udc *fotg210) 831{ 832 u32 value = ioread32(fotg210->reg + FOTG210_DISGR0); 833 834 value &= ~DISGR0_CX_COMABT_INT; 835 iowrite32(value, fotg210->reg + FOTG210_DISGR0); 836} 837 838static void fotg210_in_fifo_handler(struct fotg210_ep *ep) 839{ 840 struct fotg210_request *req = list_entry(ep->queue.next, 841 struct fotg210_request, queue); 842 843 if (req->req.length) 844 fotg210_start_dma(ep, req); 845 fotg210_done(ep, req, 0); 846} 847 848static void fotg210_out_fifo_handler(struct fotg210_ep *ep) 849{ 850 struct fotg210_request *req = list_entry(ep->queue.next, 851 struct fotg210_request, queue); 852 int disgr1 = ioread32(ep->fotg210->reg + FOTG210_DISGR1); 853 854 fotg210_start_dma(ep, req); 855 856 /* Complete the request when it's full or a short packet arrived. 857 * Like other drivers, short_not_ok isn't handled. 858 */ 859 860 if (req->req.length == req->req.actual || 861 (disgr1 & DISGR1_SPK_INT(ep->epnum - 1))) 862 fotg210_done(ep, req, 0); 863} 864 865static irqreturn_t fotg210_irq(int irq, void *_fotg210) 866{ 867 struct fotg210_udc *fotg210 = _fotg210; 868 u32 int_grp = ioread32(fotg210->reg + FOTG210_DIGR); 869 u32 int_msk = ioread32(fotg210->reg + FOTG210_DMIGR); 870 871 int_grp &= ~int_msk; 872 873 spin_lock(&fotg210->lock); 874 875 if (int_grp & DIGR_INT_G2) { 876 void __iomem *reg = fotg210->reg + FOTG210_DISGR2; 877 u32 int_grp2 = ioread32(reg); 878 u32 int_msk2 = ioread32(fotg210->reg + FOTG210_DMISGR2); 879 u32 value; 880 881 int_grp2 &= ~int_msk2; 882 883 if (int_grp2 & DISGR2_USBRST_INT) { 884 value = ioread32(reg); 885 value &= ~DISGR2_USBRST_INT; 886 iowrite32(value, reg); 887 pr_info("fotg210 udc reset\n"); 888 } 889 if (int_grp2 & DISGR2_SUSP_INT) { 890 value = ioread32(reg); 891 value &= ~DISGR2_SUSP_INT; 892 iowrite32(value, reg); 893 pr_info("fotg210 udc suspend\n"); 894 } 895 if (int_grp2 & DISGR2_RESM_INT) { 896 value = ioread32(reg); 897 value &= ~DISGR2_RESM_INT; 898 iowrite32(value, reg); 899 pr_info("fotg210 udc resume\n"); 900 } 901 if (int_grp2 & DISGR2_ISO_SEQ_ERR_INT) { 902 value = ioread32(reg); 903 value &= ~DISGR2_ISO_SEQ_ERR_INT; 904 iowrite32(value, reg); 905 pr_info("fotg210 iso sequence error\n"); 906 } 907 if (int_grp2 & DISGR2_ISO_SEQ_ABORT_INT) { 908 value = ioread32(reg); 909 value &= ~DISGR2_ISO_SEQ_ABORT_INT; 910 iowrite32(value, reg); 911 pr_info("fotg210 iso sequence abort\n"); 912 } 913 if (int_grp2 & DISGR2_TX0BYTE_INT) { 914 fotg210_clear_tx0byte(fotg210); 915 value = ioread32(reg); 916 value &= ~DISGR2_TX0BYTE_INT; 917 iowrite32(value, reg); 918 pr_info("fotg210 transferred 0 byte\n"); 919 } 920 if (int_grp2 & DISGR2_RX0BYTE_INT) { 921 fotg210_clear_rx0byte(fotg210); 922 value = ioread32(reg); 923 value &= ~DISGR2_RX0BYTE_INT; 924 iowrite32(value, reg); 925 pr_info("fotg210 received 0 byte\n"); 926 } 927 if (int_grp2 & DISGR2_DMA_ERROR) { 928 value = ioread32(reg); 929 value &= ~DISGR2_DMA_ERROR; 930 iowrite32(value, reg); 931 } 932 } 933 934 if (int_grp & DIGR_INT_G0) { 935 void __iomem *reg = fotg210->reg + FOTG210_DISGR0; 936 u32 int_grp0 = ioread32(reg); 937 u32 int_msk0 = ioread32(fotg210->reg + FOTG210_DMISGR0); 938 struct usb_ctrlrequest ctrl; 939 940 int_grp0 &= ~int_msk0; 941 942 /* the highest priority in this source register */ 943 if (int_grp0 & DISGR0_CX_COMABT_INT) { 944 fotg210_clear_comabt_int(fotg210); 945 pr_info("fotg210 CX command abort\n"); 946 } 947 948 if (int_grp0 & DISGR0_CX_SETUP_INT) { 949 if (fotg210_setup_packet(fotg210, &ctrl)) { 950 spin_unlock(&fotg210->lock); 951 if (fotg210->driver->setup(&fotg210->gadget, 952 &ctrl) < 0) 953 fotg210_set_cxstall(fotg210); 954 spin_lock(&fotg210->lock); 955 } 956 } 957 if (int_grp0 & DISGR0_CX_COMEND_INT) 958 pr_info("fotg210 cmd end\n"); 959 960 if (int_grp0 & DISGR0_CX_IN_INT) 961 fotg210_ep0in(fotg210); 962 963 if (int_grp0 & DISGR0_CX_OUT_INT) 964 fotg210_ep0out(fotg210); 965 966 if (int_grp0 & DISGR0_CX_COMFAIL_INT) { 967 fotg210_set_cxstall(fotg210); 968 pr_info("fotg210 ep0 fail\n"); 969 } 970 } 971 972 if (int_grp & DIGR_INT_G1) { 973 void __iomem *reg = fotg210->reg + FOTG210_DISGR1; 974 u32 int_grp1 = ioread32(reg); 975 u32 int_msk1 = ioread32(fotg210->reg + FOTG210_DMISGR1); 976 int fifo; 977 978 int_grp1 &= ~int_msk1; 979 980 for (fifo = 0; fifo < FOTG210_MAX_FIFO_NUM; fifo++) { 981 if (int_grp1 & DISGR1_IN_INT(fifo)) 982 fotg210_in_fifo_handler(fotg210->ep[fifo + 1]); 983 984 if ((int_grp1 & DISGR1_OUT_INT(fifo)) || 985 (int_grp1 & DISGR1_SPK_INT(fifo))) 986 fotg210_out_fifo_handler(fotg210->ep[fifo + 1]); 987 } 988 } 989 990 spin_unlock(&fotg210->lock); 991 992 return IRQ_HANDLED; 993} 994 995static void fotg210_disable_unplug(struct fotg210_udc *fotg210) 996{ 997 u32 reg = ioread32(fotg210->reg + FOTG210_PHYTMSR); 998 999 reg &= ~PHYTMSR_UNPLUG; 1000 iowrite32(reg, fotg210->reg + FOTG210_PHYTMSR); 1001} 1002 1003static int fotg210_udc_start(struct usb_gadget *g, 1004 struct usb_gadget_driver *driver) 1005{ 1006 struct fotg210_udc *fotg210 = gadget_to_fotg210(g); 1007 u32 value; 1008 1009 /* hook up the driver */ 1010 driver->driver.bus = NULL; 1011 fotg210->driver = driver; 1012 1013 /* enable device global interrupt */ 1014 value = ioread32(fotg210->reg + FOTG210_DMCR); 1015 value |= DMCR_GLINT_EN; 1016 iowrite32(value, fotg210->reg + FOTG210_DMCR); 1017 1018 return 0; 1019} 1020 1021static void fotg210_init(struct fotg210_udc *fotg210) 1022{ 1023 u32 value; 1024 1025 /* disable global interrupt and set int polarity to active high */ 1026 iowrite32(GMIR_MHC_INT | GMIR_MOTG_INT | GMIR_INT_POLARITY, 1027 fotg210->reg + FOTG210_GMIR); 1028 1029 /* disable device global interrupt */ 1030 value = ioread32(fotg210->reg + FOTG210_DMCR); 1031 value &= ~DMCR_GLINT_EN; 1032 iowrite32(value, fotg210->reg + FOTG210_DMCR); 1033 1034 /* enable only grp2 irqs we handle */ 1035 iowrite32(~(DISGR2_DMA_ERROR | DISGR2_RX0BYTE_INT | DISGR2_TX0BYTE_INT 1036 | DISGR2_ISO_SEQ_ABORT_INT | DISGR2_ISO_SEQ_ERR_INT 1037 | DISGR2_RESM_INT | DISGR2_SUSP_INT | DISGR2_USBRST_INT), 1038 fotg210->reg + FOTG210_DMISGR2); 1039 1040 /* disable all fifo interrupt */ 1041 iowrite32(~(u32)0, fotg210->reg + FOTG210_DMISGR1); 1042 1043 /* disable cmd end */ 1044 value = ioread32(fotg210->reg + FOTG210_DMISGR0); 1045 value |= DMISGR0_MCX_COMEND; 1046 iowrite32(value, fotg210->reg + FOTG210_DMISGR0); 1047} 1048 1049static int fotg210_udc_stop(struct usb_gadget *g) 1050{ 1051 struct fotg210_udc *fotg210 = gadget_to_fotg210(g); 1052 unsigned long flags; 1053 1054 spin_lock_irqsave(&fotg210->lock, flags); 1055 1056 fotg210_init(fotg210); 1057 fotg210->driver = NULL; 1058 1059 spin_unlock_irqrestore(&fotg210->lock, flags); 1060 1061 return 0; 1062} 1063 1064static const struct usb_gadget_ops fotg210_gadget_ops = { 1065 .udc_start = fotg210_udc_start, 1066 .udc_stop = fotg210_udc_stop, 1067}; 1068 1069static int fotg210_udc_remove(struct platform_device *pdev) 1070{ 1071 struct fotg210_udc *fotg210 = platform_get_drvdata(pdev); 1072 int i; 1073 1074 usb_del_gadget_udc(&fotg210->gadget); 1075 iounmap(fotg210->reg); 1076 free_irq(platform_get_irq(pdev, 0), fotg210); 1077 1078 fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req); 1079 for (i = 0; i < FOTG210_MAX_NUM_EP; i++) 1080 kfree(fotg210->ep[i]); 1081 kfree(fotg210); 1082 1083 return 0; 1084} 1085 1086static int fotg210_udc_probe(struct platform_device *pdev) 1087{ 1088 struct resource *res, *ires; 1089 struct fotg210_udc *fotg210 = NULL; 1090 struct fotg210_ep *_ep[FOTG210_MAX_NUM_EP]; 1091 int ret = 0; 1092 int i; 1093 1094 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1095 if (!res) { 1096 pr_err("platform_get_resource error.\n"); 1097 return -ENODEV; 1098 } 1099 1100 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1101 if (!ires) { 1102 pr_err("platform_get_resource IORESOURCE_IRQ error.\n"); 1103 return -ENODEV; 1104 } 1105 1106 ret = -ENOMEM; 1107 1108 /* initialize udc */ 1109 fotg210 = kzalloc(sizeof(struct fotg210_udc), GFP_KERNEL); 1110 if (fotg210 == NULL) 1111 goto err; 1112 1113 for (i = 0; i < FOTG210_MAX_NUM_EP; i++) { 1114 _ep[i] = kzalloc(sizeof(struct fotg210_ep), GFP_KERNEL); 1115 if (_ep[i] == NULL) 1116 goto err_alloc; 1117 fotg210->ep[i] = _ep[i]; 1118 } 1119 1120 fotg210->reg = ioremap(res->start, resource_size(res)); 1121 if (fotg210->reg == NULL) { 1122 pr_err("ioremap error.\n"); 1123 goto err_alloc; 1124 } 1125 1126 spin_lock_init(&fotg210->lock); 1127 1128 platform_set_drvdata(pdev, fotg210); 1129 1130 fotg210->gadget.ops = &fotg210_gadget_ops; 1131 1132 fotg210->gadget.max_speed = USB_SPEED_HIGH; 1133 fotg210->gadget.dev.parent = &pdev->dev; 1134 fotg210->gadget.dev.dma_mask = pdev->dev.dma_mask; 1135 fotg210->gadget.name = udc_name; 1136 1137 INIT_LIST_HEAD(&fotg210->gadget.ep_list); 1138 1139 for (i = 0; i < FOTG210_MAX_NUM_EP; i++) { 1140 struct fotg210_ep *ep = fotg210->ep[i]; 1141 1142 if (i) { 1143 INIT_LIST_HEAD(&fotg210->ep[i]->ep.ep_list); 1144 list_add_tail(&fotg210->ep[i]->ep.ep_list, 1145 &fotg210->gadget.ep_list); 1146 } 1147 ep->fotg210 = fotg210; 1148 INIT_LIST_HEAD(&ep->queue); 1149 ep->ep.name = fotg210_ep_name[i]; 1150 ep->ep.ops = &fotg210_ep_ops; 1151 usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0); 1152 1153 if (i == 0) { 1154 ep->ep.caps.type_control = true; 1155 } else { 1156 ep->ep.caps.type_iso = true; 1157 ep->ep.caps.type_bulk = true; 1158 ep->ep.caps.type_int = true; 1159 } 1160 1161 ep->ep.caps.dir_in = true; 1162 ep->ep.caps.dir_out = true; 1163 } 1164 usb_ep_set_maxpacket_limit(&fotg210->ep[0]->ep, 0x40); 1165 fotg210->gadget.ep0 = &fotg210->ep[0]->ep; 1166 INIT_LIST_HEAD(&fotg210->gadget.ep0->ep_list); 1167 1168 fotg210->ep0_req = fotg210_ep_alloc_request(&fotg210->ep[0]->ep, 1169 GFP_KERNEL); 1170 if (fotg210->ep0_req == NULL) 1171 goto err_map; 1172 1173 fotg210_init(fotg210); 1174 1175 fotg210_disable_unplug(fotg210); 1176 1177 ret = request_irq(ires->start, fotg210_irq, IRQF_SHARED, 1178 udc_name, fotg210); 1179 if (ret < 0) { 1180 pr_err("request_irq error (%d)\n", ret); 1181 goto err_req; 1182 } 1183 1184 ret = usb_add_gadget_udc(&pdev->dev, &fotg210->gadget); 1185 if (ret) 1186 goto err_add_udc; 1187 1188 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); 1189 1190 return 0; 1191 1192err_add_udc: 1193 free_irq(ires->start, fotg210); 1194 1195err_req: 1196 fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req); 1197 1198err_map: 1199 iounmap(fotg210->reg); 1200 1201err_alloc: 1202 for (i = 0; i < FOTG210_MAX_NUM_EP; i++) 1203 kfree(fotg210->ep[i]); 1204 kfree(fotg210); 1205 1206err: 1207 return ret; 1208} 1209 1210static struct platform_driver fotg210_driver = { 1211 .driver = { 1212 .name = udc_name, 1213 }, 1214 .probe = fotg210_udc_probe, 1215 .remove = fotg210_udc_remove, 1216}; 1217 1218module_platform_driver(fotg210_driver); 1219 1220MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>"); 1221MODULE_LICENSE("GPL"); 1222MODULE_DESCRIPTION(DRIVER_DESC); 1223