1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *  Driver for CPM (SCC/SMC) serial ports
4 *
5 *  Copyright (C) 2004 Freescale Semiconductor, Inc.
6 *
7 *  2006 (c) MontaVista Software, Inc.
8 *	Vitaly Bordug <vbordug@ru.mvista.com>
9 */
10#ifndef CPM_UART_H
11#define CPM_UART_H
12
13#include <linux/platform_device.h>
14#include <linux/fs_uart_pd.h>
15
16struct gpio_desc;
17
18#if defined(CONFIG_CPM2)
19#include "cpm_uart_cpm2.h"
20#elif defined(CONFIG_CPM1)
21#include "cpm_uart_cpm1.h"
22#endif
23
24#define SERIAL_CPM_MAJOR	204
25#define SERIAL_CPM_MINOR	46
26
27#define IS_SMC(pinfo)		(pinfo->flags & FLAG_SMC)
28#define IS_DISCARDING(pinfo)	(pinfo->flags & FLAG_DISCARDING)
29#define FLAG_DISCARDING	0x00000004	/* when set, don't discard */
30#define FLAG_SMC	0x00000002
31#define FLAG_CONSOLE	0x00000001
32
33#define UART_SMC1	fsid_smc1_uart
34#define UART_SMC2	fsid_smc2_uart
35#define UART_SCC1	fsid_scc1_uart
36#define UART_SCC2	fsid_scc2_uart
37#define UART_SCC3	fsid_scc3_uart
38#define UART_SCC4	fsid_scc4_uart
39
40#define UART_NR		fs_uart_nr
41
42#define RX_NUM_FIFO	4
43#define RX_BUF_SIZE	32
44#define TX_NUM_FIFO	4
45#define TX_BUF_SIZE	32
46
47#define SCC_WAIT_CLOSING 100
48
49#define GPIO_CTS	0
50#define GPIO_RTS	1
51#define GPIO_DCD	2
52#define GPIO_DSR	3
53#define GPIO_DTR	4
54#define GPIO_RI		5
55
56#define NUM_GPIOS	(GPIO_RI+1)
57
58struct uart_cpm_port {
59	struct uart_port	port;
60	u16			rx_nrfifos;
61	u16			rx_fifosize;
62	u16			tx_nrfifos;
63	u16			tx_fifosize;
64	smc_t __iomem		*smcp;
65	smc_uart_t __iomem	*smcup;
66	scc_t __iomem		*sccp;
67	scc_uart_t __iomem	*sccup;
68	cbd_t __iomem		*rx_bd_base;
69	cbd_t __iomem		*rx_cur;
70	cbd_t __iomem		*tx_bd_base;
71	cbd_t __iomem		*tx_cur;
72	unsigned char		*tx_buf;
73	unsigned char		*rx_buf;
74	u32			flags;
75	struct clk		*clk;
76	u8			brg;
77	uint			 dp_addr;
78	void			*mem_addr;
79	dma_addr_t		 dma_addr;
80	u32			mem_size;
81	/* wait on close if needed */
82	int			wait_closing;
83	/* value to combine with opcode to form cpm command */
84	u32			command;
85	struct gpio_desc	*gpios[NUM_GPIOS];
86};
87
88extern int cpm_uart_nr;
89extern struct uart_cpm_port cpm_uart_ports[UART_NR];
90
91/* these are located in their respective files */
92void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
93void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
94				struct device_node *np);
95void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram);
96int cpm_uart_init_portdesc(void);
97int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
98void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
99
100void smc1_lineif(struct uart_cpm_port *pinfo);
101void smc2_lineif(struct uart_cpm_port *pinfo);
102void scc1_lineif(struct uart_cpm_port *pinfo);
103void scc2_lineif(struct uart_cpm_port *pinfo);
104void scc3_lineif(struct uart_cpm_port *pinfo);
105void scc4_lineif(struct uart_cpm_port *pinfo);
106
107/*
108   virtual to phys transtalion
109*/
110static inline unsigned long cpu2cpm_addr(void *addr,
111                                         struct uart_cpm_port *pinfo)
112{
113	int offset;
114	u32 val = (u32)addr;
115	u32 mem = (u32)pinfo->mem_addr;
116	/* sane check */
117	if (likely(val >= mem && val < mem + pinfo->mem_size)) {
118		offset = val - mem;
119		return pinfo->dma_addr + offset;
120	}
121	/* something nasty happened */
122	BUG();
123	return 0;
124}
125
126static inline void *cpm2cpu_addr(unsigned long addr,
127                                 struct uart_cpm_port *pinfo)
128{
129	int offset;
130	u32 val = addr;
131	u32 dma = (u32)pinfo->dma_addr;
132	/* sane check */
133	if (likely(val >= dma && val < dma + pinfo->mem_size)) {
134		offset = val - dma;
135		return pinfo->mem_addr + offset;
136	}
137	/* something nasty happened */
138	BUG();
139	return NULL;
140}
141
142
143#endif /* CPM_UART_H */
144