1// SPDX-License-Identifier: GPL-2.0 2/* 3 * ARC On-Chip(fpga) UART Driver 4 * 5 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com) 6 * 7 * vineetg: July 10th 2012 8 * -Decoupled the driver from arch/arc 9 * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c) 10 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx) 11 * 12 * Vineetg: Aug 21st 2010 13 * -Is uart_tx_stopped() not done in tty write path as it has already been 14 * taken care of, in serial core 15 * 16 * Vineetg: Aug 18th 2010 17 * -New Serial Core based ARC UART driver 18 * -Derived largely from blackfin driver albiet with some major tweaks 19 * 20 * TODO: 21 * -check if sysreq works 22 */ 23 24#include <linux/module.h> 25#include <linux/serial.h> 26#include <linux/console.h> 27#include <linux/sysrq.h> 28#include <linux/platform_device.h> 29#include <linux/tty.h> 30#include <linux/tty_flip.h> 31#include <linux/serial_core.h> 32#include <linux/io.h> 33#include <linux/of_irq.h> 34#include <linux/of_address.h> 35 36/************************************* 37 * ARC UART Hardware Specs 38 ************************************/ 39#define ARC_UART_TX_FIFO_SIZE 1 40 41/* 42 * UART Register set (this is not a Standards Compliant IP) 43 * Also each reg is Word aligned, but only 8 bits wide 44 */ 45#define R_ID0 0 46#define R_ID1 4 47#define R_ID2 8 48#define R_ID3 12 49#define R_DATA 16 50#define R_STS 20 51#define R_BAUDL 24 52#define R_BAUDH 28 53 54/* Bits for UART Status Reg (R/W) */ 55#define RXIENB 0x04 /* Receive Interrupt Enable */ 56#define TXIENB 0x40 /* Transmit Interrupt Enable */ 57 58#define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */ 59#define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */ 60 61#define RXFULL 0x08 /* Receive FIFO full */ 62#define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */ 63 64#define RXFERR 0x01 /* Frame Error: Stop Bit not detected */ 65#define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */ 66 67/* Uart bit fiddling helpers: lowest level */ 68#define RBASE(port, reg) (port->membase + reg) 69#define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r)) 70#define UART_REG_GET(u, r) readb(RBASE(u, r)) 71 72#define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v)) 73#define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v)) 74 75/* Uart bit fiddling helpers: API level */ 76#define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val) 77#define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA) 78 79#define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val) 80#define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val) 81 82#define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val) 83#define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS) 84 85#define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB) 86#define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB) 87#define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB) 88 89#define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB) 90#define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB) 91#define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB) 92 93#define ARC_SERIAL_DEV_NAME "ttyARC" 94 95struct arc_uart_port { 96 struct uart_port port; 97 unsigned long baud; 98}; 99 100#define to_arc_port(uport) container_of(uport, struct arc_uart_port, port) 101 102static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS]; 103 104#ifdef CONFIG_SERIAL_ARC_CONSOLE 105static struct console arc_console; 106#endif 107 108#define DRIVER_NAME "arc-uart" 109 110static struct uart_driver arc_uart_driver = { 111 .owner = THIS_MODULE, 112 .driver_name = DRIVER_NAME, 113 .dev_name = ARC_SERIAL_DEV_NAME, 114 .major = 0, 115 .minor = 0, 116 .nr = CONFIG_SERIAL_ARC_NR_PORTS, 117#ifdef CONFIG_SERIAL_ARC_CONSOLE 118 .cons = &arc_console, 119#endif 120}; 121 122static void arc_serial_stop_rx(struct uart_port *port) 123{ 124 UART_RX_IRQ_DISABLE(port); 125} 126 127static void arc_serial_stop_tx(struct uart_port *port) 128{ 129 while (!(UART_GET_STATUS(port) & TXEMPTY)) 130 cpu_relax(); 131 132 UART_TX_IRQ_DISABLE(port); 133} 134 135/* 136 * Return TIOCSER_TEMT when transmitter is not busy. 137 */ 138static unsigned int arc_serial_tx_empty(struct uart_port *port) 139{ 140 unsigned int stat; 141 142 stat = UART_GET_STATUS(port); 143 if (stat & TXEMPTY) 144 return TIOCSER_TEMT; 145 146 return 0; 147} 148 149/* 150 * Driver internal routine, used by both tty(serial core) as well as tx-isr 151 * -Called under spinlock in either cases 152 * -also tty->stopped has already been checked 153 * = by uart_start( ) before calling us 154 * = tx_ist checks that too before calling 155 */ 156static void arc_serial_tx_chars(struct uart_port *port) 157{ 158 struct circ_buf *xmit = &port->state->xmit; 159 int sent = 0; 160 unsigned char ch; 161 162 if (unlikely(port->x_char)) { 163 UART_SET_DATA(port, port->x_char); 164 port->icount.tx++; 165 port->x_char = 0; 166 sent = 1; 167 } else if (!uart_circ_empty(xmit)) { 168 ch = xmit->buf[xmit->tail]; 169 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 170 port->icount.tx++; 171 while (!(UART_GET_STATUS(port) & TXEMPTY)) 172 cpu_relax(); 173 UART_SET_DATA(port, ch); 174 sent = 1; 175 } 176 177 /* 178 * If num chars in xmit buffer are too few, ask tty layer for more. 179 * By Hard ISR to schedule processing in software interrupt part 180 */ 181 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 182 uart_write_wakeup(port); 183 184 if (sent) 185 UART_TX_IRQ_ENABLE(port); 186} 187 188/* 189 * port is locked and interrupts are disabled 190 * uart_start( ) calls us under the port spinlock irqsave 191 */ 192static void arc_serial_start_tx(struct uart_port *port) 193{ 194 arc_serial_tx_chars(port); 195} 196 197static void arc_serial_rx_chars(struct uart_port *port, unsigned int status) 198{ 199 unsigned int ch, flg = 0; 200 201 /* 202 * UART has 4 deep RX-FIFO. Driver's recongnition of this fact 203 * is very subtle. Here's how ... 204 * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available, 205 * driver reads the DATA Reg and keeps doing that in a loop, until 206 * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt, 207 * before RX-EMPTY=0, implies some sort of buffering going on in the 208 * controller, which is indeed the Rx-FIFO. 209 */ 210 do { 211 /* 212 * This could be an Rx Intr for err (no data), 213 * so check err and clear that Intr first 214 */ 215 if (unlikely(status & (RXOERR | RXFERR))) { 216 if (status & RXOERR) { 217 port->icount.overrun++; 218 flg = TTY_OVERRUN; 219 UART_CLR_STATUS(port, RXOERR); 220 } 221 222 if (status & RXFERR) { 223 port->icount.frame++; 224 flg = TTY_FRAME; 225 UART_CLR_STATUS(port, RXFERR); 226 } 227 } else 228 flg = TTY_NORMAL; 229 230 if (status & RXEMPTY) 231 continue; 232 233 ch = UART_GET_DATA(port); 234 port->icount.rx++; 235 236 if (!(uart_handle_sysrq_char(port, ch))) 237 uart_insert_char(port, status, RXOERR, ch, flg); 238 239 spin_unlock(&port->lock); 240 tty_flip_buffer_push(&port->state->port); 241 spin_lock(&port->lock); 242 } while (!((status = UART_GET_STATUS(port)) & RXEMPTY)); 243} 244 245/* 246 * A note on the Interrupt handling state machine of this driver 247 * 248 * kernel printk writes funnel thru the console driver framework and in order 249 * to keep things simple as well as efficient, it writes to UART in polled 250 * mode, in one shot, and exits. 251 * 252 * OTOH, Userland output (via tty layer), uses interrupt based writes as there 253 * can be undeterministic delay between char writes. 254 * 255 * Thus Rx-interrupts are always enabled, while tx-interrupts are by default 256 * disabled. 257 * 258 * When tty has some data to send out, serial core calls driver's start_tx 259 * which 260 * -checks-if-tty-buffer-has-char-to-send 261 * -writes-data-to-uart 262 * -enable-tx-intr 263 * 264 * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt. 265 * The first thing Tx ISR does is disable further Tx interrupts (as this could 266 * be the last char to send, before settling down into the quiet polled mode). 267 * It then calls the exact routine used by tty layer write to send out any 268 * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case 269 * of no data, it remains disabled. 270 * This is how the transmit state machine is dynamically switched on/off 271 */ 272 273static irqreturn_t arc_serial_isr(int irq, void *dev_id) 274{ 275 struct uart_port *port = dev_id; 276 unsigned int status; 277 278 status = UART_GET_STATUS(port); 279 280 /* 281 * Single IRQ for both Rx (data available) Tx (room available) Interrupt 282 * notifications from the UART Controller. 283 * To demultiplex between the two, we check the relevant bits 284 */ 285 if (status & RXIENB) { 286 287 /* already in ISR, no need of xx_irqsave */ 288 spin_lock(&port->lock); 289 arc_serial_rx_chars(port, status); 290 spin_unlock(&port->lock); 291 } 292 293 if ((status & TXIENB) && (status & TXEMPTY)) { 294 295 /* Unconditionally disable further Tx-Interrupts. 296 * will be enabled by tx_chars() if needed. 297 */ 298 UART_TX_IRQ_DISABLE(port); 299 300 spin_lock(&port->lock); 301 302 if (!uart_tx_stopped(port)) 303 arc_serial_tx_chars(port); 304 305 spin_unlock(&port->lock); 306 } 307 308 return IRQ_HANDLED; 309} 310 311static unsigned int arc_serial_get_mctrl(struct uart_port *port) 312{ 313 /* 314 * Pretend we have a Modem status reg and following bits are 315 * always set, to satify the serial core state machine 316 * (DSR) Data Set Ready 317 * (CTS) Clear To Send 318 * (CAR) Carrier Detect 319 */ 320 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 321} 322 323static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) 324{ 325 /* MCR not present */ 326} 327 328static void arc_serial_break_ctl(struct uart_port *port, int break_state) 329{ 330 /* ARC UART doesn't support sending Break signal */ 331} 332 333static int arc_serial_startup(struct uart_port *port) 334{ 335 /* Before we hook up the ISR, Disable all UART Interrupts */ 336 UART_ALL_IRQ_DISABLE(port); 337 338 if (request_irq(port->irq, arc_serial_isr, 0, "arc uart rx-tx", port)) { 339 dev_warn(port->dev, "Unable to attach ARC UART intr\n"); 340 return -EBUSY; 341 } 342 343 UART_RX_IRQ_ENABLE(port); /* Only Rx IRQ enabled to begin with */ 344 345 return 0; 346} 347 348/* This is not really needed */ 349static void arc_serial_shutdown(struct uart_port *port) 350{ 351 free_irq(port->irq, port); 352} 353 354static void 355arc_serial_set_termios(struct uart_port *port, struct ktermios *new, 356 struct ktermios *old) 357{ 358 struct arc_uart_port *uart = to_arc_port(port); 359 unsigned int baud, uartl, uarth, hw_val; 360 unsigned long flags; 361 362 /* 363 * Use the generic handler so that any specially encoded baud rates 364 * such as SPD_xx flags or "%B0" can be handled 365 * Max Baud I suppose will not be more than current 115K * 4 366 * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1) 367 * spread over two 8-bit registers 368 */ 369 baud = uart_get_baud_rate(port, new, old, 0, 460800); 370 371 hw_val = port->uartclk / (uart->baud * 4) - 1; 372 uartl = hw_val & 0xFF; 373 uarth = (hw_val >> 8) & 0xFF; 374 375 spin_lock_irqsave(&port->lock, flags); 376 377 UART_ALL_IRQ_DISABLE(port); 378 379 UART_SET_BAUDL(port, uartl); 380 UART_SET_BAUDH(port, uarth); 381 382 UART_RX_IRQ_ENABLE(port); 383 384 /* 385 * UART doesn't support Parity/Hardware Flow Control; 386 * Only supports 8N1 character size 387 */ 388 new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE); 389 new->c_cflag |= CS8; 390 391 if (old) 392 tty_termios_copy_hw(new, old); 393 394 /* Don't rewrite B0 */ 395 if (tty_termios_baud_rate(new)) 396 tty_termios_encode_baud_rate(new, baud, baud); 397 398 uart_update_timeout(port, new->c_cflag, baud); 399 400 spin_unlock_irqrestore(&port->lock, flags); 401} 402 403static const char *arc_serial_type(struct uart_port *port) 404{ 405 return port->type == PORT_ARC ? DRIVER_NAME : NULL; 406} 407 408static void arc_serial_release_port(struct uart_port *port) 409{ 410} 411 412static int arc_serial_request_port(struct uart_port *port) 413{ 414 return 0; 415} 416 417/* 418 * Verify the new serial_struct (for TIOCSSERIAL). 419 */ 420static int 421arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser) 422{ 423 if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC) 424 return -EINVAL; 425 426 return 0; 427} 428 429/* 430 * Configure/autoconfigure the port. 431 */ 432static void arc_serial_config_port(struct uart_port *port, int flags) 433{ 434 if (flags & UART_CONFIG_TYPE) 435 port->type = PORT_ARC; 436} 437 438#ifdef CONFIG_CONSOLE_POLL 439 440static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr) 441{ 442 while (!(UART_GET_STATUS(port) & TXEMPTY)) 443 cpu_relax(); 444 445 UART_SET_DATA(port, chr); 446} 447 448static int arc_serial_poll_getchar(struct uart_port *port) 449{ 450 unsigned char chr; 451 452 while (!(UART_GET_STATUS(port) & RXEMPTY)) 453 cpu_relax(); 454 455 chr = UART_GET_DATA(port); 456 return chr; 457} 458#endif 459 460static const struct uart_ops arc_serial_pops = { 461 .tx_empty = arc_serial_tx_empty, 462 .set_mctrl = arc_serial_set_mctrl, 463 .get_mctrl = arc_serial_get_mctrl, 464 .stop_tx = arc_serial_stop_tx, 465 .start_tx = arc_serial_start_tx, 466 .stop_rx = arc_serial_stop_rx, 467 .break_ctl = arc_serial_break_ctl, 468 .startup = arc_serial_startup, 469 .shutdown = arc_serial_shutdown, 470 .set_termios = arc_serial_set_termios, 471 .type = arc_serial_type, 472 .release_port = arc_serial_release_port, 473 .request_port = arc_serial_request_port, 474 .config_port = arc_serial_config_port, 475 .verify_port = arc_serial_verify_port, 476#ifdef CONFIG_CONSOLE_POLL 477 .poll_put_char = arc_serial_poll_putchar, 478 .poll_get_char = arc_serial_poll_getchar, 479#endif 480}; 481 482#ifdef CONFIG_SERIAL_ARC_CONSOLE 483 484static int arc_serial_console_setup(struct console *co, char *options) 485{ 486 struct uart_port *port; 487 int baud = 115200; 488 int bits = 8; 489 int parity = 'n'; 490 int flow = 'n'; 491 492 if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS) 493 return -ENODEV; 494 495 /* 496 * The uart port backing the console (e.g. ttyARC1) might not have been 497 * init yet. If so, defer the console setup to after the port. 498 */ 499 port = &arc_uart_ports[co->index].port; 500 if (!port->membase) 501 return -ENODEV; 502 503 if (options) 504 uart_parse_options(options, &baud, &parity, &bits, &flow); 505 506 /* 507 * Serial core will call port->ops->set_termios( ) 508 * which will set the baud reg 509 */ 510 return uart_set_options(port, co, baud, parity, bits, flow); 511} 512 513static void arc_serial_console_putchar(struct uart_port *port, int ch) 514{ 515 while (!(UART_GET_STATUS(port) & TXEMPTY)) 516 cpu_relax(); 517 518 UART_SET_DATA(port, (unsigned char)ch); 519} 520 521/* 522 * Interrupts are disabled on entering 523 */ 524static void arc_serial_console_write(struct console *co, const char *s, 525 unsigned int count) 526{ 527 struct uart_port *port = &arc_uart_ports[co->index].port; 528 unsigned long flags; 529 530 spin_lock_irqsave(&port->lock, flags); 531 uart_console_write(port, s, count, arc_serial_console_putchar); 532 spin_unlock_irqrestore(&port->lock, flags); 533} 534 535static struct console arc_console = { 536 .name = ARC_SERIAL_DEV_NAME, 537 .write = arc_serial_console_write, 538 .device = uart_console_device, 539 .setup = arc_serial_console_setup, 540 .flags = CON_PRINTBUFFER, 541 .index = -1, 542 .data = &arc_uart_driver 543}; 544 545static void arc_early_serial_write(struct console *con, const char *s, 546 unsigned int n) 547{ 548 struct earlycon_device *dev = con->data; 549 550 uart_console_write(&dev->port, s, n, arc_serial_console_putchar); 551} 552 553static int __init arc_early_console_setup(struct earlycon_device *dev, 554 const char *opt) 555{ 556 struct uart_port *port = &dev->port; 557 unsigned int l, h, hw_val; 558 559 if (!dev->port.membase) 560 return -ENODEV; 561 562 hw_val = port->uartclk / (dev->baud * 4) - 1; 563 l = hw_val & 0xFF; 564 h = (hw_val >> 8) & 0xFF; 565 566 UART_SET_BAUDL(port, l); 567 UART_SET_BAUDH(port, h); 568 569 dev->con->write = arc_early_serial_write; 570 return 0; 571} 572OF_EARLYCON_DECLARE(arc_uart, "snps,arc-uart", arc_early_console_setup); 573 574#endif /* CONFIG_SERIAL_ARC_CONSOLE */ 575 576static int arc_serial_probe(struct platform_device *pdev) 577{ 578 struct device_node *np = pdev->dev.of_node; 579 struct arc_uart_port *uart; 580 struct uart_port *port; 581 int dev_id; 582 u32 val; 583 584 /* no device tree device */ 585 if (!np) 586 return -ENODEV; 587 588 dev_id = of_alias_get_id(np, "serial"); 589 if (dev_id < 0) 590 dev_id = 0; 591 592 if (dev_id >= ARRAY_SIZE(arc_uart_ports)) { 593 dev_err(&pdev->dev, "serial%d out of range\n", dev_id); 594 return -EINVAL; 595 } 596 597 uart = &arc_uart_ports[dev_id]; 598 port = &uart->port; 599 600 if (of_property_read_u32(np, "clock-frequency", &val)) { 601 dev_err(&pdev->dev, "clock-frequency property NOTset\n"); 602 return -EINVAL; 603 } 604 port->uartclk = val; 605 606 if (of_property_read_u32(np, "current-speed", &val)) { 607 dev_err(&pdev->dev, "current-speed property NOT set\n"); 608 return -EINVAL; 609 } 610 uart->baud = val; 611 612 port->membase = devm_platform_ioremap_resource(pdev, 0); 613 if (IS_ERR(port->membase)) { 614 /* No point of dev_err since UART itself is hosed here */ 615 return PTR_ERR(port->membase); 616 } 617 618 port->irq = irq_of_parse_and_map(np, 0); 619 620 port->dev = &pdev->dev; 621 port->iotype = UPIO_MEM; 622 port->flags = UPF_BOOT_AUTOCONF; 623 port->line = dev_id; 624 port->ops = &arc_serial_pops; 625 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ARC_CONSOLE); 626 627 port->fifosize = ARC_UART_TX_FIFO_SIZE; 628 629 /* 630 * uart_insert_char( ) uses it in decideding whether to ignore a 631 * char or not. Explicitly setting it here, removes the subtelty 632 */ 633 port->ignore_status_mask = 0; 634 635 return uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port); 636} 637 638static int arc_serial_remove(struct platform_device *pdev) 639{ 640 /* This will never be called */ 641 return 0; 642} 643 644static const struct of_device_id arc_uart_dt_ids[] = { 645 { .compatible = "snps,arc-uart" }, 646 { /* Sentinel */ } 647}; 648MODULE_DEVICE_TABLE(of, arc_uart_dt_ids); 649 650static struct platform_driver arc_platform_driver = { 651 .probe = arc_serial_probe, 652 .remove = arc_serial_remove, 653 .driver = { 654 .name = DRIVER_NAME, 655 .of_match_table = arc_uart_dt_ids, 656 }, 657}; 658 659static int __init arc_serial_init(void) 660{ 661 int ret; 662 663 ret = uart_register_driver(&arc_uart_driver); 664 if (ret) 665 return ret; 666 667 ret = platform_driver_register(&arc_platform_driver); 668 if (ret) 669 uart_unregister_driver(&arc_uart_driver); 670 671 return ret; 672} 673 674static void __exit arc_serial_exit(void) 675{ 676 platform_driver_unregister(&arc_platform_driver); 677 uart_unregister_driver(&arc_uart_driver); 678} 679 680module_init(arc_serial_init); 681module_exit(arc_serial_exit); 682 683MODULE_LICENSE("GPL"); 684MODULE_ALIAS("platform:" DRIVER_NAME); 685MODULE_AUTHOR("Vineet Gupta"); 686MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver"); 687