1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Atheros AR933X SoC built-in UART driver 4 * 5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> 6 * 7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 8 */ 9 10#include <linux/module.h> 11#include <linux/ioport.h> 12#include <linux/init.h> 13#include <linux/console.h> 14#include <linux/sysrq.h> 15#include <linux/delay.h> 16#include <linux/gpio/consumer.h> 17#include <linux/platform_device.h> 18#include <linux/of.h> 19#include <linux/of_platform.h> 20#include <linux/tty.h> 21#include <linux/tty_flip.h> 22#include <linux/serial_core.h> 23#include <linux/serial.h> 24#include <linux/slab.h> 25#include <linux/io.h> 26#include <linux/irq.h> 27#include <linux/clk.h> 28 29#include <asm/div64.h> 30 31#include <asm/mach-ath79/ar933x_uart.h> 32 33#include "serial_mctrl_gpio.h" 34 35#define DRIVER_NAME "ar933x-uart" 36 37#define AR933X_UART_MAX_SCALE 0xff 38#define AR933X_UART_MAX_STEP 0xffff 39 40#define AR933X_UART_MIN_BAUD 300 41#define AR933X_UART_MAX_BAUD 3000000 42 43#define AR933X_DUMMY_STATUS_RD 0x01 44 45static struct uart_driver ar933x_uart_driver; 46 47struct ar933x_uart_port { 48 struct uart_port port; 49 unsigned int ier; /* shadow Interrupt Enable Register */ 50 unsigned int min_baud; 51 unsigned int max_baud; 52 struct clk *clk; 53 struct mctrl_gpios *gpios; 54 struct gpio_desc *rts_gpiod; 55}; 56 57static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, 58 int offset) 59{ 60 return readl(up->port.membase + offset); 61} 62 63static inline void ar933x_uart_write(struct ar933x_uart_port *up, 64 int offset, unsigned int value) 65{ 66 writel(value, up->port.membase + offset); 67} 68 69static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, 70 unsigned int offset, 71 unsigned int mask, 72 unsigned int val) 73{ 74 unsigned int t; 75 76 t = ar933x_uart_read(up, offset); 77 t &= ~mask; 78 t |= val; 79 ar933x_uart_write(up, offset, t); 80} 81 82static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up, 83 unsigned int offset, 84 unsigned int val) 85{ 86 ar933x_uart_rmw(up, offset, 0, val); 87} 88 89static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up, 90 unsigned int offset, 91 unsigned int val) 92{ 93 ar933x_uart_rmw(up, offset, val, 0); 94} 95 96static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up) 97{ 98 up->ier |= AR933X_UART_INT_TX_EMPTY; 99 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 100} 101 102static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up) 103{ 104 up->ier &= ~AR933X_UART_INT_TX_EMPTY; 105 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 106} 107 108static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up) 109{ 110 up->ier |= AR933X_UART_INT_RX_VALID; 111 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 112} 113 114static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up) 115{ 116 up->ier &= ~AR933X_UART_INT_RX_VALID; 117 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 118} 119 120static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) 121{ 122 unsigned int rdata; 123 124 rdata = ch & AR933X_UART_DATA_TX_RX_MASK; 125 rdata |= AR933X_UART_DATA_TX_CSR; 126 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata); 127} 128 129static unsigned int ar933x_uart_tx_empty(struct uart_port *port) 130{ 131 struct ar933x_uart_port *up = 132 container_of(port, struct ar933x_uart_port, port); 133 unsigned long flags; 134 unsigned int rdata; 135 136 spin_lock_irqsave(&up->port.lock, flags); 137 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 138 spin_unlock_irqrestore(&up->port.lock, flags); 139 140 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT; 141} 142 143static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) 144{ 145 struct ar933x_uart_port *up = 146 container_of(port, struct ar933x_uart_port, port); 147 int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 148 149 mctrl_gpio_get(up->gpios, &ret); 150 151 return ret; 152} 153 154static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 155{ 156 struct ar933x_uart_port *up = 157 container_of(port, struct ar933x_uart_port, port); 158 159 mctrl_gpio_set(up->gpios, mctrl); 160} 161 162static void ar933x_uart_start_tx(struct uart_port *port) 163{ 164 struct ar933x_uart_port *up = 165 container_of(port, struct ar933x_uart_port, port); 166 167 ar933x_uart_start_tx_interrupt(up); 168} 169 170static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up) 171{ 172 unsigned int status; 173 unsigned int timeout = 60000; 174 175 /* Wait up to 60ms for the character(s) to be sent. */ 176 do { 177 status = ar933x_uart_read(up, AR933X_UART_CS_REG); 178 if (--timeout == 0) 179 break; 180 udelay(1); 181 } while (status & AR933X_UART_CS_TX_BUSY); 182 183 if (timeout == 0) 184 dev_err(up->port.dev, "waiting for TX timed out\n"); 185} 186 187static void ar933x_uart_rx_flush(struct ar933x_uart_port *up) 188{ 189 unsigned int status; 190 191 /* clear RX_VALID interrupt */ 192 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID); 193 194 /* remove characters from the RX FIFO */ 195 do { 196 ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR); 197 status = ar933x_uart_read(up, AR933X_UART_DATA_REG); 198 } while (status & AR933X_UART_DATA_RX_CSR); 199} 200 201static void ar933x_uart_stop_tx(struct uart_port *port) 202{ 203 struct ar933x_uart_port *up = 204 container_of(port, struct ar933x_uart_port, port); 205 206 ar933x_uart_stop_tx_interrupt(up); 207} 208 209static void ar933x_uart_stop_rx(struct uart_port *port) 210{ 211 struct ar933x_uart_port *up = 212 container_of(port, struct ar933x_uart_port, port); 213 214 ar933x_uart_stop_rx_interrupt(up); 215} 216 217static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) 218{ 219 struct ar933x_uart_port *up = 220 container_of(port, struct ar933x_uart_port, port); 221 unsigned long flags; 222 223 spin_lock_irqsave(&up->port.lock, flags); 224 if (break_state == -1) 225 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 226 AR933X_UART_CS_TX_BREAK); 227 else 228 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 229 AR933X_UART_CS_TX_BREAK); 230 spin_unlock_irqrestore(&up->port.lock, flags); 231} 232 233/* 234 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) 235 */ 236static unsigned long ar933x_uart_get_baud(unsigned int clk, 237 unsigned int scale, 238 unsigned int step) 239{ 240 u64 t; 241 u32 div; 242 243 div = (2 << 16) * (scale + 1); 244 t = clk; 245 t *= step; 246 t += (div / 2); 247 do_div(t, div); 248 249 return t; 250} 251 252static void ar933x_uart_get_scale_step(unsigned int clk, 253 unsigned int baud, 254 unsigned int *scale, 255 unsigned int *step) 256{ 257 unsigned int tscale; 258 long min_diff; 259 260 *scale = 0; 261 *step = 0; 262 263 min_diff = baud; 264 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { 265 u64 tstep; 266 int diff; 267 268 tstep = baud * (tscale + 1); 269 tstep *= (2 << 16); 270 do_div(tstep, clk); 271 272 if (tstep > AR933X_UART_MAX_STEP) 273 break; 274 275 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); 276 if (diff < min_diff) { 277 min_diff = diff; 278 *scale = tscale; 279 *step = tstep; 280 } 281 } 282} 283 284static void ar933x_uart_set_termios(struct uart_port *port, 285 struct ktermios *new, 286 struct ktermios *old) 287{ 288 struct ar933x_uart_port *up = 289 container_of(port, struct ar933x_uart_port, port); 290 unsigned int cs; 291 unsigned long flags; 292 unsigned int baud, scale, step; 293 294 /* Only CS8 is supported */ 295 new->c_cflag &= ~CSIZE; 296 new->c_cflag |= CS8; 297 298 /* Only one stop bit is supported */ 299 new->c_cflag &= ~CSTOPB; 300 301 cs = 0; 302 if (new->c_cflag & PARENB) { 303 if (!(new->c_cflag & PARODD)) 304 cs |= AR933X_UART_CS_PARITY_EVEN; 305 else 306 cs |= AR933X_UART_CS_PARITY_ODD; 307 } else { 308 cs |= AR933X_UART_CS_PARITY_NONE; 309 } 310 311 /* Mark/space parity is not supported */ 312 new->c_cflag &= ~CMSPAR; 313 314 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); 315 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step); 316 317 /* 318 * Ok, we're now changing the port state. Do it with 319 * interrupts disabled. 320 */ 321 spin_lock_irqsave(&up->port.lock, flags); 322 323 /* disable the UART */ 324 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 325 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S); 326 327 /* Update the per-port timeout. */ 328 uart_update_timeout(port, new->c_cflag, baud); 329 330 up->port.ignore_status_mask = 0; 331 332 /* ignore all characters if CREAD is not set */ 333 if ((new->c_cflag & CREAD) == 0) 334 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; 335 336 ar933x_uart_write(up, AR933X_UART_CLOCK_REG, 337 scale << AR933X_UART_CLOCK_SCALE_S | step); 338 339 /* setup configuration register */ 340 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); 341 342 /* enable host interrupt */ 343 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 344 AR933X_UART_CS_HOST_INT_EN); 345 346 /* enable RX and TX ready overide */ 347 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 348 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); 349 350 /* reenable the UART */ 351 ar933x_uart_rmw(up, AR933X_UART_CS_REG, 352 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, 353 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S); 354 355 spin_unlock_irqrestore(&up->port.lock, flags); 356 357 if (tty_termios_baud_rate(new)) 358 tty_termios_encode_baud_rate(new, baud, baud); 359} 360 361static void ar933x_uart_rx_chars(struct ar933x_uart_port *up) 362{ 363 struct tty_port *port = &up->port.state->port; 364 int max_count = 256; 365 366 do { 367 unsigned int rdata; 368 unsigned char ch; 369 370 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 371 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0) 372 break; 373 374 /* remove the character from the FIFO */ 375 ar933x_uart_write(up, AR933X_UART_DATA_REG, 376 AR933X_UART_DATA_RX_CSR); 377 378 up->port.icount.rx++; 379 ch = rdata & AR933X_UART_DATA_TX_RX_MASK; 380 381 if (uart_handle_sysrq_char(&up->port, ch)) 382 continue; 383 384 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0) 385 tty_insert_flip_char(port, ch, TTY_NORMAL); 386 } while (max_count-- > 0); 387 388 spin_unlock(&up->port.lock); 389 tty_flip_buffer_push(port); 390 spin_lock(&up->port.lock); 391} 392 393static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) 394{ 395 struct circ_buf *xmit = &up->port.state->xmit; 396 struct serial_rs485 *rs485conf = &up->port.rs485; 397 int count; 398 bool half_duplex_send = false; 399 400 if (uart_tx_stopped(&up->port)) 401 return; 402 403 if ((rs485conf->flags & SER_RS485_ENABLED) && 404 (up->port.x_char || !uart_circ_empty(xmit))) { 405 ar933x_uart_stop_rx_interrupt(up); 406 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND)); 407 half_duplex_send = true; 408 } 409 410 count = up->port.fifosize; 411 do { 412 unsigned int rdata; 413 414 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); 415 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) 416 break; 417 418 if (up->port.x_char) { 419 ar933x_uart_putc(up, up->port.x_char); 420 up->port.icount.tx++; 421 up->port.x_char = 0; 422 continue; 423 } 424 425 if (uart_circ_empty(xmit)) 426 break; 427 428 ar933x_uart_putc(up, xmit->buf[xmit->tail]); 429 430 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 431 up->port.icount.tx++; 432 } while (--count > 0); 433 434 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 435 uart_write_wakeup(&up->port); 436 437 if (!uart_circ_empty(xmit)) { 438 ar933x_uart_start_tx_interrupt(up); 439 } else if (half_duplex_send) { 440 ar933x_uart_wait_tx_complete(up); 441 ar933x_uart_rx_flush(up); 442 ar933x_uart_start_rx_interrupt(up); 443 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND)); 444 } 445} 446 447static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) 448{ 449 struct ar933x_uart_port *up = dev_id; 450 unsigned int status; 451 452 status = ar933x_uart_read(up, AR933X_UART_CS_REG); 453 if ((status & AR933X_UART_CS_HOST_INT) == 0) 454 return IRQ_NONE; 455 456 spin_lock(&up->port.lock); 457 458 status = ar933x_uart_read(up, AR933X_UART_INT_REG); 459 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG); 460 461 if (status & AR933X_UART_INT_RX_VALID) { 462 ar933x_uart_write(up, AR933X_UART_INT_REG, 463 AR933X_UART_INT_RX_VALID); 464 ar933x_uart_rx_chars(up); 465 } 466 467 if (status & AR933X_UART_INT_TX_EMPTY) { 468 ar933x_uart_write(up, AR933X_UART_INT_REG, 469 AR933X_UART_INT_TX_EMPTY); 470 ar933x_uart_stop_tx_interrupt(up); 471 ar933x_uart_tx_chars(up); 472 } 473 474 spin_unlock(&up->port.lock); 475 476 return IRQ_HANDLED; 477} 478 479static int ar933x_uart_startup(struct uart_port *port) 480{ 481 struct ar933x_uart_port *up = 482 container_of(port, struct ar933x_uart_port, port); 483 unsigned long flags; 484 int ret; 485 486 ret = request_irq(up->port.irq, ar933x_uart_interrupt, 487 up->port.irqflags, dev_name(up->port.dev), up); 488 if (ret) 489 return ret; 490 491 spin_lock_irqsave(&up->port.lock, flags); 492 493 /* Enable HOST interrupts */ 494 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 495 AR933X_UART_CS_HOST_INT_EN); 496 497 /* enable RX and TX ready overide */ 498 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, 499 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); 500 501 /* Enable RX interrupts */ 502 ar933x_uart_start_rx_interrupt(up); 503 504 spin_unlock_irqrestore(&up->port.lock, flags); 505 506 return 0; 507} 508 509static void ar933x_uart_shutdown(struct uart_port *port) 510{ 511 struct ar933x_uart_port *up = 512 container_of(port, struct ar933x_uart_port, port); 513 514 /* Disable all interrupts */ 515 up->ier = 0; 516 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); 517 518 /* Disable break condition */ 519 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, 520 AR933X_UART_CS_TX_BREAK); 521 522 free_irq(up->port.irq, up); 523} 524 525static const char *ar933x_uart_type(struct uart_port *port) 526{ 527 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL; 528} 529 530static void ar933x_uart_release_port(struct uart_port *port) 531{ 532 /* Nothing to release ... */ 533} 534 535static int ar933x_uart_request_port(struct uart_port *port) 536{ 537 /* UARTs always present */ 538 return 0; 539} 540 541static void ar933x_uart_config_port(struct uart_port *port, int flags) 542{ 543 if (flags & UART_CONFIG_TYPE) 544 port->type = PORT_AR933X; 545} 546 547static int ar933x_uart_verify_port(struct uart_port *port, 548 struct serial_struct *ser) 549{ 550 struct ar933x_uart_port *up = 551 container_of(port, struct ar933x_uart_port, port); 552 553 if (ser->type != PORT_UNKNOWN && 554 ser->type != PORT_AR933X) 555 return -EINVAL; 556 557 if (ser->irq < 0 || ser->irq >= NR_IRQS) 558 return -EINVAL; 559 560 if (ser->baud_base < up->min_baud || 561 ser->baud_base > up->max_baud) 562 return -EINVAL; 563 564 return 0; 565} 566 567static const struct uart_ops ar933x_uart_ops = { 568 .tx_empty = ar933x_uart_tx_empty, 569 .set_mctrl = ar933x_uart_set_mctrl, 570 .get_mctrl = ar933x_uart_get_mctrl, 571 .stop_tx = ar933x_uart_stop_tx, 572 .start_tx = ar933x_uart_start_tx, 573 .stop_rx = ar933x_uart_stop_rx, 574 .break_ctl = ar933x_uart_break_ctl, 575 .startup = ar933x_uart_startup, 576 .shutdown = ar933x_uart_shutdown, 577 .set_termios = ar933x_uart_set_termios, 578 .type = ar933x_uart_type, 579 .release_port = ar933x_uart_release_port, 580 .request_port = ar933x_uart_request_port, 581 .config_port = ar933x_uart_config_port, 582 .verify_port = ar933x_uart_verify_port, 583}; 584 585static int ar933x_config_rs485(struct uart_port *port, 586 struct serial_rs485 *rs485conf) 587{ 588 struct ar933x_uart_port *up = 589 container_of(port, struct ar933x_uart_port, port); 590 591 if ((rs485conf->flags & SER_RS485_ENABLED) && 592 !up->rts_gpiod) { 593 dev_err(port->dev, "RS485 needs rts-gpio\n"); 594 return 1; 595 } 596 597 if (rs485conf->flags & SER_RS485_ENABLED) 598 gpiod_set_value(up->rts_gpiod, 599 !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND)); 600 601 port->rs485 = *rs485conf; 602 return 0; 603} 604 605#ifdef CONFIG_SERIAL_AR933X_CONSOLE 606static struct ar933x_uart_port * 607ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; 608 609static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) 610{ 611 unsigned int status; 612 unsigned int timeout = 60000; 613 614 /* Wait up to 60ms for the character(s) to be sent. */ 615 do { 616 status = ar933x_uart_read(up, AR933X_UART_DATA_REG); 617 if (--timeout == 0) 618 break; 619 udelay(1); 620 } while ((status & AR933X_UART_DATA_TX_CSR) == 0); 621} 622 623static void ar933x_uart_console_putchar(struct uart_port *port, int ch) 624{ 625 struct ar933x_uart_port *up = 626 container_of(port, struct ar933x_uart_port, port); 627 628 ar933x_uart_wait_xmitr(up); 629 ar933x_uart_putc(up, ch); 630} 631 632static void ar933x_uart_console_write(struct console *co, const char *s, 633 unsigned int count) 634{ 635 struct ar933x_uart_port *up = ar933x_console_ports[co->index]; 636 unsigned long flags; 637 unsigned int int_en; 638 int locked = 1; 639 640 local_irq_save(flags); 641 642 if (up->port.sysrq) 643 locked = 0; 644 else if (oops_in_progress) 645 locked = spin_trylock(&up->port.lock); 646 else 647 spin_lock(&up->port.lock); 648 649 /* 650 * First save the IER then disable the interrupts 651 */ 652 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG); 653 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0); 654 655 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar); 656 657 /* 658 * Finally, wait for transmitter to become empty 659 * and restore the IER 660 */ 661 ar933x_uart_wait_xmitr(up); 662 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en); 663 664 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS); 665 666 if (locked) 667 spin_unlock(&up->port.lock); 668 669 local_irq_restore(flags); 670} 671 672static int ar933x_uart_console_setup(struct console *co, char *options) 673{ 674 struct ar933x_uart_port *up; 675 int baud = 115200; 676 int bits = 8; 677 int parity = 'n'; 678 int flow = 'n'; 679 680 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS) 681 return -EINVAL; 682 683 up = ar933x_console_ports[co->index]; 684 if (!up) 685 return -ENODEV; 686 687 if (options) 688 uart_parse_options(options, &baud, &parity, &bits, &flow); 689 690 return uart_set_options(&up->port, co, baud, parity, bits, flow); 691} 692 693static struct console ar933x_uart_console = { 694 .name = "ttyATH", 695 .write = ar933x_uart_console_write, 696 .device = uart_console_device, 697 .setup = ar933x_uart_console_setup, 698 .flags = CON_PRINTBUFFER, 699 .index = -1, 700 .data = &ar933x_uart_driver, 701}; 702#endif /* CONFIG_SERIAL_AR933X_CONSOLE */ 703 704static struct uart_driver ar933x_uart_driver = { 705 .owner = THIS_MODULE, 706 .driver_name = DRIVER_NAME, 707 .dev_name = "ttyATH", 708 .nr = CONFIG_SERIAL_AR933X_NR_UARTS, 709 .cons = NULL, /* filled in runtime */ 710}; 711 712static int ar933x_uart_probe(struct platform_device *pdev) 713{ 714 struct ar933x_uart_port *up; 715 struct uart_port *port; 716 struct resource *mem_res; 717 struct resource *irq_res; 718 struct device_node *np; 719 unsigned int baud; 720 int id; 721 int ret; 722 723 np = pdev->dev.of_node; 724 if (IS_ENABLED(CONFIG_OF) && np) { 725 id = of_alias_get_id(np, "serial"); 726 if (id < 0) { 727 dev_err(&pdev->dev, "unable to get alias id, err=%d\n", 728 id); 729 return id; 730 } 731 } else { 732 id = pdev->id; 733 if (id == -1) 734 id = 0; 735 } 736 737 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS) 738 return -EINVAL; 739 740 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 741 if (!irq_res) { 742 dev_err(&pdev->dev, "no IRQ resource\n"); 743 return -EINVAL; 744 } 745 746 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port), 747 GFP_KERNEL); 748 if (!up) 749 return -ENOMEM; 750 751 up->clk = devm_clk_get(&pdev->dev, "uart"); 752 if (IS_ERR(up->clk)) { 753 dev_err(&pdev->dev, "unable to get UART clock\n"); 754 return PTR_ERR(up->clk); 755 } 756 757 port = &up->port; 758 759 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 760 port->membase = devm_ioremap_resource(&pdev->dev, mem_res); 761 if (IS_ERR(port->membase)) 762 return PTR_ERR(port->membase); 763 764 ret = clk_prepare_enable(up->clk); 765 if (ret) 766 return ret; 767 768 port->uartclk = clk_get_rate(up->clk); 769 if (!port->uartclk) { 770 ret = -EINVAL; 771 goto err_disable_clk; 772 } 773 774 port->mapbase = mem_res->start; 775 port->line = id; 776 port->irq = irq_res->start; 777 port->dev = &pdev->dev; 778 port->type = PORT_AR933X; 779 port->iotype = UPIO_MEM32; 780 781 port->regshift = 2; 782 port->fifosize = AR933X_UART_FIFO_SIZE; 783 port->ops = &ar933x_uart_ops; 784 port->rs485_config = ar933x_config_rs485; 785 786 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); 787 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); 788 789 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); 790 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); 791 792 ret = uart_get_rs485_mode(port); 793 if (ret) 794 goto err_disable_clk; 795 796 up->gpios = mctrl_gpio_init(port, 0); 797 if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) { 798 ret = PTR_ERR(up->gpios); 799 goto err_disable_clk; 800 } 801 802 up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS); 803 804 if ((port->rs485.flags & SER_RS485_ENABLED) && 805 !up->rts_gpiod) { 806 dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n"); 807 port->rs485.flags &= ~SER_RS485_ENABLED; 808 } 809 810#ifdef CONFIG_SERIAL_AR933X_CONSOLE 811 ar933x_console_ports[up->port.line] = up; 812#endif 813 814 ret = uart_add_one_port(&ar933x_uart_driver, &up->port); 815 if (ret) 816 goto err_disable_clk; 817 818 platform_set_drvdata(pdev, up); 819 return 0; 820 821err_disable_clk: 822 clk_disable_unprepare(up->clk); 823 return ret; 824} 825 826static int ar933x_uart_remove(struct platform_device *pdev) 827{ 828 struct ar933x_uart_port *up; 829 830 up = platform_get_drvdata(pdev); 831 832 if (up) { 833 uart_remove_one_port(&ar933x_uart_driver, &up->port); 834 clk_disable_unprepare(up->clk); 835 } 836 837 return 0; 838} 839 840#ifdef CONFIG_OF 841static const struct of_device_id ar933x_uart_of_ids[] = { 842 { .compatible = "qca,ar9330-uart" }, 843 {}, 844}; 845MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids); 846#endif 847 848static struct platform_driver ar933x_uart_platform_driver = { 849 .probe = ar933x_uart_probe, 850 .remove = ar933x_uart_remove, 851 .driver = { 852 .name = DRIVER_NAME, 853 .of_match_table = of_match_ptr(ar933x_uart_of_ids), 854 }, 855}; 856 857static int __init ar933x_uart_init(void) 858{ 859 int ret; 860 861#ifdef CONFIG_SERIAL_AR933X_CONSOLE 862 ar933x_uart_driver.cons = &ar933x_uart_console; 863#endif 864 865 ret = uart_register_driver(&ar933x_uart_driver); 866 if (ret) 867 goto err_out; 868 869 ret = platform_driver_register(&ar933x_uart_platform_driver); 870 if (ret) 871 goto err_unregister_uart_driver; 872 873 return 0; 874 875err_unregister_uart_driver: 876 uart_unregister_driver(&ar933x_uart_driver); 877err_out: 878 return ret; 879} 880 881static void __exit ar933x_uart_exit(void) 882{ 883 platform_driver_unregister(&ar933x_uart_platform_driver); 884 uart_unregister_driver(&ar933x_uart_driver); 885} 886 887module_init(ar933x_uart_init); 888module_exit(ar933x_uart_exit); 889 890MODULE_DESCRIPTION("Atheros AR933X UART driver"); 891MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); 892MODULE_LICENSE("GPL v2"); 893MODULE_ALIAS("platform:" DRIVER_NAME); 894