18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci *  Serial Port driver for Tegra devices
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci *  Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#include <linux/acpi.h>
98c2ecf20Sopenharmony_ci#include <linux/clk.h>
108c2ecf20Sopenharmony_ci#include <linux/console.h>
118c2ecf20Sopenharmony_ci#include <linux/delay.h>
128c2ecf20Sopenharmony_ci#include <linux/io.h>
138c2ecf20Sopenharmony_ci#include <linux/module.h>
148c2ecf20Sopenharmony_ci#include <linux/reset.h>
158c2ecf20Sopenharmony_ci#include <linux/slab.h>
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci#include "8250.h"
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_cistruct tegra_uart {
208c2ecf20Sopenharmony_ci	struct clk *clk;
218c2ecf20Sopenharmony_ci	struct reset_control *rst;
228c2ecf20Sopenharmony_ci	int line;
238c2ecf20Sopenharmony_ci};
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_cistatic void tegra_uart_handle_break(struct uart_port *p)
268c2ecf20Sopenharmony_ci{
278c2ecf20Sopenharmony_ci	unsigned int status, tmout = 10000;
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci	do {
308c2ecf20Sopenharmony_ci		status = p->serial_in(p, UART_LSR);
318c2ecf20Sopenharmony_ci		if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
328c2ecf20Sopenharmony_ci			status = p->serial_in(p, UART_RX);
338c2ecf20Sopenharmony_ci		else
348c2ecf20Sopenharmony_ci			break;
358c2ecf20Sopenharmony_ci		if (--tmout == 0)
368c2ecf20Sopenharmony_ci			break;
378c2ecf20Sopenharmony_ci		udelay(1);
388c2ecf20Sopenharmony_ci	} while (1);
398c2ecf20Sopenharmony_ci}
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_cistatic int tegra_uart_probe(struct platform_device *pdev)
428c2ecf20Sopenharmony_ci{
438c2ecf20Sopenharmony_ci	struct uart_8250_port port8250;
448c2ecf20Sopenharmony_ci	struct tegra_uart *uart;
458c2ecf20Sopenharmony_ci	struct uart_port *port;
468c2ecf20Sopenharmony_ci	struct resource *res;
478c2ecf20Sopenharmony_ci	int ret;
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci	uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);
508c2ecf20Sopenharmony_ci	if (!uart)
518c2ecf20Sopenharmony_ci		return -ENOMEM;
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci	memset(&port8250, 0, sizeof(port8250));
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	port = &port8250.port;
568c2ecf20Sopenharmony_ci	spin_lock_init(&port->lock);
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci	port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
598c2ecf20Sopenharmony_ci		      UPF_FIXED_TYPE;
608c2ecf20Sopenharmony_ci	port->iotype = UPIO_MEM32;
618c2ecf20Sopenharmony_ci	port->regshift = 2;
628c2ecf20Sopenharmony_ci	port->type = PORT_TEGRA;
638c2ecf20Sopenharmony_ci	port->irqflags |= IRQF_SHARED;
648c2ecf20Sopenharmony_ci	port->dev = &pdev->dev;
658c2ecf20Sopenharmony_ci	port->handle_break = tegra_uart_handle_break;
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci	ret = of_alias_get_id(pdev->dev.of_node, "serial");
688c2ecf20Sopenharmony_ci	if (ret >= 0)
698c2ecf20Sopenharmony_ci		port->line = ret;
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ci	ret = platform_get_irq(pdev, 0);
728c2ecf20Sopenharmony_ci	if (ret < 0)
738c2ecf20Sopenharmony_ci		return ret;
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci	port->irq = ret;
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
788c2ecf20Sopenharmony_ci	if (!res)
798c2ecf20Sopenharmony_ci		return -ENODEV;
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci	port->membase = devm_ioremap(&pdev->dev, res->start,
828c2ecf20Sopenharmony_ci				     resource_size(res));
838c2ecf20Sopenharmony_ci	if (!port->membase)
848c2ecf20Sopenharmony_ci		return -ENOMEM;
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci	port->mapbase = res->start;
878c2ecf20Sopenharmony_ci	port->mapsize = resource_size(res);
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci	uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
908c2ecf20Sopenharmony_ci	if (IS_ERR(uart->rst))
918c2ecf20Sopenharmony_ci		return PTR_ERR(uart->rst);
928c2ecf20Sopenharmony_ci
938c2ecf20Sopenharmony_ci	if (device_property_read_u32(&pdev->dev, "clock-frequency",
948c2ecf20Sopenharmony_ci				     &port->uartclk)) {
958c2ecf20Sopenharmony_ci		uart->clk = devm_clk_get(&pdev->dev, NULL);
968c2ecf20Sopenharmony_ci		if (IS_ERR(uart->clk)) {
978c2ecf20Sopenharmony_ci			dev_err(&pdev->dev, "failed to get clock!\n");
988c2ecf20Sopenharmony_ci			return -ENODEV;
998c2ecf20Sopenharmony_ci		}
1008c2ecf20Sopenharmony_ci
1018c2ecf20Sopenharmony_ci		ret = clk_prepare_enable(uart->clk);
1028c2ecf20Sopenharmony_ci		if (ret < 0)
1038c2ecf20Sopenharmony_ci			return ret;
1048c2ecf20Sopenharmony_ci
1058c2ecf20Sopenharmony_ci		port->uartclk = clk_get_rate(uart->clk);
1068c2ecf20Sopenharmony_ci	}
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci	ret = reset_control_deassert(uart->rst);
1098c2ecf20Sopenharmony_ci	if (ret)
1108c2ecf20Sopenharmony_ci		goto err_clkdisable;
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci	ret = serial8250_register_8250_port(&port8250);
1138c2ecf20Sopenharmony_ci	if (ret < 0)
1148c2ecf20Sopenharmony_ci		goto err_ctrl_assert;
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_ci	platform_set_drvdata(pdev, uart);
1178c2ecf20Sopenharmony_ci	uart->line = ret;
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci	return 0;
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_cierr_ctrl_assert:
1228c2ecf20Sopenharmony_ci	reset_control_assert(uart->rst);
1238c2ecf20Sopenharmony_cierr_clkdisable:
1248c2ecf20Sopenharmony_ci	clk_disable_unprepare(uart->clk);
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ci	return ret;
1278c2ecf20Sopenharmony_ci}
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_cistatic int tegra_uart_remove(struct platform_device *pdev)
1308c2ecf20Sopenharmony_ci{
1318c2ecf20Sopenharmony_ci	struct tegra_uart *uart = platform_get_drvdata(pdev);
1328c2ecf20Sopenharmony_ci
1338c2ecf20Sopenharmony_ci	serial8250_unregister_port(uart->line);
1348c2ecf20Sopenharmony_ci	reset_control_assert(uart->rst);
1358c2ecf20Sopenharmony_ci	clk_disable_unprepare(uart->clk);
1368c2ecf20Sopenharmony_ci
1378c2ecf20Sopenharmony_ci	return 0;
1388c2ecf20Sopenharmony_ci}
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci#ifdef CONFIG_PM_SLEEP
1418c2ecf20Sopenharmony_cistatic int tegra_uart_suspend(struct device *dev)
1428c2ecf20Sopenharmony_ci{
1438c2ecf20Sopenharmony_ci	struct tegra_uart *uart = dev_get_drvdata(dev);
1448c2ecf20Sopenharmony_ci	struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
1458c2ecf20Sopenharmony_ci	struct uart_port *port = &port8250->port;
1468c2ecf20Sopenharmony_ci
1478c2ecf20Sopenharmony_ci	serial8250_suspend_port(uart->line);
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ci	if (!uart_console(port) || console_suspend_enabled)
1508c2ecf20Sopenharmony_ci		clk_disable_unprepare(uart->clk);
1518c2ecf20Sopenharmony_ci
1528c2ecf20Sopenharmony_ci	return 0;
1538c2ecf20Sopenharmony_ci}
1548c2ecf20Sopenharmony_ci
1558c2ecf20Sopenharmony_cistatic int tegra_uart_resume(struct device *dev)
1568c2ecf20Sopenharmony_ci{
1578c2ecf20Sopenharmony_ci	struct tegra_uart *uart = dev_get_drvdata(dev);
1588c2ecf20Sopenharmony_ci	struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
1598c2ecf20Sopenharmony_ci	struct uart_port *port = &port8250->port;
1608c2ecf20Sopenharmony_ci
1618c2ecf20Sopenharmony_ci	if (!uart_console(port) || console_suspend_enabled)
1628c2ecf20Sopenharmony_ci		clk_prepare_enable(uart->clk);
1638c2ecf20Sopenharmony_ci
1648c2ecf20Sopenharmony_ci	serial8250_resume_port(uart->line);
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci	return 0;
1678c2ecf20Sopenharmony_ci}
1688c2ecf20Sopenharmony_ci#endif
1698c2ecf20Sopenharmony_ci
1708c2ecf20Sopenharmony_cistatic SIMPLE_DEV_PM_OPS(tegra_uart_pm_ops, tegra_uart_suspend,
1718c2ecf20Sopenharmony_ci			 tegra_uart_resume);
1728c2ecf20Sopenharmony_ci
1738c2ecf20Sopenharmony_cistatic const struct of_device_id tegra_uart_of_match[] = {
1748c2ecf20Sopenharmony_ci	{ .compatible = "nvidia,tegra20-uart", },
1758c2ecf20Sopenharmony_ci	{ },
1768c2ecf20Sopenharmony_ci};
1778c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, tegra_uart_of_match);
1788c2ecf20Sopenharmony_ci
1798c2ecf20Sopenharmony_cistatic const struct acpi_device_id tegra_uart_acpi_match[] = {
1808c2ecf20Sopenharmony_ci	{ "NVDA0100", 0 },
1818c2ecf20Sopenharmony_ci	{ },
1828c2ecf20Sopenharmony_ci};
1838c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(acpi, tegra_uart_acpi_match);
1848c2ecf20Sopenharmony_ci
1858c2ecf20Sopenharmony_cistatic struct platform_driver tegra_uart_driver = {
1868c2ecf20Sopenharmony_ci	.driver = {
1878c2ecf20Sopenharmony_ci		.name = "tegra-uart",
1888c2ecf20Sopenharmony_ci		.pm = &tegra_uart_pm_ops,
1898c2ecf20Sopenharmony_ci		.of_match_table = tegra_uart_of_match,
1908c2ecf20Sopenharmony_ci		.acpi_match_table = ACPI_PTR(tegra_uart_acpi_match),
1918c2ecf20Sopenharmony_ci	},
1928c2ecf20Sopenharmony_ci	.probe = tegra_uart_probe,
1938c2ecf20Sopenharmony_ci	.remove = tegra_uart_remove,
1948c2ecf20Sopenharmony_ci};
1958c2ecf20Sopenharmony_ci
1968c2ecf20Sopenharmony_cimodule_platform_driver(tegra_uart_driver);
1978c2ecf20Sopenharmony_ci
1988c2ecf20Sopenharmony_ciMODULE_AUTHOR("Jeff Brasen <jbrasen@nvidia.com>");
1998c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("NVIDIA Tegra 8250 Driver");
2008c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
201