18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci *  Driver for 8250/16550-type serial ports
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci *  Copyright (C) 2001 Russell King.
88c2ecf20Sopenharmony_ci */
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ci#include <linux/serial_8250.h>
118c2ecf20Sopenharmony_ci#include <linux/serial_reg.h>
128c2ecf20Sopenharmony_ci#include <linux/dmaengine.h>
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#include "../serial_mctrl_gpio.h"
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_cistruct uart_8250_dma {
178c2ecf20Sopenharmony_ci	int (*tx_dma)(struct uart_8250_port *p);
188c2ecf20Sopenharmony_ci	int (*rx_dma)(struct uart_8250_port *p);
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci	/* Filter function */
218c2ecf20Sopenharmony_ci	dma_filter_fn		fn;
228c2ecf20Sopenharmony_ci	/* Parameter to the filter function */
238c2ecf20Sopenharmony_ci	void			*rx_param;
248c2ecf20Sopenharmony_ci	void			*tx_param;
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci	struct dma_slave_config	rxconf;
278c2ecf20Sopenharmony_ci	struct dma_slave_config	txconf;
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci	struct dma_chan		*rxchan;
308c2ecf20Sopenharmony_ci	struct dma_chan		*txchan;
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci	/* Device address base for DMA operations */
338c2ecf20Sopenharmony_ci	phys_addr_t		rx_dma_addr;
348c2ecf20Sopenharmony_ci	phys_addr_t		tx_dma_addr;
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci	/* DMA address of the buffer in memory */
378c2ecf20Sopenharmony_ci	dma_addr_t		rx_addr;
388c2ecf20Sopenharmony_ci	dma_addr_t		tx_addr;
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci	dma_cookie_t		rx_cookie;
418c2ecf20Sopenharmony_ci	dma_cookie_t		tx_cookie;
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci	void			*rx_buf;
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci	size_t			rx_size;
468c2ecf20Sopenharmony_ci	size_t			tx_size;
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci	unsigned char		tx_running;
498c2ecf20Sopenharmony_ci	unsigned char		tx_err;
508c2ecf20Sopenharmony_ci	unsigned char		rx_running;
518c2ecf20Sopenharmony_ci};
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_cistruct old_serial_port {
548c2ecf20Sopenharmony_ci	unsigned int uart;
558c2ecf20Sopenharmony_ci	unsigned int baud_base;
568c2ecf20Sopenharmony_ci	unsigned int port;
578c2ecf20Sopenharmony_ci	unsigned int irq;
588c2ecf20Sopenharmony_ci	upf_t        flags;
598c2ecf20Sopenharmony_ci	unsigned char io_type;
608c2ecf20Sopenharmony_ci	unsigned char __iomem *iomem_base;
618c2ecf20Sopenharmony_ci	unsigned short iomem_reg_shift;
628c2ecf20Sopenharmony_ci};
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_cistruct serial8250_config {
658c2ecf20Sopenharmony_ci	const char	*name;
668c2ecf20Sopenharmony_ci	unsigned short	fifo_size;
678c2ecf20Sopenharmony_ci	unsigned short	tx_loadsz;
688c2ecf20Sopenharmony_ci	unsigned char	fcr;
698c2ecf20Sopenharmony_ci	unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
708c2ecf20Sopenharmony_ci	unsigned int	flags;
718c2ecf20Sopenharmony_ci};
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci#define UART_CAP_FIFO	(1 << 8)	/* UART has FIFO */
748c2ecf20Sopenharmony_ci#define UART_CAP_EFR	(1 << 9)	/* UART has EFR */
758c2ecf20Sopenharmony_ci#define UART_CAP_SLEEP	(1 << 10)	/* UART has IER sleep */
768c2ecf20Sopenharmony_ci#define UART_CAP_AFE	(1 << 11)	/* MCR-based hw flow control */
778c2ecf20Sopenharmony_ci#define UART_CAP_UUE	(1 << 12)	/* UART needs IER bit 6 set (Xscale) */
788c2ecf20Sopenharmony_ci#define UART_CAP_RTOIE	(1 << 13)	/* UART needs IER bit 4 set (Xscale, Tegra) */
798c2ecf20Sopenharmony_ci#define UART_CAP_HFIFO	(1 << 14)	/* UART has a "hidden" FIFO */
808c2ecf20Sopenharmony_ci#define UART_CAP_RPM	(1 << 15)	/* Runtime PM is active while idle */
818c2ecf20Sopenharmony_ci#define UART_CAP_IRDA	(1 << 16)	/* UART supports IrDA line discipline */
828c2ecf20Sopenharmony_ci#define UART_CAP_MINI	(1 << 17)	/* Mini UART on BCM283X family lacks:
838c2ecf20Sopenharmony_ci					 * STOP PARITY EPAR SPAR WLEN5 WLEN6
848c2ecf20Sopenharmony_ci					 */
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci#define UART_BUG_QUOT	(1 << 0)	/* UART has buggy quot LSB */
878c2ecf20Sopenharmony_ci#define UART_BUG_TXEN	(1 << 1)	/* UART has buggy TX IIR status */
888c2ecf20Sopenharmony_ci#define UART_BUG_NOMSR	(1 << 2)	/* UART has buggy MSR status bits (Au1x00) */
898c2ecf20Sopenharmony_ci#define UART_BUG_THRE	(1 << 3)	/* UART has buggy THRE reassertion */
908c2ecf20Sopenharmony_ci#define UART_BUG_TXRACE	(1 << 5)	/* UART Tx fails to set remote DR */
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ci
938c2ecf20Sopenharmony_ci#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
948c2ecf20Sopenharmony_ci#define SERIAL8250_SHARE_IRQS 1
958c2ecf20Sopenharmony_ci#else
968c2ecf20Sopenharmony_ci#define SERIAL8250_SHARE_IRQS 0
978c2ecf20Sopenharmony_ci#endif
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_ci#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags)		\
1008c2ecf20Sopenharmony_ci	{							\
1018c2ecf20Sopenharmony_ci		.iobase		= _base,			\
1028c2ecf20Sopenharmony_ci		.irq		= _irq,				\
1038c2ecf20Sopenharmony_ci		.uartclk	= 1843200,			\
1048c2ecf20Sopenharmony_ci		.iotype		= UPIO_PORT,			\
1058c2ecf20Sopenharmony_ci		.flags		= UPF_BOOT_AUTOCONF | (_flags),	\
1068c2ecf20Sopenharmony_ci	}
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
1098c2ecf20Sopenharmony_ci
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_cistatic inline int serial_in(struct uart_8250_port *up, int offset)
1128c2ecf20Sopenharmony_ci{
1138c2ecf20Sopenharmony_ci	return up->port.serial_in(&up->port, offset);
1148c2ecf20Sopenharmony_ci}
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_cistatic inline void serial_out(struct uart_8250_port *up, int offset, int value)
1178c2ecf20Sopenharmony_ci{
1188c2ecf20Sopenharmony_ci	up->port.serial_out(&up->port, offset, value);
1198c2ecf20Sopenharmony_ci}
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci/*
1228c2ecf20Sopenharmony_ci * For the 16C950
1238c2ecf20Sopenharmony_ci */
1248c2ecf20Sopenharmony_cistatic void serial_icr_write(struct uart_8250_port *up, int offset, int value)
1258c2ecf20Sopenharmony_ci{
1268c2ecf20Sopenharmony_ci	serial_out(up, UART_SCR, offset);
1278c2ecf20Sopenharmony_ci	serial_out(up, UART_ICR, value);
1288c2ecf20Sopenharmony_ci}
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_cistatic unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
1318c2ecf20Sopenharmony_ci						   int offset)
1328c2ecf20Sopenharmony_ci{
1338c2ecf20Sopenharmony_ci	unsigned int value;
1348c2ecf20Sopenharmony_ci
1358c2ecf20Sopenharmony_ci	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
1368c2ecf20Sopenharmony_ci	serial_out(up, UART_SCR, offset);
1378c2ecf20Sopenharmony_ci	value = serial_in(up, UART_ICR);
1388c2ecf20Sopenharmony_ci	serial_icr_write(up, UART_ACR, up->acr);
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci	return value;
1418c2ecf20Sopenharmony_ci}
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_civoid serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_cistatic inline int serial_dl_read(struct uart_8250_port *up)
1468c2ecf20Sopenharmony_ci{
1478c2ecf20Sopenharmony_ci	return up->dl_read(up);
1488c2ecf20Sopenharmony_ci}
1498c2ecf20Sopenharmony_ci
1508c2ecf20Sopenharmony_cistatic inline void serial_dl_write(struct uart_8250_port *up, int value)
1518c2ecf20Sopenharmony_ci{
1528c2ecf20Sopenharmony_ci	up->dl_write(up, value);
1538c2ecf20Sopenharmony_ci}
1548c2ecf20Sopenharmony_ci
1558c2ecf20Sopenharmony_cistatic inline bool serial8250_set_THRI(struct uart_8250_port *up)
1568c2ecf20Sopenharmony_ci{
1578c2ecf20Sopenharmony_ci	if (up->ier & UART_IER_THRI)
1588c2ecf20Sopenharmony_ci		return false;
1598c2ecf20Sopenharmony_ci	up->ier |= UART_IER_THRI;
1608c2ecf20Sopenharmony_ci	serial_out(up, UART_IER, up->ier);
1618c2ecf20Sopenharmony_ci	return true;
1628c2ecf20Sopenharmony_ci}
1638c2ecf20Sopenharmony_ci
1648c2ecf20Sopenharmony_cistatic inline bool serial8250_clear_THRI(struct uart_8250_port *up)
1658c2ecf20Sopenharmony_ci{
1668c2ecf20Sopenharmony_ci	if (!(up->ier & UART_IER_THRI))
1678c2ecf20Sopenharmony_ci		return false;
1688c2ecf20Sopenharmony_ci	up->ier &= ~UART_IER_THRI;
1698c2ecf20Sopenharmony_ci	serial_out(up, UART_IER, up->ier);
1708c2ecf20Sopenharmony_ci	return true;
1718c2ecf20Sopenharmony_ci}
1728c2ecf20Sopenharmony_ci
1738c2ecf20Sopenharmony_cistruct uart_8250_port *serial8250_get_port(int line);
1748c2ecf20Sopenharmony_ci
1758c2ecf20Sopenharmony_civoid serial8250_rpm_get(struct uart_8250_port *p);
1768c2ecf20Sopenharmony_civoid serial8250_rpm_put(struct uart_8250_port *p);
1778c2ecf20Sopenharmony_ci
1788c2ecf20Sopenharmony_civoid serial8250_rpm_get_tx(struct uart_8250_port *p);
1798c2ecf20Sopenharmony_civoid serial8250_rpm_put_tx(struct uart_8250_port *p);
1808c2ecf20Sopenharmony_ci
1818c2ecf20Sopenharmony_ciint serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
1828c2ecf20Sopenharmony_civoid serial8250_em485_start_tx(struct uart_8250_port *p);
1838c2ecf20Sopenharmony_civoid serial8250_em485_stop_tx(struct uart_8250_port *p);
1848c2ecf20Sopenharmony_civoid serial8250_em485_destroy(struct uart_8250_port *p);
1858c2ecf20Sopenharmony_ci
1868c2ecf20Sopenharmony_ci/* MCR <-> TIOCM conversion */
1878c2ecf20Sopenharmony_cistatic inline int serial8250_TIOCM_to_MCR(int tiocm)
1888c2ecf20Sopenharmony_ci{
1898c2ecf20Sopenharmony_ci	int mcr = 0;
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ci	if (tiocm & TIOCM_RTS)
1928c2ecf20Sopenharmony_ci		mcr |= UART_MCR_RTS;
1938c2ecf20Sopenharmony_ci	if (tiocm & TIOCM_DTR)
1948c2ecf20Sopenharmony_ci		mcr |= UART_MCR_DTR;
1958c2ecf20Sopenharmony_ci	if (tiocm & TIOCM_OUT1)
1968c2ecf20Sopenharmony_ci		mcr |= UART_MCR_OUT1;
1978c2ecf20Sopenharmony_ci	if (tiocm & TIOCM_OUT2)
1988c2ecf20Sopenharmony_ci		mcr |= UART_MCR_OUT2;
1998c2ecf20Sopenharmony_ci	if (tiocm & TIOCM_LOOP)
2008c2ecf20Sopenharmony_ci		mcr |= UART_MCR_LOOP;
2018c2ecf20Sopenharmony_ci
2028c2ecf20Sopenharmony_ci	return mcr;
2038c2ecf20Sopenharmony_ci}
2048c2ecf20Sopenharmony_ci
2058c2ecf20Sopenharmony_cistatic inline int serial8250_MCR_to_TIOCM(int mcr)
2068c2ecf20Sopenharmony_ci{
2078c2ecf20Sopenharmony_ci	int tiocm = 0;
2088c2ecf20Sopenharmony_ci
2098c2ecf20Sopenharmony_ci	if (mcr & UART_MCR_RTS)
2108c2ecf20Sopenharmony_ci		tiocm |= TIOCM_RTS;
2118c2ecf20Sopenharmony_ci	if (mcr & UART_MCR_DTR)
2128c2ecf20Sopenharmony_ci		tiocm |= TIOCM_DTR;
2138c2ecf20Sopenharmony_ci	if (mcr & UART_MCR_OUT1)
2148c2ecf20Sopenharmony_ci		tiocm |= TIOCM_OUT1;
2158c2ecf20Sopenharmony_ci	if (mcr & UART_MCR_OUT2)
2168c2ecf20Sopenharmony_ci		tiocm |= TIOCM_OUT2;
2178c2ecf20Sopenharmony_ci	if (mcr & UART_MCR_LOOP)
2188c2ecf20Sopenharmony_ci		tiocm |= TIOCM_LOOP;
2198c2ecf20Sopenharmony_ci
2208c2ecf20Sopenharmony_ci	return tiocm;
2218c2ecf20Sopenharmony_ci}
2228c2ecf20Sopenharmony_ci
2238c2ecf20Sopenharmony_ci/* MSR <-> TIOCM conversion */
2248c2ecf20Sopenharmony_cistatic inline int serial8250_MSR_to_TIOCM(int msr)
2258c2ecf20Sopenharmony_ci{
2268c2ecf20Sopenharmony_ci	int tiocm = 0;
2278c2ecf20Sopenharmony_ci
2288c2ecf20Sopenharmony_ci	if (msr & UART_MSR_DCD)
2298c2ecf20Sopenharmony_ci		tiocm |= TIOCM_CAR;
2308c2ecf20Sopenharmony_ci	if (msr & UART_MSR_RI)
2318c2ecf20Sopenharmony_ci		tiocm |= TIOCM_RNG;
2328c2ecf20Sopenharmony_ci	if (msr & UART_MSR_DSR)
2338c2ecf20Sopenharmony_ci		tiocm |= TIOCM_DSR;
2348c2ecf20Sopenharmony_ci	if (msr & UART_MSR_CTS)
2358c2ecf20Sopenharmony_ci		tiocm |= TIOCM_CTS;
2368c2ecf20Sopenharmony_ci
2378c2ecf20Sopenharmony_ci	return tiocm;
2388c2ecf20Sopenharmony_ci}
2398c2ecf20Sopenharmony_ci
2408c2ecf20Sopenharmony_cistatic inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
2418c2ecf20Sopenharmony_ci{
2428c2ecf20Sopenharmony_ci	serial_out(up, UART_MCR, value);
2438c2ecf20Sopenharmony_ci
2448c2ecf20Sopenharmony_ci	if (up->gpios)
2458c2ecf20Sopenharmony_ci		mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
2468c2ecf20Sopenharmony_ci}
2478c2ecf20Sopenharmony_ci
2488c2ecf20Sopenharmony_cistatic inline int serial8250_in_MCR(struct uart_8250_port *up)
2498c2ecf20Sopenharmony_ci{
2508c2ecf20Sopenharmony_ci	int mctrl;
2518c2ecf20Sopenharmony_ci
2528c2ecf20Sopenharmony_ci	mctrl = serial_in(up, UART_MCR);
2538c2ecf20Sopenharmony_ci
2548c2ecf20Sopenharmony_ci	if (up->gpios) {
2558c2ecf20Sopenharmony_ci		unsigned int mctrl_gpio = 0;
2568c2ecf20Sopenharmony_ci
2578c2ecf20Sopenharmony_ci		mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
2588c2ecf20Sopenharmony_ci		mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
2598c2ecf20Sopenharmony_ci	}
2608c2ecf20Sopenharmony_ci
2618c2ecf20Sopenharmony_ci	return mctrl;
2628c2ecf20Sopenharmony_ci}
2638c2ecf20Sopenharmony_ci
2648c2ecf20Sopenharmony_ci#if defined(__alpha__) && !defined(CONFIG_PCI)
2658c2ecf20Sopenharmony_ci/*
2668c2ecf20Sopenharmony_ci * Digital did something really horribly wrong with the OUT1 and OUT2
2678c2ecf20Sopenharmony_ci * lines on at least some ALPHA's.  The failure mode is that if either
2688c2ecf20Sopenharmony_ci * is cleared, the machine locks up with endless interrupts.
2698c2ecf20Sopenharmony_ci */
2708c2ecf20Sopenharmony_ci#define ALPHA_KLUDGE_MCR  (UART_MCR_OUT2 | UART_MCR_OUT1)
2718c2ecf20Sopenharmony_ci#else
2728c2ecf20Sopenharmony_ci#define ALPHA_KLUDGE_MCR 0
2738c2ecf20Sopenharmony_ci#endif
2748c2ecf20Sopenharmony_ci
2758c2ecf20Sopenharmony_ci#ifdef CONFIG_SERIAL_8250_PNP
2768c2ecf20Sopenharmony_ciint serial8250_pnp_init(void);
2778c2ecf20Sopenharmony_civoid serial8250_pnp_exit(void);
2788c2ecf20Sopenharmony_ci#else
2798c2ecf20Sopenharmony_cistatic inline int serial8250_pnp_init(void) { return 0; }
2808c2ecf20Sopenharmony_cistatic inline void serial8250_pnp_exit(void) { }
2818c2ecf20Sopenharmony_ci#endif
2828c2ecf20Sopenharmony_ci
2838c2ecf20Sopenharmony_ci#ifdef CONFIG_SERIAL_8250_FINTEK
2848c2ecf20Sopenharmony_ciint fintek_8250_probe(struct uart_8250_port *uart);
2858c2ecf20Sopenharmony_ci#else
2868c2ecf20Sopenharmony_cistatic inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
2878c2ecf20Sopenharmony_ci#endif
2888c2ecf20Sopenharmony_ci
2898c2ecf20Sopenharmony_ci#ifdef CONFIG_ARCH_OMAP1
2908c2ecf20Sopenharmony_cistatic inline int is_omap1_8250(struct uart_8250_port *pt)
2918c2ecf20Sopenharmony_ci{
2928c2ecf20Sopenharmony_ci	int res;
2938c2ecf20Sopenharmony_ci
2948c2ecf20Sopenharmony_ci	switch (pt->port.mapbase) {
2958c2ecf20Sopenharmony_ci	case OMAP1_UART1_BASE:
2968c2ecf20Sopenharmony_ci	case OMAP1_UART2_BASE:
2978c2ecf20Sopenharmony_ci	case OMAP1_UART3_BASE:
2988c2ecf20Sopenharmony_ci		res = 1;
2998c2ecf20Sopenharmony_ci		break;
3008c2ecf20Sopenharmony_ci	default:
3018c2ecf20Sopenharmony_ci		res = 0;
3028c2ecf20Sopenharmony_ci		break;
3038c2ecf20Sopenharmony_ci	}
3048c2ecf20Sopenharmony_ci
3058c2ecf20Sopenharmony_ci	return res;
3068c2ecf20Sopenharmony_ci}
3078c2ecf20Sopenharmony_ci
3088c2ecf20Sopenharmony_cistatic inline int is_omap1510_8250(struct uart_8250_port *pt)
3098c2ecf20Sopenharmony_ci{
3108c2ecf20Sopenharmony_ci	if (!cpu_is_omap1510())
3118c2ecf20Sopenharmony_ci		return 0;
3128c2ecf20Sopenharmony_ci
3138c2ecf20Sopenharmony_ci	return is_omap1_8250(pt);
3148c2ecf20Sopenharmony_ci}
3158c2ecf20Sopenharmony_ci#else
3168c2ecf20Sopenharmony_cistatic inline int is_omap1_8250(struct uart_8250_port *pt)
3178c2ecf20Sopenharmony_ci{
3188c2ecf20Sopenharmony_ci	return 0;
3198c2ecf20Sopenharmony_ci}
3208c2ecf20Sopenharmony_cistatic inline int is_omap1510_8250(struct uart_8250_port *pt)
3218c2ecf20Sopenharmony_ci{
3228c2ecf20Sopenharmony_ci	return 0;
3238c2ecf20Sopenharmony_ci}
3248c2ecf20Sopenharmony_ci#endif
3258c2ecf20Sopenharmony_ci
3268c2ecf20Sopenharmony_ci#ifdef CONFIG_SERIAL_8250_DMA
3278c2ecf20Sopenharmony_ciextern int serial8250_tx_dma(struct uart_8250_port *);
3288c2ecf20Sopenharmony_ciextern int serial8250_rx_dma(struct uart_8250_port *);
3298c2ecf20Sopenharmony_ciextern void serial8250_rx_dma_flush(struct uart_8250_port *);
3308c2ecf20Sopenharmony_ciextern int serial8250_request_dma(struct uart_8250_port *);
3318c2ecf20Sopenharmony_ciextern void serial8250_release_dma(struct uart_8250_port *);
3328c2ecf20Sopenharmony_ci
3338c2ecf20Sopenharmony_cistatic inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
3348c2ecf20Sopenharmony_ci{
3358c2ecf20Sopenharmony_ci	struct uart_8250_dma *dma = p->dma;
3368c2ecf20Sopenharmony_ci
3378c2ecf20Sopenharmony_ci	return dma && dma->tx_running;
3388c2ecf20Sopenharmony_ci}
3398c2ecf20Sopenharmony_ci#else
3408c2ecf20Sopenharmony_cistatic inline int serial8250_tx_dma(struct uart_8250_port *p)
3418c2ecf20Sopenharmony_ci{
3428c2ecf20Sopenharmony_ci	return -1;
3438c2ecf20Sopenharmony_ci}
3448c2ecf20Sopenharmony_cistatic inline int serial8250_rx_dma(struct uart_8250_port *p)
3458c2ecf20Sopenharmony_ci{
3468c2ecf20Sopenharmony_ci	return -1;
3478c2ecf20Sopenharmony_ci}
3488c2ecf20Sopenharmony_cistatic inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
3498c2ecf20Sopenharmony_cistatic inline int serial8250_request_dma(struct uart_8250_port *p)
3508c2ecf20Sopenharmony_ci{
3518c2ecf20Sopenharmony_ci	return -1;
3528c2ecf20Sopenharmony_ci}
3538c2ecf20Sopenharmony_cistatic inline void serial8250_release_dma(struct uart_8250_port *p) { }
3548c2ecf20Sopenharmony_ci
3558c2ecf20Sopenharmony_cistatic inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
3568c2ecf20Sopenharmony_ci{
3578c2ecf20Sopenharmony_ci	return false;
3588c2ecf20Sopenharmony_ci}
3598c2ecf20Sopenharmony_ci#endif
3608c2ecf20Sopenharmony_ci
3618c2ecf20Sopenharmony_cistatic inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
3628c2ecf20Sopenharmony_ci{
3638c2ecf20Sopenharmony_ci	unsigned char status;
3648c2ecf20Sopenharmony_ci
3658c2ecf20Sopenharmony_ci	status = serial_in(up, 0x04); /* EXCR2 */
3668c2ecf20Sopenharmony_ci#define PRESL(x) ((x) & 0x30)
3678c2ecf20Sopenharmony_ci	if (PRESL(status) == 0x10) {
3688c2ecf20Sopenharmony_ci		/* already in high speed mode */
3698c2ecf20Sopenharmony_ci		return 0;
3708c2ecf20Sopenharmony_ci	} else {
3718c2ecf20Sopenharmony_ci		status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
3728c2ecf20Sopenharmony_ci		status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
3738c2ecf20Sopenharmony_ci		serial_out(up, 0x04, status);
3748c2ecf20Sopenharmony_ci	}
3758c2ecf20Sopenharmony_ci	return 1;
3768c2ecf20Sopenharmony_ci}
3778c2ecf20Sopenharmony_ci
3788c2ecf20Sopenharmony_cistatic inline int serial_index(struct uart_port *port)
3798c2ecf20Sopenharmony_ci{
3808c2ecf20Sopenharmony_ci	return port->minor - 64;
3818c2ecf20Sopenharmony_ci}
382