18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Xtensa xtfpga SPI controller driver 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2014 Cadence Design Systems Inc. 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <linux/delay.h> 98c2ecf20Sopenharmony_ci#include <linux/io.h> 108c2ecf20Sopenharmony_ci#include <linux/module.h> 118c2ecf20Sopenharmony_ci#include <linux/of.h> 128c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 138c2ecf20Sopenharmony_ci#include <linux/spi/spi.h> 148c2ecf20Sopenharmony_ci#include <linux/spi/spi_bitbang.h> 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci#define XTFPGA_SPI_NAME "xtfpga_spi" 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci#define XTFPGA_SPI_START 0x0 198c2ecf20Sopenharmony_ci#define XTFPGA_SPI_BUSY 0x4 208c2ecf20Sopenharmony_ci#define XTFPGA_SPI_DATA 0x8 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#define BUSY_WAIT_US 100 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_cistruct xtfpga_spi { 258c2ecf20Sopenharmony_ci struct spi_bitbang bitbang; 268c2ecf20Sopenharmony_ci void __iomem *regs; 278c2ecf20Sopenharmony_ci u32 data; 288c2ecf20Sopenharmony_ci unsigned data_sz; 298c2ecf20Sopenharmony_ci}; 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_cistatic inline void xtfpga_spi_write32(const struct xtfpga_spi *spi, 328c2ecf20Sopenharmony_ci unsigned addr, u32 val) 338c2ecf20Sopenharmony_ci{ 348c2ecf20Sopenharmony_ci __raw_writel(val, spi->regs + addr); 358c2ecf20Sopenharmony_ci} 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_cistatic inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi, 388c2ecf20Sopenharmony_ci unsigned addr) 398c2ecf20Sopenharmony_ci{ 408c2ecf20Sopenharmony_ci return __raw_readl(spi->regs + addr); 418c2ecf20Sopenharmony_ci} 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_cistatic inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi) 448c2ecf20Sopenharmony_ci{ 458c2ecf20Sopenharmony_ci unsigned i; 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci for (i = 0; xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY) && 488c2ecf20Sopenharmony_ci i < BUSY_WAIT_US; ++i) 498c2ecf20Sopenharmony_ci udelay(1); 508c2ecf20Sopenharmony_ci WARN_ON_ONCE(i == BUSY_WAIT_US); 518c2ecf20Sopenharmony_ci} 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_cistatic u32 xtfpga_spi_txrx_word(struct spi_device *spi, unsigned nsecs, 548c2ecf20Sopenharmony_ci u32 v, u8 bits, unsigned flags) 558c2ecf20Sopenharmony_ci{ 568c2ecf20Sopenharmony_ci struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master); 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0)); 598c2ecf20Sopenharmony_ci xspi->data_sz += bits; 608c2ecf20Sopenharmony_ci if (xspi->data_sz >= 16) { 618c2ecf20Sopenharmony_ci xtfpga_spi_write32(xspi, XTFPGA_SPI_DATA, 628c2ecf20Sopenharmony_ci xspi->data >> (xspi->data_sz - 16)); 638c2ecf20Sopenharmony_ci xspi->data_sz -= 16; 648c2ecf20Sopenharmony_ci xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 1); 658c2ecf20Sopenharmony_ci xtfpga_spi_wait_busy(xspi); 668c2ecf20Sopenharmony_ci xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0); 678c2ecf20Sopenharmony_ci } 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci return 0; 708c2ecf20Sopenharmony_ci} 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_cistatic void xtfpga_spi_chipselect(struct spi_device *spi, int is_on) 738c2ecf20Sopenharmony_ci{ 748c2ecf20Sopenharmony_ci struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master); 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci WARN_ON(xspi->data_sz != 0); 778c2ecf20Sopenharmony_ci xspi->data_sz = 0; 788c2ecf20Sopenharmony_ci} 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_cistatic int xtfpga_spi_probe(struct platform_device *pdev) 818c2ecf20Sopenharmony_ci{ 828c2ecf20Sopenharmony_ci struct xtfpga_spi *xspi; 838c2ecf20Sopenharmony_ci int ret; 848c2ecf20Sopenharmony_ci struct spi_master *master; 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci master = spi_alloc_master(&pdev->dev, sizeof(struct xtfpga_spi)); 878c2ecf20Sopenharmony_ci if (!master) 888c2ecf20Sopenharmony_ci return -ENOMEM; 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ci master->flags = SPI_MASTER_NO_RX; 918c2ecf20Sopenharmony_ci master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16); 928c2ecf20Sopenharmony_ci master->bus_num = pdev->dev.id; 938c2ecf20Sopenharmony_ci master->dev.of_node = pdev->dev.of_node; 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci xspi = spi_master_get_devdata(master); 968c2ecf20Sopenharmony_ci xspi->bitbang.master = master; 978c2ecf20Sopenharmony_ci xspi->bitbang.chipselect = xtfpga_spi_chipselect; 988c2ecf20Sopenharmony_ci xspi->bitbang.txrx_word[SPI_MODE_0] = xtfpga_spi_txrx_word; 998c2ecf20Sopenharmony_ci xspi->regs = devm_platform_ioremap_resource(pdev, 0); 1008c2ecf20Sopenharmony_ci if (IS_ERR(xspi->regs)) { 1018c2ecf20Sopenharmony_ci ret = PTR_ERR(xspi->regs); 1028c2ecf20Sopenharmony_ci goto err; 1038c2ecf20Sopenharmony_ci } 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0); 1068c2ecf20Sopenharmony_ci usleep_range(1000, 2000); 1078c2ecf20Sopenharmony_ci if (xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY)) { 1088c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "Device stuck in busy state\n"); 1098c2ecf20Sopenharmony_ci ret = -EBUSY; 1108c2ecf20Sopenharmony_ci goto err; 1118c2ecf20Sopenharmony_ci } 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ci ret = spi_bitbang_start(&xspi->bitbang); 1148c2ecf20Sopenharmony_ci if (ret < 0) { 1158c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "spi_bitbang_start failed\n"); 1168c2ecf20Sopenharmony_ci goto err; 1178c2ecf20Sopenharmony_ci } 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci platform_set_drvdata(pdev, master); 1208c2ecf20Sopenharmony_ci return 0; 1218c2ecf20Sopenharmony_cierr: 1228c2ecf20Sopenharmony_ci spi_master_put(master); 1238c2ecf20Sopenharmony_ci return ret; 1248c2ecf20Sopenharmony_ci} 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_cistatic int xtfpga_spi_remove(struct platform_device *pdev) 1278c2ecf20Sopenharmony_ci{ 1288c2ecf20Sopenharmony_ci struct spi_master *master = platform_get_drvdata(pdev); 1298c2ecf20Sopenharmony_ci struct xtfpga_spi *xspi = spi_master_get_devdata(master); 1308c2ecf20Sopenharmony_ci 1318c2ecf20Sopenharmony_ci spi_bitbang_stop(&xspi->bitbang); 1328c2ecf20Sopenharmony_ci spi_master_put(master); 1338c2ecf20Sopenharmony_ci 1348c2ecf20Sopenharmony_ci return 0; 1358c2ecf20Sopenharmony_ci} 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ciMODULE_ALIAS("platform:" XTFPGA_SPI_NAME); 1388c2ecf20Sopenharmony_ci 1398c2ecf20Sopenharmony_ci#ifdef CONFIG_OF 1408c2ecf20Sopenharmony_cistatic const struct of_device_id xtfpga_spi_of_match[] = { 1418c2ecf20Sopenharmony_ci { .compatible = "cdns,xtfpga-spi", }, 1428c2ecf20Sopenharmony_ci {} 1438c2ecf20Sopenharmony_ci}; 1448c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, xtfpga_spi_of_match); 1458c2ecf20Sopenharmony_ci#endif 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_cistatic struct platform_driver xtfpga_spi_driver = { 1488c2ecf20Sopenharmony_ci .probe = xtfpga_spi_probe, 1498c2ecf20Sopenharmony_ci .remove = xtfpga_spi_remove, 1508c2ecf20Sopenharmony_ci .driver = { 1518c2ecf20Sopenharmony_ci .name = XTFPGA_SPI_NAME, 1528c2ecf20Sopenharmony_ci .of_match_table = of_match_ptr(xtfpga_spi_of_match), 1538c2ecf20Sopenharmony_ci }, 1548c2ecf20Sopenharmony_ci}; 1558c2ecf20Sopenharmony_cimodule_platform_driver(xtfpga_spi_driver); 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_ciMODULE_AUTHOR("Max Filippov <jcmvbkbc@gmail.com>"); 1588c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("xtensa xtfpga SPI driver"); 1598c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 160