18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * SH SCI SPI interface
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (c) 2008 Magnus Damm
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * Based on S3C24XX GPIO based SPI driver, which is:
88c2ecf20Sopenharmony_ci *   Copyright (c) 2006 Ben Dooks
98c2ecf20Sopenharmony_ci *   Copyright (c) 2006 Simtec Electronics
108c2ecf20Sopenharmony_ci */
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci#include <linux/kernel.h>
138c2ecf20Sopenharmony_ci#include <linux/delay.h>
148c2ecf20Sopenharmony_ci#include <linux/spinlock.h>
158c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci#include <linux/spi/spi.h>
188c2ecf20Sopenharmony_ci#include <linux/spi/spi_bitbang.h>
198c2ecf20Sopenharmony_ci#include <linux/module.h>
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci#include <asm/spi.h>
228c2ecf20Sopenharmony_ci#include <asm/io.h>
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_cistruct sh_sci_spi {
258c2ecf20Sopenharmony_ci	struct spi_bitbang bitbang;
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci	void __iomem *membase;
288c2ecf20Sopenharmony_ci	unsigned char val;
298c2ecf20Sopenharmony_ci	struct sh_spi_info *info;
308c2ecf20Sopenharmony_ci	struct platform_device *dev;
318c2ecf20Sopenharmony_ci};
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci#define SCSPTR(sp)	(sp->membase + 0x1c)
348c2ecf20Sopenharmony_ci#define PIN_SCK		(1 << 2)
358c2ecf20Sopenharmony_ci#define PIN_TXD		(1 << 0)
368c2ecf20Sopenharmony_ci#define PIN_RXD		PIN_TXD
378c2ecf20Sopenharmony_ci#define PIN_INIT	((1 << 1) | (1 << 3) | PIN_SCK | PIN_TXD)
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistatic inline void setbits(struct sh_sci_spi *sp, int bits, int on)
408c2ecf20Sopenharmony_ci{
418c2ecf20Sopenharmony_ci	/*
428c2ecf20Sopenharmony_ci	 * We are the only user of SCSPTR so no locking is required.
438c2ecf20Sopenharmony_ci	 * Reading bit 2 and 0 in SCSPTR gives pin state as input.
448c2ecf20Sopenharmony_ci	 * Writing the same bits sets the output value.
458c2ecf20Sopenharmony_ci	 * This makes regular read-modify-write difficult so we
468c2ecf20Sopenharmony_ci	 * use sp->val to keep track of the latest register value.
478c2ecf20Sopenharmony_ci	 */
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci	if (on)
508c2ecf20Sopenharmony_ci		sp->val |= bits;
518c2ecf20Sopenharmony_ci	else
528c2ecf20Sopenharmony_ci		sp->val &= ~bits;
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ci	iowrite8(sp->val, SCSPTR(sp));
558c2ecf20Sopenharmony_ci}
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_cistatic inline void setsck(struct spi_device *dev, int on)
588c2ecf20Sopenharmony_ci{
598c2ecf20Sopenharmony_ci	setbits(spi_master_get_devdata(dev->master), PIN_SCK, on);
608c2ecf20Sopenharmony_ci}
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_cistatic inline void setmosi(struct spi_device *dev, int on)
638c2ecf20Sopenharmony_ci{
648c2ecf20Sopenharmony_ci	setbits(spi_master_get_devdata(dev->master), PIN_TXD, on);
658c2ecf20Sopenharmony_ci}
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_cistatic inline u32 getmiso(struct spi_device *dev)
688c2ecf20Sopenharmony_ci{
698c2ecf20Sopenharmony_ci	struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ci	return (ioread8(SCSPTR(sp)) & PIN_RXD) ? 1 : 0;
728c2ecf20Sopenharmony_ci}
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci#define spidelay(x) ndelay(x)
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci#include "spi-bitbang-txrx.h"
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_cistatic u32 sh_sci_spi_txrx_mode0(struct spi_device *spi,
798c2ecf20Sopenharmony_ci				 unsigned nsecs, u32 word, u8 bits,
808c2ecf20Sopenharmony_ci				 unsigned flags)
818c2ecf20Sopenharmony_ci{
828c2ecf20Sopenharmony_ci	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
838c2ecf20Sopenharmony_ci}
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_cistatic u32 sh_sci_spi_txrx_mode1(struct spi_device *spi,
868c2ecf20Sopenharmony_ci				 unsigned nsecs, u32 word, u8 bits,
878c2ecf20Sopenharmony_ci				 unsigned flags)
888c2ecf20Sopenharmony_ci{
898c2ecf20Sopenharmony_ci	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
908c2ecf20Sopenharmony_ci}
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_cistatic u32 sh_sci_spi_txrx_mode2(struct spi_device *spi,
938c2ecf20Sopenharmony_ci				 unsigned nsecs, u32 word, u8 bits,
948c2ecf20Sopenharmony_ci				 unsigned flags)
958c2ecf20Sopenharmony_ci{
968c2ecf20Sopenharmony_ci	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
978c2ecf20Sopenharmony_ci}
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_cistatic u32 sh_sci_spi_txrx_mode3(struct spi_device *spi,
1008c2ecf20Sopenharmony_ci				 unsigned nsecs, u32 word, u8 bits,
1018c2ecf20Sopenharmony_ci				 unsigned flags)
1028c2ecf20Sopenharmony_ci{
1038c2ecf20Sopenharmony_ci	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
1048c2ecf20Sopenharmony_ci}
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_cistatic void sh_sci_spi_chipselect(struct spi_device *dev, int value)
1078c2ecf20Sopenharmony_ci{
1088c2ecf20Sopenharmony_ci	struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
1098c2ecf20Sopenharmony_ci
1108c2ecf20Sopenharmony_ci	if (sp->info->chip_select)
1118c2ecf20Sopenharmony_ci		(sp->info->chip_select)(sp->info, dev->chip_select, value);
1128c2ecf20Sopenharmony_ci}
1138c2ecf20Sopenharmony_ci
1148c2ecf20Sopenharmony_cistatic int sh_sci_spi_probe(struct platform_device *dev)
1158c2ecf20Sopenharmony_ci{
1168c2ecf20Sopenharmony_ci	struct resource	*r;
1178c2ecf20Sopenharmony_ci	struct spi_master *master;
1188c2ecf20Sopenharmony_ci	struct sh_sci_spi *sp;
1198c2ecf20Sopenharmony_ci	int ret;
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci	master = spi_alloc_master(&dev->dev, sizeof(struct sh_sci_spi));
1228c2ecf20Sopenharmony_ci	if (master == NULL) {
1238c2ecf20Sopenharmony_ci		dev_err(&dev->dev, "failed to allocate spi master\n");
1248c2ecf20Sopenharmony_ci		ret = -ENOMEM;
1258c2ecf20Sopenharmony_ci		goto err0;
1268c2ecf20Sopenharmony_ci	}
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci	sp = spi_master_get_devdata(master);
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_ci	platform_set_drvdata(dev, sp);
1318c2ecf20Sopenharmony_ci	sp->info = dev_get_platdata(&dev->dev);
1328c2ecf20Sopenharmony_ci	if (!sp->info) {
1338c2ecf20Sopenharmony_ci		dev_err(&dev->dev, "platform data is missing\n");
1348c2ecf20Sopenharmony_ci		ret = -ENOENT;
1358c2ecf20Sopenharmony_ci		goto err1;
1368c2ecf20Sopenharmony_ci	}
1378c2ecf20Sopenharmony_ci
1388c2ecf20Sopenharmony_ci	/* setup spi bitbang adaptor */
1398c2ecf20Sopenharmony_ci	sp->bitbang.master = master;
1408c2ecf20Sopenharmony_ci	sp->bitbang.master->bus_num = sp->info->bus_num;
1418c2ecf20Sopenharmony_ci	sp->bitbang.master->num_chipselect = sp->info->num_chipselect;
1428c2ecf20Sopenharmony_ci	sp->bitbang.chipselect = sh_sci_spi_chipselect;
1438c2ecf20Sopenharmony_ci
1448c2ecf20Sopenharmony_ci	sp->bitbang.txrx_word[SPI_MODE_0] = sh_sci_spi_txrx_mode0;
1458c2ecf20Sopenharmony_ci	sp->bitbang.txrx_word[SPI_MODE_1] = sh_sci_spi_txrx_mode1;
1468c2ecf20Sopenharmony_ci	sp->bitbang.txrx_word[SPI_MODE_2] = sh_sci_spi_txrx_mode2;
1478c2ecf20Sopenharmony_ci	sp->bitbang.txrx_word[SPI_MODE_3] = sh_sci_spi_txrx_mode3;
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ci	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
1508c2ecf20Sopenharmony_ci	if (r == NULL) {
1518c2ecf20Sopenharmony_ci		ret = -ENOENT;
1528c2ecf20Sopenharmony_ci		goto err1;
1538c2ecf20Sopenharmony_ci	}
1548c2ecf20Sopenharmony_ci	sp->membase = ioremap(r->start, resource_size(r));
1558c2ecf20Sopenharmony_ci	if (!sp->membase) {
1568c2ecf20Sopenharmony_ci		ret = -ENXIO;
1578c2ecf20Sopenharmony_ci		goto err1;
1588c2ecf20Sopenharmony_ci	}
1598c2ecf20Sopenharmony_ci	sp->val = ioread8(SCSPTR(sp));
1608c2ecf20Sopenharmony_ci	setbits(sp, PIN_INIT, 1);
1618c2ecf20Sopenharmony_ci
1628c2ecf20Sopenharmony_ci	ret = spi_bitbang_start(&sp->bitbang);
1638c2ecf20Sopenharmony_ci	if (!ret)
1648c2ecf20Sopenharmony_ci		return 0;
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci	setbits(sp, PIN_INIT, 0);
1678c2ecf20Sopenharmony_ci	iounmap(sp->membase);
1688c2ecf20Sopenharmony_ci err1:
1698c2ecf20Sopenharmony_ci	spi_master_put(sp->bitbang.master);
1708c2ecf20Sopenharmony_ci err0:
1718c2ecf20Sopenharmony_ci	return ret;
1728c2ecf20Sopenharmony_ci}
1738c2ecf20Sopenharmony_ci
1748c2ecf20Sopenharmony_cistatic int sh_sci_spi_remove(struct platform_device *dev)
1758c2ecf20Sopenharmony_ci{
1768c2ecf20Sopenharmony_ci	struct sh_sci_spi *sp = platform_get_drvdata(dev);
1778c2ecf20Sopenharmony_ci
1788c2ecf20Sopenharmony_ci	spi_bitbang_stop(&sp->bitbang);
1798c2ecf20Sopenharmony_ci	setbits(sp, PIN_INIT, 0);
1808c2ecf20Sopenharmony_ci	iounmap(sp->membase);
1818c2ecf20Sopenharmony_ci	spi_master_put(sp->bitbang.master);
1828c2ecf20Sopenharmony_ci	return 0;
1838c2ecf20Sopenharmony_ci}
1848c2ecf20Sopenharmony_ci
1858c2ecf20Sopenharmony_cistatic struct platform_driver sh_sci_spi_drv = {
1868c2ecf20Sopenharmony_ci	.probe		= sh_sci_spi_probe,
1878c2ecf20Sopenharmony_ci	.remove		= sh_sci_spi_remove,
1888c2ecf20Sopenharmony_ci	.driver		= {
1898c2ecf20Sopenharmony_ci		.name	= "spi_sh_sci",
1908c2ecf20Sopenharmony_ci	},
1918c2ecf20Sopenharmony_ci};
1928c2ecf20Sopenharmony_cimodule_platform_driver(sh_sci_spi_drv);
1938c2ecf20Sopenharmony_ci
1948c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("SH SCI SPI Driver");
1958c2ecf20Sopenharmony_ciMODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
1968c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL");
1978c2ecf20Sopenharmony_ciMODULE_ALIAS("platform:spi_sh_sci");
198