1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * SPI master driver using generic bitbanged GPIO 4 * 5 * Copyright (C) 2006,2008 David Brownell 6 * Copyright (C) 2017 Linus Walleij 7 */ 8#include <linux/kernel.h> 9#include <linux/module.h> 10#include <linux/platform_device.h> 11#include <linux/gpio/consumer.h> 12#include <linux/of.h> 13#include <linux/of_device.h> 14 15#include <linux/spi/spi.h> 16#include <linux/spi/spi_bitbang.h> 17#include <linux/spi/spi_gpio.h> 18 19 20/* 21 * This bitbanging SPI master driver should help make systems usable 22 * when a native hardware SPI engine is not available, perhaps because 23 * its driver isn't yet working or because the I/O pins it requires 24 * are used for other purposes. 25 * 26 * platform_device->driver_data ... points to spi_gpio 27 * 28 * spi->controller_state ... reserved for bitbang framework code 29 * 30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang 31 */ 32 33struct spi_gpio { 34 struct spi_bitbang bitbang; 35 struct gpio_desc *sck; 36 struct gpio_desc *miso; 37 struct gpio_desc *mosi; 38 struct gpio_desc **cs_gpios; 39}; 40 41/*----------------------------------------------------------------------*/ 42 43/* 44 * Because the overhead of going through four GPIO procedure calls 45 * per transferred bit can make performance a problem, this code 46 * is set up so that you can use it in either of two ways: 47 * 48 * - The slow generic way: set up platform_data to hold the GPIO 49 * numbers used for MISO/MOSI/SCK, and issue procedure calls for 50 * each of them. This driver can handle several such busses. 51 * 52 * - The quicker inlined way: only helps with platform GPIO code 53 * that inlines operations for constant GPIOs. This can give 54 * you tight (fast!) inner loops, but each such bus needs a 55 * new driver. You'll define a new C file, with Makefile and 56 * Kconfig support; the C code can be a total of six lines: 57 * 58 * #define DRIVER_NAME "myboard_spi2" 59 * #define SPI_MISO_GPIO 119 60 * #define SPI_MOSI_GPIO 120 61 * #define SPI_SCK_GPIO 121 62 * #define SPI_N_CHIPSEL 4 63 * #include "spi-gpio.c" 64 */ 65 66#ifndef DRIVER_NAME 67#define DRIVER_NAME "spi_gpio" 68 69#define GENERIC_BITBANG /* vs tight inlines */ 70 71#endif 72 73/*----------------------------------------------------------------------*/ 74 75static inline struct spi_gpio *__pure 76spi_to_spi_gpio(const struct spi_device *spi) 77{ 78 const struct spi_bitbang *bang; 79 struct spi_gpio *spi_gpio; 80 81 bang = spi_master_get_devdata(spi->master); 82 spi_gpio = container_of(bang, struct spi_gpio, bitbang); 83 return spi_gpio; 84} 85 86/* These helpers are in turn called by the bitbang inlines */ 87static inline void setsck(const struct spi_device *spi, int is_on) 88{ 89 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 90 91 gpiod_set_value_cansleep(spi_gpio->sck, is_on); 92} 93 94static inline void setmosi(const struct spi_device *spi, int is_on) 95{ 96 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 97 98 gpiod_set_value_cansleep(spi_gpio->mosi, is_on); 99} 100 101static inline int getmiso(const struct spi_device *spi) 102{ 103 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 104 105 if (spi->mode & SPI_3WIRE) 106 return !!gpiod_get_value_cansleep(spi_gpio->mosi); 107 else 108 return !!gpiod_get_value_cansleep(spi_gpio->miso); 109} 110 111/* 112 * NOTE: this clocks "as fast as we can". It "should" be a function of the 113 * requested device clock. Software overhead means we usually have trouble 114 * reaching even one Mbit/sec (except when we can inline bitops), so for now 115 * we'll just assume we never need additional per-bit slowdowns. 116 */ 117#define spidelay(nsecs) do {} while (0) 118 119#include "spi-bitbang-txrx.h" 120 121/* 122 * These functions can leverage inline expansion of GPIO calls to shrink 123 * costs for a txrx bit, often by factors of around ten (by instruction 124 * count). That is particularly visible for larger word sizes, but helps 125 * even with default 8-bit words. 126 * 127 * REVISIT overheads calling these functions for each word also have 128 * significant performance costs. Having txrx_bufs() calls that inline 129 * the txrx_word() logic would help performance, e.g. on larger blocks 130 * used with flash storage or MMC/SD. There should also be ways to make 131 * GCC be less stupid about reloading registers inside the I/O loops, 132 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3? 133 */ 134 135static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi, 136 unsigned nsecs, u32 word, u8 bits, unsigned flags) 137{ 138 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); 139} 140 141static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi, 142 unsigned nsecs, u32 word, u8 bits, unsigned flags) 143{ 144 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); 145} 146 147static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi, 148 unsigned nsecs, u32 word, u8 bits, unsigned flags) 149{ 150 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); 151} 152 153static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, 154 unsigned nsecs, u32 word, u8 bits, unsigned flags) 155{ 156 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); 157} 158 159/* 160 * These functions do not call setmosi or getmiso if respective flag 161 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to 162 * call when such pin is not present or defined in the controller. 163 * A separate set of callbacks is defined to get highest possible 164 * speed in the generic case (when both MISO and MOSI lines are 165 * available), as optimiser will remove the checks when argument is 166 * constant. 167 */ 168 169static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, 170 unsigned nsecs, u32 word, u8 bits, unsigned flags) 171{ 172 flags = spi->master->flags; 173 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); 174} 175 176static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, 177 unsigned nsecs, u32 word, u8 bits, unsigned flags) 178{ 179 flags = spi->master->flags; 180 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); 181} 182 183static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, 184 unsigned nsecs, u32 word, u8 bits, unsigned flags) 185{ 186 flags = spi->master->flags; 187 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); 188} 189 190static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, 191 unsigned nsecs, u32 word, u8 bits, unsigned flags) 192{ 193 flags = spi->master->flags; 194 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); 195} 196 197/*----------------------------------------------------------------------*/ 198 199static void spi_gpio_chipselect(struct spi_device *spi, int is_active) 200{ 201 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 202 203 /* set initial clock line level */ 204 if (is_active) 205 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL); 206 207 /* Drive chip select line, if we have one */ 208 if (spi_gpio->cs_gpios) { 209 struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select]; 210 211 /* SPI chip selects are normally active-low */ 212 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active); 213 } 214} 215 216static int spi_gpio_setup(struct spi_device *spi) 217{ 218 struct gpio_desc *cs; 219 int status = 0; 220 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 221 222 /* 223 * The CS GPIOs have already been 224 * initialized from the descriptor lookup. 225 */ 226 if (spi_gpio->cs_gpios) { 227 cs = spi_gpio->cs_gpios[spi->chip_select]; 228 if (!spi->controller_state && cs) 229 status = gpiod_direction_output(cs, 230 !(spi->mode & SPI_CS_HIGH)); 231 } 232 233 if (!status) 234 status = spi_bitbang_setup(spi); 235 236 return status; 237} 238 239static int spi_gpio_set_direction(struct spi_device *spi, bool output) 240{ 241 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); 242 int ret; 243 244 if (output) 245 return gpiod_direction_output(spi_gpio->mosi, 1); 246 247 /* 248 * Only change MOSI to an input if using 3WIRE mode. 249 * Otherwise, MOSI could be left floating if there is 250 * no pull resistor connected to the I/O pin, or could 251 * be left logic high if there is a pull-up. Transmitting 252 * logic high when only clocking MISO data in can put some 253 * SPI devices in to a bad state. 254 */ 255 if (spi->mode & SPI_3WIRE) { 256 ret = gpiod_direction_input(spi_gpio->mosi); 257 if (ret) 258 return ret; 259 } 260 /* 261 * Send a turnaround high impedance cycle when switching 262 * from output to input. Theoretically there should be 263 * a clock delay here, but as has been noted above, the 264 * nsec delay function for bit-banged GPIO is simply 265 * {} because bit-banging just doesn't get fast enough 266 * anyway. 267 */ 268 if (spi->mode & SPI_3WIRE_HIZ) { 269 gpiod_set_value_cansleep(spi_gpio->sck, 270 !(spi->mode & SPI_CPOL)); 271 gpiod_set_value_cansleep(spi_gpio->sck, 272 !!(spi->mode & SPI_CPOL)); 273 } 274 return 0; 275} 276 277static void spi_gpio_cleanup(struct spi_device *spi) 278{ 279 spi_bitbang_cleanup(spi); 280} 281 282/* 283 * It can be convenient to use this driver with pins that have alternate 284 * functions associated with a "native" SPI controller if a driver for that 285 * controller is not available, or is missing important functionality. 286 * 287 * On platforms which can do so, configure MISO with a weak pullup unless 288 * there's an external pullup on that signal. That saves power by avoiding 289 * floating signals. (A weak pulldown would save power too, but many 290 * drivers expect to see all-ones data as the no slave "response".) 291 */ 292static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio) 293{ 294 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW); 295 if (IS_ERR(spi_gpio->mosi)) 296 return PTR_ERR(spi_gpio->mosi); 297 298 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN); 299 if (IS_ERR(spi_gpio->miso)) 300 return PTR_ERR(spi_gpio->miso); 301 302 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW); 303 return PTR_ERR_OR_ZERO(spi_gpio->sck); 304} 305 306#ifdef CONFIG_OF 307static const struct of_device_id spi_gpio_dt_ids[] = { 308 { .compatible = "spi-gpio" }, 309 {} 310}; 311MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); 312 313static int spi_gpio_probe_dt(struct platform_device *pdev, 314 struct spi_master *master) 315{ 316 master->dev.of_node = pdev->dev.of_node; 317 master->use_gpio_descriptors = true; 318 319 return 0; 320} 321#else 322static inline int spi_gpio_probe_dt(struct platform_device *pdev, 323 struct spi_master *master) 324{ 325 return 0; 326} 327#endif 328 329static int spi_gpio_probe_pdata(struct platform_device *pdev, 330 struct spi_master *master) 331{ 332 struct device *dev = &pdev->dev; 333 struct spi_gpio_platform_data *pdata = dev_get_platdata(dev); 334 struct spi_gpio *spi_gpio = spi_master_get_devdata(master); 335 int i; 336 337#ifdef GENERIC_BITBANG 338 if (!pdata || !pdata->num_chipselect) 339 return -ENODEV; 340#endif 341 /* 342 * The master needs to think there is a chipselect even if not 343 * connected 344 */ 345 master->num_chipselect = pdata->num_chipselect ?: 1; 346 347 spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect, 348 sizeof(*spi_gpio->cs_gpios), 349 GFP_KERNEL); 350 if (!spi_gpio->cs_gpios) 351 return -ENOMEM; 352 353 for (i = 0; i < master->num_chipselect; i++) { 354 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, 355 GPIOD_OUT_HIGH); 356 if (IS_ERR(spi_gpio->cs_gpios[i])) 357 return PTR_ERR(spi_gpio->cs_gpios[i]); 358 } 359 360 return 0; 361} 362 363static int spi_gpio_probe(struct platform_device *pdev) 364{ 365 int status; 366 struct spi_master *master; 367 struct spi_gpio *spi_gpio; 368 struct device *dev = &pdev->dev; 369 struct spi_bitbang *bb; 370 371 master = devm_spi_alloc_master(dev, sizeof(*spi_gpio)); 372 if (!master) 373 return -ENOMEM; 374 375 if (pdev->dev.of_node) 376 status = spi_gpio_probe_dt(pdev, master); 377 else 378 status = spi_gpio_probe_pdata(pdev, master); 379 380 if (status) 381 return status; 382 383 spi_gpio = spi_master_get_devdata(master); 384 385 status = spi_gpio_request(dev, spi_gpio); 386 if (status) 387 return status; 388 389 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); 390 master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | 391 SPI_CS_HIGH; 392 if (!spi_gpio->mosi) { 393 /* HW configuration without MOSI pin 394 * 395 * No setting SPI_MASTER_NO_RX here - if there is only 396 * a MOSI pin connected the host can still do RX by 397 * changing the direction of the line. 398 */ 399 master->flags = SPI_MASTER_NO_TX; 400 } 401 402 master->bus_num = pdev->id; 403 master->setup = spi_gpio_setup; 404 master->cleanup = spi_gpio_cleanup; 405 406 bb = &spi_gpio->bitbang; 407 bb->master = master; 408 /* 409 * There is some additional business, apart from driving the CS GPIO 410 * line, that we need to do on selection. This makes the local 411 * callback for chipselect always get called. 412 */ 413 master->flags |= SPI_MASTER_GPIO_SS; 414 bb->chipselect = spi_gpio_chipselect; 415 bb->set_line_direction = spi_gpio_set_direction; 416 417 if (master->flags & SPI_MASTER_NO_TX) { 418 bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; 419 bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; 420 bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; 421 bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3; 422 } else { 423 bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0; 424 bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1; 425 bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2; 426 bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3; 427 } 428 bb->setup_transfer = spi_bitbang_setup_transfer; 429 430 status = spi_bitbang_init(&spi_gpio->bitbang); 431 if (status) 432 return status; 433 434 return devm_spi_register_master(&pdev->dev, master); 435} 436 437MODULE_ALIAS("platform:" DRIVER_NAME); 438 439static struct platform_driver spi_gpio_driver = { 440 .driver = { 441 .name = DRIVER_NAME, 442 .of_match_table = of_match_ptr(spi_gpio_dt_ids), 443 }, 444 .probe = spi_gpio_probe, 445}; 446module_platform_driver(spi_gpio_driver); 447 448MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO "); 449MODULE_AUTHOR("David Brownell"); 450MODULE_LICENSE("GPL"); 451