18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ciif ARCH_TEGRA 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ci# 32-bit ARM SoCs 58c2ecf20Sopenharmony_ciif ARM 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_2x_SOC 88c2ecf20Sopenharmony_ci bool "Enable support for Tegra20 family" 98c2ecf20Sopenharmony_ci select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 108c2ecf20Sopenharmony_ci select ARM_ERRATA_720789 118c2ecf20Sopenharmony_ci select ARM_ERRATA_754327 if SMP 128c2ecf20Sopenharmony_ci select ARM_ERRATA_764369 if SMP 138c2ecf20Sopenharmony_ci select PINCTRL_TEGRA20 148c2ecf20Sopenharmony_ci select PL310_ERRATA_727915 if CACHE_L2X0 158c2ecf20Sopenharmony_ci select PL310_ERRATA_769419 if CACHE_L2X0 168c2ecf20Sopenharmony_ci select SOC_TEGRA_FLOWCTRL 178c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 188c2ecf20Sopenharmony_ci select SOC_TEGRA20_VOLTAGE_COUPLER 198c2ecf20Sopenharmony_ci select TEGRA_TIMER 208c2ecf20Sopenharmony_ci help 218c2ecf20Sopenharmony_ci Support for NVIDIA Tegra AP20 and T20 processors, based on the 228c2ecf20Sopenharmony_ci ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_3x_SOC 258c2ecf20Sopenharmony_ci bool "Enable support for Tegra30 family" 268c2ecf20Sopenharmony_ci select ARM_ERRATA_754322 278c2ecf20Sopenharmony_ci select ARM_ERRATA_764369 if SMP 288c2ecf20Sopenharmony_ci select PINCTRL_TEGRA30 298c2ecf20Sopenharmony_ci select PL310_ERRATA_769419 if CACHE_L2X0 308c2ecf20Sopenharmony_ci select SOC_TEGRA_FLOWCTRL 318c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 328c2ecf20Sopenharmony_ci select SOC_TEGRA30_VOLTAGE_COUPLER 338c2ecf20Sopenharmony_ci select TEGRA_TIMER 348c2ecf20Sopenharmony_ci help 358c2ecf20Sopenharmony_ci Support for NVIDIA Tegra T30 processor family, based on the 368c2ecf20Sopenharmony_ci ARM CortexA9MP CPU and the ARM PL310 L2 cache controller 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_114_SOC 398c2ecf20Sopenharmony_ci bool "Enable support for Tegra114 family" 408c2ecf20Sopenharmony_ci select ARM_ERRATA_798181 if SMP 418c2ecf20Sopenharmony_ci select HAVE_ARM_ARCH_TIMER 428c2ecf20Sopenharmony_ci select PINCTRL_TEGRA114 438c2ecf20Sopenharmony_ci select SOC_TEGRA_FLOWCTRL 448c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 458c2ecf20Sopenharmony_ci select TEGRA_TIMER 468c2ecf20Sopenharmony_ci help 478c2ecf20Sopenharmony_ci Support for NVIDIA Tegra T114 processor family, based on the 488c2ecf20Sopenharmony_ci ARM CortexA15MP CPU 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_124_SOC 518c2ecf20Sopenharmony_ci bool "Enable support for Tegra124 family" 528c2ecf20Sopenharmony_ci select HAVE_ARM_ARCH_TIMER 538c2ecf20Sopenharmony_ci select PINCTRL_TEGRA124 548c2ecf20Sopenharmony_ci select SOC_TEGRA_FLOWCTRL 558c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 568c2ecf20Sopenharmony_ci select TEGRA_TIMER 578c2ecf20Sopenharmony_ci help 588c2ecf20Sopenharmony_ci Support for NVIDIA Tegra T124 processor family, based on the 598c2ecf20Sopenharmony_ci ARM CortexA15MP CPU 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ciendif 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci# 64-bit ARM SoCs 648c2ecf20Sopenharmony_ciif ARM64 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_132_SOC 678c2ecf20Sopenharmony_ci bool "NVIDIA Tegra132 SoC" 688c2ecf20Sopenharmony_ci select PINCTRL_TEGRA124 698c2ecf20Sopenharmony_ci select SOC_TEGRA_FLOWCTRL 708c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 718c2ecf20Sopenharmony_ci help 728c2ecf20Sopenharmony_ci Enable support for NVIDIA Tegra132 SoC, based on the Denver 738c2ecf20Sopenharmony_ci ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC, 748c2ecf20Sopenharmony_ci but contains an NVIDIA Denver CPU complex in place of 758c2ecf20Sopenharmony_ci Tegra124's "4+1" Cortex-A15 CPU complex. 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_210_SOC 788c2ecf20Sopenharmony_ci bool "NVIDIA Tegra210 SoC" 798c2ecf20Sopenharmony_ci select PINCTRL_TEGRA210 808c2ecf20Sopenharmony_ci select SOC_TEGRA_FLOWCTRL 818c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 828c2ecf20Sopenharmony_ci select TEGRA_TIMER 838c2ecf20Sopenharmony_ci help 848c2ecf20Sopenharmony_ci Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1, 858c2ecf20Sopenharmony_ci the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53 868c2ecf20Sopenharmony_ci cores in a switched configuration. It features a GPU of the Maxwell 878c2ecf20Sopenharmony_ci architecture with support for DX11, SM4, OpenGL 4.5, OpenGL ES 3.1 888c2ecf20Sopenharmony_ci and providing 256 CUDA cores. It supports hardware-accelerated en- 898c2ecf20Sopenharmony_ci and decoding of various video standards including H.265, H.264 and 908c2ecf20Sopenharmony_ci VP8 at 4K resolution and up to 60 fps. 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci Besides the multimedia features it also comes with a variety of I/O 938c2ecf20Sopenharmony_ci controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to 948c2ecf20Sopenharmony_ci name only a few. 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_186_SOC 978c2ecf20Sopenharmony_ci bool "NVIDIA Tegra186 SoC" 988c2ecf20Sopenharmony_ci select MAILBOX 998c2ecf20Sopenharmony_ci select TEGRA_BPMP 1008c2ecf20Sopenharmony_ci select TEGRA_HSP_MBOX 1018c2ecf20Sopenharmony_ci select TEGRA_IVC 1028c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 1038c2ecf20Sopenharmony_ci help 1048c2ecf20Sopenharmony_ci Enable support for the NVIDIA Tegar186 SoC. The Tegra186 features a 1058c2ecf20Sopenharmony_ci combination of Denver and Cortex-A57 CPU cores and a GPU based on 1068c2ecf20Sopenharmony_ci the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU 1078c2ecf20Sopenharmony_ci used for audio processing, hardware video encoders/decoders with 1088c2ecf20Sopenharmony_ci multi-format support, ISP for image capture processing and BPMP for 1098c2ecf20Sopenharmony_ci power management. 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_194_SOC 1128c2ecf20Sopenharmony_ci bool "NVIDIA Tegra194 SoC" 1138c2ecf20Sopenharmony_ci select MAILBOX 1148c2ecf20Sopenharmony_ci select PINCTRL_TEGRA194 1158c2ecf20Sopenharmony_ci select TEGRA_BPMP 1168c2ecf20Sopenharmony_ci select TEGRA_HSP_MBOX 1178c2ecf20Sopenharmony_ci select TEGRA_IVC 1188c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 1198c2ecf20Sopenharmony_ci help 1208c2ecf20Sopenharmony_ci Enable support for the NVIDIA Tegra194 SoC. 1218c2ecf20Sopenharmony_ci 1228c2ecf20Sopenharmony_ciconfig ARCH_TEGRA_234_SOC 1238c2ecf20Sopenharmony_ci bool "NVIDIA Tegra234 SoC" 1248c2ecf20Sopenharmony_ci select MAILBOX 1258c2ecf20Sopenharmony_ci select TEGRA_BPMP 1268c2ecf20Sopenharmony_ci select TEGRA_HSP_MBOX 1278c2ecf20Sopenharmony_ci select TEGRA_IVC 1288c2ecf20Sopenharmony_ci select SOC_TEGRA_PMC 1298c2ecf20Sopenharmony_ci help 1308c2ecf20Sopenharmony_ci Enable support for the NVIDIA Tegra234 SoC. 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_ciendif 1338c2ecf20Sopenharmony_ciendif 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_ciconfig SOC_TEGRA_FUSE 1368c2ecf20Sopenharmony_ci def_bool y 1378c2ecf20Sopenharmony_ci depends on ARCH_TEGRA 1388c2ecf20Sopenharmony_ci select SOC_BUS 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_ciconfig SOC_TEGRA_FLOWCTRL 1418c2ecf20Sopenharmony_ci bool 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_ciconfig SOC_TEGRA_PMC 1448c2ecf20Sopenharmony_ci bool 1458c2ecf20Sopenharmony_ci select GENERIC_PINCONF 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ciconfig SOC_TEGRA_POWERGATE_BPMP 1488c2ecf20Sopenharmony_ci def_bool y 1498c2ecf20Sopenharmony_ci depends on PM_GENERIC_DOMAINS 1508c2ecf20Sopenharmony_ci depends on TEGRA_BPMP 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ciconfig SOC_TEGRA20_VOLTAGE_COUPLER 1538c2ecf20Sopenharmony_ci bool "Voltage scaling support for Tegra20 SoCs" 1548c2ecf20Sopenharmony_ci depends on ARCH_TEGRA_2x_SOC || COMPILE_TEST 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_ciconfig SOC_TEGRA30_VOLTAGE_COUPLER 1578c2ecf20Sopenharmony_ci bool "Voltage scaling support for Tegra30 SoCs" 1588c2ecf20Sopenharmony_ci depends on ARCH_TEGRA_3x_SOC || COMPILE_TEST 159