18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright 2017 IBM Corporation
48c2ecf20Sopenharmony_ci */
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci#include <linux/clk.h>
78c2ecf20Sopenharmony_ci#include <linux/mfd/syscon.h>
88c2ecf20Sopenharmony_ci#include <linux/miscdevice.h>
98c2ecf20Sopenharmony_ci#include <linux/mm.h>
108c2ecf20Sopenharmony_ci#include <linux/module.h>
118c2ecf20Sopenharmony_ci#include <linux/of_address.h>
128c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
138c2ecf20Sopenharmony_ci#include <linux/poll.h>
148c2ecf20Sopenharmony_ci#include <linux/regmap.h>
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci#include <linux/aspeed-lpc-ctrl.h>
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#define DEVICE_NAME	"aspeed-lpc-ctrl"
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci#define HICR5 0x0
218c2ecf20Sopenharmony_ci#define HICR5_ENL2H	BIT(8)
228c2ecf20Sopenharmony_ci#define HICR5_ENFWH	BIT(10)
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci#define HICR7 0x8
258c2ecf20Sopenharmony_ci#define HICR8 0xc
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_cistruct aspeed_lpc_ctrl {
288c2ecf20Sopenharmony_ci	struct miscdevice	miscdev;
298c2ecf20Sopenharmony_ci	struct regmap		*regmap;
308c2ecf20Sopenharmony_ci	struct clk		*clk;
318c2ecf20Sopenharmony_ci	phys_addr_t		mem_base;
328c2ecf20Sopenharmony_ci	resource_size_t		mem_size;
338c2ecf20Sopenharmony_ci	u32		pnor_size;
348c2ecf20Sopenharmony_ci	u32		pnor_base;
358c2ecf20Sopenharmony_ci};
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_cistatic struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
388c2ecf20Sopenharmony_ci{
398c2ecf20Sopenharmony_ci	return container_of(file->private_data, struct aspeed_lpc_ctrl,
408c2ecf20Sopenharmony_ci			miscdev);
418c2ecf20Sopenharmony_ci}
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_cistatic int aspeed_lpc_ctrl_mmap(struct file *file, struct vm_area_struct *vma)
448c2ecf20Sopenharmony_ci{
458c2ecf20Sopenharmony_ci	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
468c2ecf20Sopenharmony_ci	unsigned long vsize = vma->vm_end - vma->vm_start;
478c2ecf20Sopenharmony_ci	pgprot_t prot = vma->vm_page_prot;
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci	if (vma->vm_pgoff + vma_pages(vma) > lpc_ctrl->mem_size >> PAGE_SHIFT)
508c2ecf20Sopenharmony_ci		return -EINVAL;
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci	/* ast2400/2500 AHB accesses are not cache coherent */
538c2ecf20Sopenharmony_ci	prot = pgprot_noncached(prot);
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	if (remap_pfn_range(vma, vma->vm_start,
568c2ecf20Sopenharmony_ci		(lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
578c2ecf20Sopenharmony_ci		vsize, prot))
588c2ecf20Sopenharmony_ci		return -EAGAIN;
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci	return 0;
618c2ecf20Sopenharmony_ci}
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_cistatic long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
648c2ecf20Sopenharmony_ci		unsigned long param)
658c2ecf20Sopenharmony_ci{
668c2ecf20Sopenharmony_ci	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
678c2ecf20Sopenharmony_ci	struct device *dev = file->private_data;
688c2ecf20Sopenharmony_ci	void __user *p = (void __user *)param;
698c2ecf20Sopenharmony_ci	struct aspeed_lpc_ctrl_mapping map;
708c2ecf20Sopenharmony_ci	u32 addr;
718c2ecf20Sopenharmony_ci	u32 size;
728c2ecf20Sopenharmony_ci	long rc;
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci	if (copy_from_user(&map, p, sizeof(map)))
758c2ecf20Sopenharmony_ci		return -EFAULT;
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci	if (map.flags != 0)
788c2ecf20Sopenharmony_ci		return -EINVAL;
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci	switch (cmd) {
818c2ecf20Sopenharmony_ci	case ASPEED_LPC_CTRL_IOCTL_GET_SIZE:
828c2ecf20Sopenharmony_ci		/* The flash windows don't report their size */
838c2ecf20Sopenharmony_ci		if (map.window_type != ASPEED_LPC_CTRL_WINDOW_MEMORY)
848c2ecf20Sopenharmony_ci			return -EINVAL;
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci		/* Support more than one window id in the future */
878c2ecf20Sopenharmony_ci		if (map.window_id != 0)
888c2ecf20Sopenharmony_ci			return -EINVAL;
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci		/* If memory-region is not described in device tree */
918c2ecf20Sopenharmony_ci		if (!lpc_ctrl->mem_size) {
928c2ecf20Sopenharmony_ci			dev_dbg(dev, "Didn't find reserved memory\n");
938c2ecf20Sopenharmony_ci			return -ENXIO;
948c2ecf20Sopenharmony_ci		}
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci		map.size = lpc_ctrl->mem_size;
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci		return copy_to_user(p, &map, sizeof(map)) ? -EFAULT : 0;
998c2ecf20Sopenharmony_ci	case ASPEED_LPC_CTRL_IOCTL_MAP:
1008c2ecf20Sopenharmony_ci
1018c2ecf20Sopenharmony_ci		/*
1028c2ecf20Sopenharmony_ci		 * The top half of HICR7 is the MSB of the BMC address of the
1038c2ecf20Sopenharmony_ci		 * mapping.
1048c2ecf20Sopenharmony_ci		 * The bottom half of HICR7 is the MSB of the HOST LPC
1058c2ecf20Sopenharmony_ci		 * firmware space address of the mapping.
1068c2ecf20Sopenharmony_ci		 *
1078c2ecf20Sopenharmony_ci		 * The 1 bits in the top of half of HICR8 represent the bits
1088c2ecf20Sopenharmony_ci		 * (in the requested address) that should be ignored and
1098c2ecf20Sopenharmony_ci		 * replaced with those from the top half of HICR7.
1108c2ecf20Sopenharmony_ci		 * The 1 bits in the bottom half of HICR8 represent the bits
1118c2ecf20Sopenharmony_ci		 * (in the requested address) that should be kept and pass
1128c2ecf20Sopenharmony_ci		 * into the BMC address space.
1138c2ecf20Sopenharmony_ci		 */
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci		/*
1168c2ecf20Sopenharmony_ci		 * It doesn't make sense to talk about a size or offset with
1178c2ecf20Sopenharmony_ci		 * low 16 bits set. Both HICR7 and HICR8 talk about the top 16
1188c2ecf20Sopenharmony_ci		 * bits of addresses and sizes.
1198c2ecf20Sopenharmony_ci		 */
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci		if ((map.size & 0x0000ffff) || (map.offset & 0x0000ffff))
1228c2ecf20Sopenharmony_ci			return -EINVAL;
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_ci		/*
1258c2ecf20Sopenharmony_ci		 * Because of the way the masks work in HICR8 offset has to
1268c2ecf20Sopenharmony_ci		 * be a multiple of size.
1278c2ecf20Sopenharmony_ci		 */
1288c2ecf20Sopenharmony_ci		if (map.offset & (map.size - 1))
1298c2ecf20Sopenharmony_ci			return -EINVAL;
1308c2ecf20Sopenharmony_ci
1318c2ecf20Sopenharmony_ci		if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
1328c2ecf20Sopenharmony_ci			if (!lpc_ctrl->pnor_size) {
1338c2ecf20Sopenharmony_ci				dev_dbg(dev, "Didn't find host pnor flash\n");
1348c2ecf20Sopenharmony_ci				return -ENXIO;
1358c2ecf20Sopenharmony_ci			}
1368c2ecf20Sopenharmony_ci			addr = lpc_ctrl->pnor_base;
1378c2ecf20Sopenharmony_ci			size = lpc_ctrl->pnor_size;
1388c2ecf20Sopenharmony_ci		} else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
1398c2ecf20Sopenharmony_ci			/* If memory-region is not described in device tree */
1408c2ecf20Sopenharmony_ci			if (!lpc_ctrl->mem_size) {
1418c2ecf20Sopenharmony_ci				dev_dbg(dev, "Didn't find reserved memory\n");
1428c2ecf20Sopenharmony_ci				return -ENXIO;
1438c2ecf20Sopenharmony_ci			}
1448c2ecf20Sopenharmony_ci			addr = lpc_ctrl->mem_base;
1458c2ecf20Sopenharmony_ci			size = lpc_ctrl->mem_size;
1468c2ecf20Sopenharmony_ci		} else {
1478c2ecf20Sopenharmony_ci			return -EINVAL;
1488c2ecf20Sopenharmony_ci		}
1498c2ecf20Sopenharmony_ci
1508c2ecf20Sopenharmony_ci		/* Check overflow first! */
1518c2ecf20Sopenharmony_ci		if (map.offset + map.size < map.offset ||
1528c2ecf20Sopenharmony_ci			map.offset + map.size > size)
1538c2ecf20Sopenharmony_ci			return -EINVAL;
1548c2ecf20Sopenharmony_ci
1558c2ecf20Sopenharmony_ci		if (map.size == 0 || map.size > size)
1568c2ecf20Sopenharmony_ci			return -EINVAL;
1578c2ecf20Sopenharmony_ci
1588c2ecf20Sopenharmony_ci		addr += map.offset;
1598c2ecf20Sopenharmony_ci
1608c2ecf20Sopenharmony_ci		/*
1618c2ecf20Sopenharmony_ci		 * addr (host lpc address) is safe regardless of values. This
1628c2ecf20Sopenharmony_ci		 * simply changes the address the host has to request on its
1638c2ecf20Sopenharmony_ci		 * side of the LPC bus. This cannot impact the hosts own
1648c2ecf20Sopenharmony_ci		 * memory space by surprise as LPC specific accessors are
1658c2ecf20Sopenharmony_ci		 * required. The only strange thing that could be done is
1668c2ecf20Sopenharmony_ci		 * setting the lower 16 bits but the shift takes care of that.
1678c2ecf20Sopenharmony_ci		 */
1688c2ecf20Sopenharmony_ci
1698c2ecf20Sopenharmony_ci		rc = regmap_write(lpc_ctrl->regmap, HICR7,
1708c2ecf20Sopenharmony_ci				(addr | (map.addr >> 16)));
1718c2ecf20Sopenharmony_ci		if (rc)
1728c2ecf20Sopenharmony_ci			return rc;
1738c2ecf20Sopenharmony_ci
1748c2ecf20Sopenharmony_ci		rc = regmap_write(lpc_ctrl->regmap, HICR8,
1758c2ecf20Sopenharmony_ci				(~(map.size - 1)) | ((map.size >> 16) - 1));
1768c2ecf20Sopenharmony_ci		if (rc)
1778c2ecf20Sopenharmony_ci			return rc;
1788c2ecf20Sopenharmony_ci
1798c2ecf20Sopenharmony_ci		/*
1808c2ecf20Sopenharmony_ci		 * Enable LPC FHW cycles. This is required for the host to
1818c2ecf20Sopenharmony_ci		 * access the regions specified.
1828c2ecf20Sopenharmony_ci		 */
1838c2ecf20Sopenharmony_ci		return regmap_update_bits(lpc_ctrl->regmap, HICR5,
1848c2ecf20Sopenharmony_ci				HICR5_ENFWH | HICR5_ENL2H,
1858c2ecf20Sopenharmony_ci				HICR5_ENFWH | HICR5_ENL2H);
1868c2ecf20Sopenharmony_ci	}
1878c2ecf20Sopenharmony_ci
1888c2ecf20Sopenharmony_ci	return -EINVAL;
1898c2ecf20Sopenharmony_ci}
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_cistatic const struct file_operations aspeed_lpc_ctrl_fops = {
1928c2ecf20Sopenharmony_ci	.owner		= THIS_MODULE,
1938c2ecf20Sopenharmony_ci	.mmap		= aspeed_lpc_ctrl_mmap,
1948c2ecf20Sopenharmony_ci	.unlocked_ioctl	= aspeed_lpc_ctrl_ioctl,
1958c2ecf20Sopenharmony_ci};
1968c2ecf20Sopenharmony_ci
1978c2ecf20Sopenharmony_cistatic int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
1988c2ecf20Sopenharmony_ci{
1998c2ecf20Sopenharmony_ci	struct aspeed_lpc_ctrl *lpc_ctrl;
2008c2ecf20Sopenharmony_ci	struct device_node *node;
2018c2ecf20Sopenharmony_ci	struct resource resm;
2028c2ecf20Sopenharmony_ci	struct device *dev;
2038c2ecf20Sopenharmony_ci	int rc;
2048c2ecf20Sopenharmony_ci
2058c2ecf20Sopenharmony_ci	dev = &pdev->dev;
2068c2ecf20Sopenharmony_ci
2078c2ecf20Sopenharmony_ci	lpc_ctrl = devm_kzalloc(dev, sizeof(*lpc_ctrl), GFP_KERNEL);
2088c2ecf20Sopenharmony_ci	if (!lpc_ctrl)
2098c2ecf20Sopenharmony_ci		return -ENOMEM;
2108c2ecf20Sopenharmony_ci
2118c2ecf20Sopenharmony_ci	/* If flash is described in device tree then store */
2128c2ecf20Sopenharmony_ci	node = of_parse_phandle(dev->of_node, "flash", 0);
2138c2ecf20Sopenharmony_ci	if (!node) {
2148c2ecf20Sopenharmony_ci		dev_dbg(dev, "Didn't find host pnor flash node\n");
2158c2ecf20Sopenharmony_ci	} else {
2168c2ecf20Sopenharmony_ci		rc = of_address_to_resource(node, 1, &resm);
2178c2ecf20Sopenharmony_ci		of_node_put(node);
2188c2ecf20Sopenharmony_ci		if (rc) {
2198c2ecf20Sopenharmony_ci			dev_err(dev, "Couldn't address to resource for flash\n");
2208c2ecf20Sopenharmony_ci			return rc;
2218c2ecf20Sopenharmony_ci		}
2228c2ecf20Sopenharmony_ci
2238c2ecf20Sopenharmony_ci		lpc_ctrl->pnor_size = resource_size(&resm);
2248c2ecf20Sopenharmony_ci		lpc_ctrl->pnor_base = resm.start;
2258c2ecf20Sopenharmony_ci	}
2268c2ecf20Sopenharmony_ci
2278c2ecf20Sopenharmony_ci
2288c2ecf20Sopenharmony_ci	dev_set_drvdata(&pdev->dev, lpc_ctrl);
2298c2ecf20Sopenharmony_ci
2308c2ecf20Sopenharmony_ci	/* If memory-region is described in device tree then store */
2318c2ecf20Sopenharmony_ci	node = of_parse_phandle(dev->of_node, "memory-region", 0);
2328c2ecf20Sopenharmony_ci	if (!node) {
2338c2ecf20Sopenharmony_ci		dev_dbg(dev, "Didn't find reserved memory\n");
2348c2ecf20Sopenharmony_ci	} else {
2358c2ecf20Sopenharmony_ci		rc = of_address_to_resource(node, 0, &resm);
2368c2ecf20Sopenharmony_ci		of_node_put(node);
2378c2ecf20Sopenharmony_ci		if (rc) {
2388c2ecf20Sopenharmony_ci			dev_err(dev, "Couldn't address to resource for reserved memory\n");
2398c2ecf20Sopenharmony_ci			return -ENXIO;
2408c2ecf20Sopenharmony_ci		}
2418c2ecf20Sopenharmony_ci
2428c2ecf20Sopenharmony_ci		lpc_ctrl->mem_size = resource_size(&resm);
2438c2ecf20Sopenharmony_ci		lpc_ctrl->mem_base = resm.start;
2448c2ecf20Sopenharmony_ci	}
2458c2ecf20Sopenharmony_ci
2468c2ecf20Sopenharmony_ci	lpc_ctrl->regmap = syscon_node_to_regmap(
2478c2ecf20Sopenharmony_ci			pdev->dev.parent->of_node);
2488c2ecf20Sopenharmony_ci	if (IS_ERR(lpc_ctrl->regmap)) {
2498c2ecf20Sopenharmony_ci		dev_err(dev, "Couldn't get regmap\n");
2508c2ecf20Sopenharmony_ci		return -ENODEV;
2518c2ecf20Sopenharmony_ci	}
2528c2ecf20Sopenharmony_ci
2538c2ecf20Sopenharmony_ci	lpc_ctrl->clk = devm_clk_get(dev, NULL);
2548c2ecf20Sopenharmony_ci	if (IS_ERR(lpc_ctrl->clk))
2558c2ecf20Sopenharmony_ci		return dev_err_probe(dev, PTR_ERR(lpc_ctrl->clk),
2568c2ecf20Sopenharmony_ci				     "couldn't get clock\n");
2578c2ecf20Sopenharmony_ci	rc = clk_prepare_enable(lpc_ctrl->clk);
2588c2ecf20Sopenharmony_ci	if (rc) {
2598c2ecf20Sopenharmony_ci		dev_err(dev, "couldn't enable clock\n");
2608c2ecf20Sopenharmony_ci		return rc;
2618c2ecf20Sopenharmony_ci	}
2628c2ecf20Sopenharmony_ci
2638c2ecf20Sopenharmony_ci	lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
2648c2ecf20Sopenharmony_ci	lpc_ctrl->miscdev.name = DEVICE_NAME;
2658c2ecf20Sopenharmony_ci	lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
2668c2ecf20Sopenharmony_ci	lpc_ctrl->miscdev.parent = dev;
2678c2ecf20Sopenharmony_ci	rc = misc_register(&lpc_ctrl->miscdev);
2688c2ecf20Sopenharmony_ci	if (rc) {
2698c2ecf20Sopenharmony_ci		dev_err(dev, "Unable to register device\n");
2708c2ecf20Sopenharmony_ci		goto err;
2718c2ecf20Sopenharmony_ci	}
2728c2ecf20Sopenharmony_ci
2738c2ecf20Sopenharmony_ci	return 0;
2748c2ecf20Sopenharmony_ci
2758c2ecf20Sopenharmony_cierr:
2768c2ecf20Sopenharmony_ci	clk_disable_unprepare(lpc_ctrl->clk);
2778c2ecf20Sopenharmony_ci	return rc;
2788c2ecf20Sopenharmony_ci}
2798c2ecf20Sopenharmony_ci
2808c2ecf20Sopenharmony_cistatic int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
2818c2ecf20Sopenharmony_ci{
2828c2ecf20Sopenharmony_ci	struct aspeed_lpc_ctrl *lpc_ctrl = dev_get_drvdata(&pdev->dev);
2838c2ecf20Sopenharmony_ci
2848c2ecf20Sopenharmony_ci	misc_deregister(&lpc_ctrl->miscdev);
2858c2ecf20Sopenharmony_ci	clk_disable_unprepare(lpc_ctrl->clk);
2868c2ecf20Sopenharmony_ci
2878c2ecf20Sopenharmony_ci	return 0;
2888c2ecf20Sopenharmony_ci}
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_cistatic const struct of_device_id aspeed_lpc_ctrl_match[] = {
2918c2ecf20Sopenharmony_ci	{ .compatible = "aspeed,ast2400-lpc-ctrl" },
2928c2ecf20Sopenharmony_ci	{ .compatible = "aspeed,ast2500-lpc-ctrl" },
2938c2ecf20Sopenharmony_ci	{ },
2948c2ecf20Sopenharmony_ci};
2958c2ecf20Sopenharmony_ci
2968c2ecf20Sopenharmony_cistatic struct platform_driver aspeed_lpc_ctrl_driver = {
2978c2ecf20Sopenharmony_ci	.driver = {
2988c2ecf20Sopenharmony_ci		.name		= DEVICE_NAME,
2998c2ecf20Sopenharmony_ci		.of_match_table = aspeed_lpc_ctrl_match,
3008c2ecf20Sopenharmony_ci	},
3018c2ecf20Sopenharmony_ci	.probe = aspeed_lpc_ctrl_probe,
3028c2ecf20Sopenharmony_ci	.remove = aspeed_lpc_ctrl_remove,
3038c2ecf20Sopenharmony_ci};
3048c2ecf20Sopenharmony_ci
3058c2ecf20Sopenharmony_cimodule_platform_driver(aspeed_lpc_ctrl_driver);
3068c2ecf20Sopenharmony_ci
3078c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match);
3088c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL");
3098c2ecf20Sopenharmony_ciMODULE_AUTHOR("Cyril Bur <cyrilbur@gmail.com>");
3108c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings");
311