18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ci/*  Driver for the Iomega MatchMaker parallel port SCSI HBA embedded in
48c2ecf20Sopenharmony_ci * the Iomega ZIP Plus drive
58c2ecf20Sopenharmony_ci *
68c2ecf20Sopenharmony_ci * (c) 1998     David Campbell
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci * Please note that I live in Perth, Western Australia. GMT+0800
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#ifndef _IMM_H
128c2ecf20Sopenharmony_ci#define _IMM_H
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#define   IMM_VERSION   "2.05 (for Linux 2.4.0)"
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci/*
178c2ecf20Sopenharmony_ci * 10 Apr 1998 (Good Friday) - Received EN144302 by email from Iomega.
188c2ecf20Sopenharmony_ci * Scarry thing is the level of support from one of their managers.
198c2ecf20Sopenharmony_ci * The onus is now on us (the developers) to shut up and start coding.
208c2ecf20Sopenharmony_ci *                                              11Apr98 [ 0.10 ]
218c2ecf20Sopenharmony_ci *
228c2ecf20Sopenharmony_ci * --- SNIP ---
238c2ecf20Sopenharmony_ci *
248c2ecf20Sopenharmony_ci * It manages to find the drive which is a good start. Writing data during
258c2ecf20Sopenharmony_ci * data phase is known to be broken (due to requirements of two byte writes).
268c2ecf20Sopenharmony_ci * Removing "Phase" debug messages.
278c2ecf20Sopenharmony_ci *
288c2ecf20Sopenharmony_ci * PS: Took four hours of coding after I bought a drive.
298c2ecf20Sopenharmony_ci *      ANZAC Day (Aus "War Veterans Holiday")  25Apr98 [ 0.14 ]
308c2ecf20Sopenharmony_ci *
318c2ecf20Sopenharmony_ci * Ten minutes later after a few fixes.... (LITERALLY!!!)
328c2ecf20Sopenharmony_ci * Have mounted disk, copied file, dismounted disk, remount disk, diff file
338c2ecf20Sopenharmony_ci *                    -----  It actually works!!! -----
348c2ecf20Sopenharmony_ci *                                              25Apr98 [ 0.15 ]
358c2ecf20Sopenharmony_ci *
368c2ecf20Sopenharmony_ci * Twenty minutes of mucking around, rearanged the IEEE negotiate mechanism.
378c2ecf20Sopenharmony_ci * Now have byte mode working (only EPP and ECP to go now... :=)
388c2ecf20Sopenharmony_ci *                                              26Apr98 [ 0.16 ]
398c2ecf20Sopenharmony_ci *
408c2ecf20Sopenharmony_ci * Thirty minutes of further coding results in EPP working on my machine.
418c2ecf20Sopenharmony_ci *                                              27Apr98 [ 0.17 ]
428c2ecf20Sopenharmony_ci *
438c2ecf20Sopenharmony_ci * Due to work commitments and inability to get a "true" ECP mode functioning
448c2ecf20Sopenharmony_ci * I have decided to code the parport support into imm.
458c2ecf20Sopenharmony_ci *                                              09Jun98 [ 0.18 ]
468c2ecf20Sopenharmony_ci *
478c2ecf20Sopenharmony_ci * Driver is now out of beta testing.
488c2ecf20Sopenharmony_ci * Support for parport has been added.
498c2ecf20Sopenharmony_ci * Now distributed with the ppa driver.
508c2ecf20Sopenharmony_ci *                                              12Jun98 [ 2.00 ]
518c2ecf20Sopenharmony_ci *
528c2ecf20Sopenharmony_ci * Err.. It appears that imm-2.00 was broken....
538c2ecf20Sopenharmony_ci *                                              18Jun98 [ 2.01 ]
548c2ecf20Sopenharmony_ci *
558c2ecf20Sopenharmony_ci * Patch applied to sync this against the Linux 2.1.x kernel code
568c2ecf20Sopenharmony_ci * Included qboot_zip.sh
578c2ecf20Sopenharmony_ci *                                              21Jun98 [ 2.02 ]
588c2ecf20Sopenharmony_ci *
598c2ecf20Sopenharmony_ci * Other clean ups include the follow changes:
608c2ecf20Sopenharmony_ci *    CONFIG_SCSI_PPA_HAVE_PEDANTIC => CONFIG_SCSI_IZIP_EPP16
618c2ecf20Sopenharmony_ci *    added CONFIG_SCSI_IZIP_SLOW_CTR option
628c2ecf20Sopenharmony_ci *                                                      [2.03]
638c2ecf20Sopenharmony_ci *  Fix kernel panic on scsi timeout.		20Aug00 [2.04]
648c2ecf20Sopenharmony_ci *
658c2ecf20Sopenharmony_ci *  Avoid io_request_lock problems.
668c2ecf20Sopenharmony_ci *  John Cavan <johncavan@home.com>		16Nov00 [2.05]
678c2ecf20Sopenharmony_ci */
688c2ecf20Sopenharmony_ci/* ------ END OF USER CONFIGURABLE PARAMETERS ----- */
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci#include  <linux/stddef.h>
718c2ecf20Sopenharmony_ci#include  <linux/module.h>
728c2ecf20Sopenharmony_ci#include  <linux/kernel.h>
738c2ecf20Sopenharmony_ci#include  <linux/ioport.h>
748c2ecf20Sopenharmony_ci#include  <linux/delay.h>
758c2ecf20Sopenharmony_ci#include  <linux/proc_fs.h>
768c2ecf20Sopenharmony_ci#include  <linux/stat.h>
778c2ecf20Sopenharmony_ci#include  <linux/blkdev.h>
788c2ecf20Sopenharmony_ci#include  <linux/sched.h>
798c2ecf20Sopenharmony_ci#include  <linux/interrupt.h>
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci#include  <asm/io.h>
828c2ecf20Sopenharmony_ci#include  <scsi/scsi_host.h>
838c2ecf20Sopenharmony_ci/* batteries not included :-) */
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_ci/*
868c2ecf20Sopenharmony_ci * modes in which the driver can operate
878c2ecf20Sopenharmony_ci */
888c2ecf20Sopenharmony_ci#define   IMM_AUTODETECT        0	/* Autodetect mode                */
898c2ecf20Sopenharmony_ci#define   IMM_NIBBLE            1	/* work in standard 4 bit mode    */
908c2ecf20Sopenharmony_ci#define   IMM_PS2               2	/* PS/2 byte mode         */
918c2ecf20Sopenharmony_ci#define   IMM_EPP_8             3	/* EPP mode, 8 bit                */
928c2ecf20Sopenharmony_ci#define   IMM_EPP_16            4	/* EPP mode, 16 bit               */
938c2ecf20Sopenharmony_ci#define   IMM_EPP_32            5	/* EPP mode, 32 bit               */
948c2ecf20Sopenharmony_ci#define   IMM_UNKNOWN           6	/* Just in case...                */
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_cistatic char *IMM_MODE_STRING[] =
978c2ecf20Sopenharmony_ci{
988c2ecf20Sopenharmony_ci	[IMM_AUTODETECT] = "Autodetect",
998c2ecf20Sopenharmony_ci	[IMM_NIBBLE]	 = "SPP",
1008c2ecf20Sopenharmony_ci	[IMM_PS2]	 = "PS/2",
1018c2ecf20Sopenharmony_ci	[IMM_EPP_8]	 = "EPP 8 bit",
1028c2ecf20Sopenharmony_ci	[IMM_EPP_16]	 = "EPP 16 bit",
1038c2ecf20Sopenharmony_ci#ifdef CONFIG_SCSI_IZIP_EPP16
1048c2ecf20Sopenharmony_ci	[IMM_EPP_32]	 = "EPP 16 bit",
1058c2ecf20Sopenharmony_ci#else
1068c2ecf20Sopenharmony_ci	[IMM_EPP_32]	 = "EPP 32 bit",
1078c2ecf20Sopenharmony_ci#endif
1088c2ecf20Sopenharmony_ci	[IMM_UNKNOWN]	 = "Unknown",
1098c2ecf20Sopenharmony_ci};
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ci/* other options */
1128c2ecf20Sopenharmony_ci#define IMM_BURST_SIZE	512	/* data burst size */
1138c2ecf20Sopenharmony_ci#define IMM_SELECT_TMO  500	/* 500 how long to wait for target ? */
1148c2ecf20Sopenharmony_ci#define IMM_SPIN_TMO    5000	/* 50000 imm_wait loop limiter */
1158c2ecf20Sopenharmony_ci#define IMM_DEBUG	0	/* debugging option */
1168c2ecf20Sopenharmony_ci#define IN_EPP_MODE(x) (x == IMM_EPP_8 || x == IMM_EPP_16 || x == IMM_EPP_32)
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci/* args to imm_connect */
1198c2ecf20Sopenharmony_ci#define CONNECT_EPP_MAYBE 1
1208c2ecf20Sopenharmony_ci#define CONNECT_NORMAL  0
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci#define r_dtr(x)        (unsigned char)inb((x))
1238c2ecf20Sopenharmony_ci#define r_str(x)        (unsigned char)inb((x)+1)
1248c2ecf20Sopenharmony_ci#define r_ctr(x)        (unsigned char)inb((x)+2)
1258c2ecf20Sopenharmony_ci#define r_epp(x)        (unsigned char)inb((x)+4)
1268c2ecf20Sopenharmony_ci#define r_fifo(x)       (unsigned char)inb((x))   /* x must be base_hi */
1278c2ecf20Sopenharmony_ci					/* On PCI is: base+0x400 != base_hi */
1288c2ecf20Sopenharmony_ci#define r_ecr(x)        (unsigned char)inb((x)+2) /* x must be base_hi */
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_ci#define w_dtr(x,y)      outb(y, (x))
1318c2ecf20Sopenharmony_ci#define w_str(x,y)      outb(y, (x)+1)
1328c2ecf20Sopenharmony_ci#define w_epp(x,y)      outb(y, (x)+4)
1338c2ecf20Sopenharmony_ci#define w_fifo(x,y)     outb(y, (x))     /* x must be base_hi */
1348c2ecf20Sopenharmony_ci#define w_ecr(x,y)      outb(y, (x)+0x2) /* x must be base_hi */
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_ci#ifdef CONFIG_SCSI_IZIP_SLOW_CTR
1378c2ecf20Sopenharmony_ci#define w_ctr(x,y)      outb_p(y, (x)+2)
1388c2ecf20Sopenharmony_ci#else
1398c2ecf20Sopenharmony_ci#define w_ctr(x,y)      outb(y, (x)+2)
1408c2ecf20Sopenharmony_ci#endif
1418c2ecf20Sopenharmony_ci
1428c2ecf20Sopenharmony_cistatic int imm_engine(imm_struct *, struct scsi_cmnd *);
1438c2ecf20Sopenharmony_ci
1448c2ecf20Sopenharmony_ci#endif				/* _IMM_H */
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