1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Copyright (c) 2015 Linaro Ltd. 4 * Copyright (c) 2015 Hisilicon Limited. 5 */ 6 7#ifndef _HISI_SAS_H_ 8#define _HISI_SAS_H_ 9 10#include <linux/acpi.h> 11#include <linux/blk-mq.h> 12#include <linux/blk-mq-pci.h> 13#include <linux/clk.h> 14#include <linux/debugfs.h> 15#include <linux/dmapool.h> 16#include <linux/iopoll.h> 17#include <linux/lcm.h> 18#include <linux/libata.h> 19#include <linux/mfd/syscon.h> 20#include <linux/module.h> 21#include <linux/of_address.h> 22#include <linux/pci.h> 23#include <linux/platform_device.h> 24#include <linux/pm_runtime.h> 25#include <linux/property.h> 26#include <linux/regmap.h> 27#include <linux/timer.h> 28#include <scsi/sas_ata.h> 29#include <scsi/libsas.h> 30 31#define HISI_SAS_MAX_PHYS 9 32#define HISI_SAS_MAX_QUEUES 32 33#define HISI_SAS_QUEUE_SLOTS 4096 34#define HISI_SAS_MAX_ITCT_ENTRIES 1024 35#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 36#define HISI_SAS_RESET_BIT 0 37#define HISI_SAS_REJECT_CMD_BIT 1 38#define HISI_SAS_PM_BIT 2 39#define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS) 40#define HISI_SAS_RESERVED_IPTT 96 41#define HISI_SAS_UNRESERVED_IPTT \ 42 (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT) 43 44#define HISI_SAS_IOST_ITCT_CACHE_NUM 64 45#define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10 46 47#define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) 48#define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) 49 50#define hisi_sas_status_buf_addr(buf) \ 51 ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) 52#define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf) 53#define hisi_sas_status_buf_addr_dma(slot) \ 54 hisi_sas_status_buf_addr((slot)->buf_dma) 55 56#define hisi_sas_cmd_hdr_addr(buf) \ 57 ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header)) 58#define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf) 59#define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma) 60 61#define hisi_sas_sge_addr(buf) \ 62 ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page)) 63#define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf) 64#define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma) 65 66#define hisi_sas_sge_dif_addr(buf) \ 67 ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page)) 68#define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf) 69#define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma) 70 71#define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 72#define HISI_SAS_MAX_SMP_RESP_SZ 1028 73#define HISI_SAS_MAX_STP_RESP_SZ 28 74 75#define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 76#define HISI_SAS_SATA_PROTOCOL_PIO 0x2 77#define HISI_SAS_SATA_PROTOCOL_DMA 0x4 78#define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 79#define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 80 81#define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \ 82 SHOST_DIF_TYPE2_PROTECTION | \ 83 SHOST_DIF_TYPE3_PROTECTION) 84 85#define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \ 86 SHOST_DIX_TYPE2_PROTECTION | \ 87 SHOST_DIX_TYPE3_PROTECTION) 88 89#define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK) 90 91#define HISI_SAS_WAIT_PHYUP_TIMEOUT 20 92#define CLEAR_ITCT_TIMEOUT 20 93 94struct hisi_hba; 95 96enum { 97 PORT_TYPE_SAS = (1U << 1), 98 PORT_TYPE_SATA = (1U << 0), 99}; 100 101enum dev_status { 102 HISI_SAS_DEV_INIT, 103 HISI_SAS_DEV_NORMAL, 104}; 105 106enum { 107 HISI_SAS_INT_ABT_CMD = 0, 108 HISI_SAS_INT_ABT_DEV = 1, 109}; 110 111enum hisi_sas_dev_type { 112 HISI_SAS_DEV_TYPE_STP = 0, 113 HISI_SAS_DEV_TYPE_SSP, 114 HISI_SAS_DEV_TYPE_SATA, 115}; 116 117struct hisi_sas_hw_error { 118 u32 irq_msk; 119 u32 msk; 120 int shift; 121 const char *msg; 122 int reg; 123 const struct hisi_sas_hw_error *sub; 124}; 125 126struct hisi_sas_rst { 127 struct hisi_hba *hisi_hba; 128 struct completion *completion; 129 struct work_struct work; 130 bool done; 131}; 132 133#define HISI_SAS_RST_WORK_INIT(r, c) \ 134 { .hisi_hba = hisi_hba, \ 135 .completion = &c, \ 136 .work = __WORK_INITIALIZER(r.work, \ 137 hisi_sas_sync_rst_work_handler), \ 138 .done = false, \ 139 } 140 141#define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ 142 DECLARE_COMPLETION_ONSTACK(c); \ 143 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) 144 145enum hisi_sas_bit_err_type { 146 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0, 147 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1, 148}; 149 150enum hisi_sas_phy_event { 151 HISI_PHYE_PHY_UP = 0U, 152 HISI_PHYE_LINK_RESET, 153 HISI_PHYES_NUM, 154}; 155 156struct hisi_sas_phy { 157 struct work_struct works[HISI_PHYES_NUM]; 158 struct hisi_hba *hisi_hba; 159 struct hisi_sas_port *port; 160 struct asd_sas_phy sas_phy; 161 struct sas_identify identify; 162 struct completion *reset_completion; 163 struct timer_list timer; 164 spinlock_t lock; 165 u64 port_id; /* from hw */ 166 u64 frame_rcvd_size; 167 u8 frame_rcvd[32]; 168 u8 phy_attached; 169 u8 in_reset; 170 u8 reserved[2]; 171 u32 phy_type; 172 u32 code_violation_err_count; 173 enum sas_linkrate minimum_linkrate; 174 enum sas_linkrate maximum_linkrate; 175 int enable; 176 atomic_t down_cnt; 177}; 178 179struct hisi_sas_port { 180 struct asd_sas_port sas_port; 181 u8 port_attached; 182 u8 id; /* from hw */ 183}; 184 185struct hisi_sas_cq { 186 struct hisi_hba *hisi_hba; 187 const struct cpumask *irq_mask; 188 int rd_point; 189 int id; 190 int irq_no; 191}; 192 193struct hisi_sas_dq { 194 struct hisi_hba *hisi_hba; 195 struct list_head list; 196 spinlock_t lock; 197 int wr_point; 198 int id; 199}; 200 201struct hisi_sas_device { 202 struct hisi_hba *hisi_hba; 203 struct domain_device *sas_device; 204 struct completion *completion; 205 struct hisi_sas_dq *dq; 206 struct list_head list; 207 enum sas_device_type dev_type; 208 enum dev_status dev_status; 209 int device_id; 210 int sata_idx; 211 spinlock_t lock; /* For protecting slots */ 212}; 213 214struct hisi_sas_tmf_task { 215 int force_phy; 216 int phy_id; 217 u8 tmf; 218 u16 tag_of_task_to_be_managed; 219}; 220 221struct hisi_sas_slot { 222 struct list_head entry; 223 struct list_head delivery; 224 struct sas_task *task; 225 struct hisi_sas_port *port; 226 u64 n_elem; 227 u64 n_elem_dif; 228 int dlvry_queue; 229 int dlvry_queue_slot; 230 int cmplt_queue; 231 int cmplt_queue_slot; 232 int abort; 233 int ready; 234 int device_id; 235 void *cmd_hdr; 236 dma_addr_t cmd_hdr_dma; 237 struct timer_list internal_abort_timer; 238 bool is_internal; 239 struct hisi_sas_tmf_task *tmf; 240 /* Do not reorder/change members after here */ 241 void *buf; 242 dma_addr_t buf_dma; 243 u16 idx; 244}; 245 246#define HISI_SAS_DEBUGFS_REG(x) {#x, x} 247 248struct hisi_sas_debugfs_reg_lu { 249 char *name; 250 int off; 251}; 252 253struct hisi_sas_debugfs_reg { 254 const struct hisi_sas_debugfs_reg_lu *lu; 255 int count; 256 int base_off; 257 union { 258 u32 (*read_global_reg)(struct hisi_hba *hisi_hba, u32 off); 259 u32 (*read_port_reg)(struct hisi_hba *hisi_hba, int port, 260 u32 off); 261 }; 262}; 263 264struct hisi_sas_iost_itct_cache { 265 u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ]; 266}; 267 268enum hisi_sas_debugfs_reg_array_member { 269 DEBUGFS_GLOBAL = 0, 270 DEBUGFS_AXI, 271 DEBUGFS_RAS, 272 DEBUGFS_REGS_NUM 273}; 274 275enum hisi_sas_debugfs_cache_type { 276 HISI_SAS_ITCT_CACHE, 277 HISI_SAS_IOST_CACHE, 278}; 279 280enum hisi_sas_debugfs_bist_ffe_cfg { 281 FFE_SAS_1_5_GBPS, 282 FFE_SAS_3_0_GBPS, 283 FFE_SAS_6_0_GBPS, 284 FFE_SAS_12_0_GBPS, 285 FFE_RESV, 286 FFE_SATA_1_5_GBPS, 287 FFE_SATA_3_0_GBPS, 288 FFE_SATA_6_0_GBPS, 289 FFE_CFG_MAX 290}; 291 292enum hisi_sas_debugfs_bist_fixed_code { 293 FIXED_CODE, 294 FIXED_CODE_1, 295 FIXED_CODE_MAX 296}; 297 298enum { 299 HISI_SAS_BIST_CODE_MODE_PRBS7, 300 HISI_SAS_BIST_CODE_MODE_PRBS23, 301 HISI_SAS_BIST_CODE_MODE_PRBS31, 302 HISI_SAS_BIST_CODE_MODE_JTPAT, 303 HISI_SAS_BIST_CODE_MODE_CJTPAT, 304 HISI_SAS_BIST_CODE_MODE_SCRAMBED_0, 305 HISI_SAS_BIST_CODE_MODE_TRAIN, 306 HISI_SAS_BIST_CODE_MODE_TRAIN_DONE, 307 HISI_SAS_BIST_CODE_MODE_HFTP, 308 HISI_SAS_BIST_CODE_MODE_MFTP, 309 HISI_SAS_BIST_CODE_MODE_LFTP, 310 HISI_SAS_BIST_CODE_MODE_FIXED_DATA, 311}; 312 313struct hisi_sas_hw { 314 int (*hw_init)(struct hisi_hba *hisi_hba); 315 void (*setup_itct)(struct hisi_hba *hisi_hba, 316 struct hisi_sas_device *device); 317 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, 318 struct domain_device *device); 319 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 320 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); 321 void (*start_delivery)(struct hisi_sas_dq *dq); 322 void (*prep_ssp)(struct hisi_hba *hisi_hba, 323 struct hisi_sas_slot *slot); 324 void (*prep_smp)(struct hisi_hba *hisi_hba, 325 struct hisi_sas_slot *slot); 326 void (*prep_stp)(struct hisi_hba *hisi_hba, 327 struct hisi_sas_slot *slot); 328 void (*prep_abort)(struct hisi_hba *hisi_hba, 329 struct hisi_sas_slot *slot, 330 int device_id, int abort_flag, int tag_to_abort); 331 void (*phys_init)(struct hisi_hba *hisi_hba); 332 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); 333 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 334 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 335 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); 336 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 337 struct sas_phy_linkrates *linkrates); 338 enum sas_linkrate (*phy_get_max_linkrate)(void); 339 int (*clear_itct)(struct hisi_hba *hisi_hba, 340 struct hisi_sas_device *dev); 341 void (*free_device)(struct hisi_sas_device *sas_dev); 342 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 343 void (*dereg_device)(struct hisi_hba *hisi_hba, 344 struct domain_device *device); 345 int (*soft_reset)(struct hisi_hba *hisi_hba); 346 u32 (*get_phys_state)(struct hisi_hba *hisi_hba); 347 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, 348 u8 reg_index, u8 reg_count, u8 *write_data); 349 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 350 int delay_ms, int timeout_ms); 351 void (*snapshot_prepare)(struct hisi_hba *hisi_hba); 352 void (*snapshot_restore)(struct hisi_hba *hisi_hba); 353 int (*set_bist)(struct hisi_hba *hisi_hba, bool enable); 354 void (*read_iost_itct_cache)(struct hisi_hba *hisi_hba, 355 enum hisi_sas_debugfs_cache_type type, 356 u32 *cache); 357 int complete_hdr_size; 358 struct scsi_host_template *sht; 359 360 const struct hisi_sas_debugfs_reg *debugfs_reg_array[DEBUGFS_REGS_NUM]; 361 const struct hisi_sas_debugfs_reg *debugfs_reg_port; 362}; 363 364#define HISI_SAS_MAX_DEBUGFS_DUMP (50) 365 366struct hisi_sas_debugfs_cq { 367 struct hisi_sas_cq *cq; 368 void *complete_hdr; 369}; 370 371struct hisi_sas_debugfs_dq { 372 struct hisi_sas_dq *dq; 373 struct hisi_sas_cmd_hdr *hdr; 374}; 375 376struct hisi_sas_debugfs_regs { 377 struct hisi_hba *hisi_hba; 378 u32 *data; 379}; 380 381struct hisi_sas_debugfs_port { 382 struct hisi_sas_phy *phy; 383 u32 *data; 384}; 385 386struct hisi_sas_debugfs_iost { 387 struct hisi_sas_iost *iost; 388}; 389 390struct hisi_sas_debugfs_itct { 391 struct hisi_sas_itct *itct; 392}; 393 394struct hisi_sas_debugfs_iost_cache { 395 struct hisi_sas_iost_itct_cache *cache; 396}; 397 398struct hisi_sas_debugfs_itct_cache { 399 struct hisi_sas_iost_itct_cache *cache; 400}; 401 402struct hisi_hba { 403 /* This must be the first element, used by SHOST_TO_SAS_HA */ 404 struct sas_ha_struct *p; 405 406 struct platform_device *platform_dev; 407 struct pci_dev *pci_dev; 408 struct device *dev; 409 410 int prot_mask; 411 412 void __iomem *regs; 413 void __iomem *sgpio_regs; 414 struct regmap *ctrl; 415 u32 ctrl_reset_reg; 416 u32 ctrl_reset_sts_reg; 417 u32 ctrl_clock_ena_reg; 418 u32 refclk_frequency_mhz; 419 u8 sas_addr[SAS_ADDR_SIZE]; 420 421 int n_phy; 422 spinlock_t lock; 423 struct semaphore sem; 424 425 struct timer_list timer; 426 struct workqueue_struct *wq; 427 428 int slot_index_count; 429 int last_slot_index; 430 int last_dev_id; 431 unsigned long *slot_index_tags; 432 unsigned long reject_stp_links_msk; 433 434 /* SCSI/SAS glue */ 435 struct sas_ha_struct sha; 436 struct Scsi_Host *shost; 437 438 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 439 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 440 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 441 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 442 443 int queue_count; 444 445 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 446 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 447 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 448 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 449 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 450 struct hisi_sas_initial_fis *initial_fis; 451 dma_addr_t initial_fis_dma; 452 struct hisi_sas_itct *itct; 453 dma_addr_t itct_dma; 454 struct hisi_sas_iost *iost; 455 dma_addr_t iost_dma; 456 struct hisi_sas_breakpoint *breakpoint; 457 dma_addr_t breakpoint_dma; 458 struct hisi_sas_breakpoint *sata_breakpoint; 459 dma_addr_t sata_breakpoint_dma; 460 struct hisi_sas_slot *slot_info; 461 unsigned long flags; 462 const struct hisi_sas_hw *hw; /* Low level hw interface */ 463 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; 464 struct work_struct rst_work; 465 struct work_struct debugfs_work; 466 u32 phy_state; 467 u32 intr_coal_ticks; /* Time of interrupt coalesce in us */ 468 u32 intr_coal_count; /* Interrupt count to coalesce */ 469 470 int cq_nvecs; 471 472 /* bist */ 473 enum sas_linkrate debugfs_bist_linkrate; 474 int debugfs_bist_code_mode; 475 int debugfs_bist_phy_no; 476 int debugfs_bist_mode; 477 u32 debugfs_bist_cnt; 478 int debugfs_bist_enable; 479 u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX]; 480 u32 debugfs_bist_fixed_code[FIXED_CODE_MAX]; 481 482 /* debugfs memories */ 483 /* Put Global AXI and RAS Register into register array */ 484 struct hisi_sas_debugfs_regs debugfs_regs[HISI_SAS_MAX_DEBUGFS_DUMP][DEBUGFS_REGS_NUM]; 485 struct hisi_sas_debugfs_port debugfs_port_reg[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_PHYS]; 486 struct hisi_sas_debugfs_cq debugfs_cq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 487 struct hisi_sas_debugfs_dq debugfs_dq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 488 struct hisi_sas_debugfs_iost debugfs_iost[HISI_SAS_MAX_DEBUGFS_DUMP]; 489 struct hisi_sas_debugfs_itct debugfs_itct[HISI_SAS_MAX_DEBUGFS_DUMP]; 490 struct hisi_sas_debugfs_iost_cache debugfs_iost_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 491 struct hisi_sas_debugfs_itct_cache debugfs_itct_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 492 493 u64 debugfs_timestamp[HISI_SAS_MAX_DEBUGFS_DUMP]; 494 int debugfs_dump_index; 495 struct dentry *debugfs_dir; 496 struct dentry *debugfs_dump_dentry; 497 struct dentry *debugfs_bist_dentry; 498}; 499 500/* Generic HW DMA host memory structures */ 501/* Delivery queue header */ 502struct hisi_sas_cmd_hdr { 503 /* dw0 */ 504 __le32 dw0; 505 506 /* dw1 */ 507 __le32 dw1; 508 509 /* dw2 */ 510 __le32 dw2; 511 512 /* dw3 */ 513 __le32 transfer_tags; 514 515 /* dw4 */ 516 __le32 data_transfer_len; 517 518 /* dw5 */ 519 __le32 first_burst_num; 520 521 /* dw6 */ 522 __le32 sg_len; 523 524 /* dw7 */ 525 __le32 dw7; 526 527 /* dw8-9 */ 528 __le64 cmd_table_addr; 529 530 /* dw10-11 */ 531 __le64 sts_buffer_addr; 532 533 /* dw12-13 */ 534 __le64 prd_table_addr; 535 536 /* dw14-15 */ 537 __le64 dif_prd_table_addr; 538}; 539 540struct hisi_sas_itct { 541 __le64 qw0; 542 __le64 sas_addr; 543 __le64 qw2; 544 __le64 qw3; 545 __le64 qw4_15[12]; 546}; 547 548struct hisi_sas_iost { 549 __le64 qw0; 550 __le64 qw1; 551 __le64 qw2; 552 __le64 qw3; 553}; 554 555struct hisi_sas_err_record { 556 u32 data[4]; 557}; 558 559struct hisi_sas_initial_fis { 560 struct hisi_sas_err_record err_record; 561 struct dev_to_host_fis fis; 562 u32 rsvd[3]; 563}; 564 565struct hisi_sas_breakpoint { 566 u8 data[128]; 567}; 568 569struct hisi_sas_sata_breakpoint { 570 struct hisi_sas_breakpoint tag[32]; 571}; 572 573struct hisi_sas_sge { 574 __le64 addr; 575 __le32 page_ctrl_0; 576 __le32 page_ctrl_1; 577 __le32 data_len; 578 __le32 data_off; 579}; 580 581struct hisi_sas_command_table_smp { 582 u8 bytes[44]; 583}; 584 585struct hisi_sas_command_table_stp { 586 struct host_to_dev_fis command_fis; 587 u8 dummy[12]; 588 u8 atapi_cdb[ATAPI_CDB_LEN]; 589}; 590 591#define HISI_SAS_SGE_PAGE_CNT (124) 592struct hisi_sas_sge_page { 593 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 594} __aligned(16); 595 596#define HISI_SAS_SGE_DIF_PAGE_CNT HISI_SAS_SGE_PAGE_CNT 597struct hisi_sas_sge_dif_page { 598 struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT]; 599} __aligned(16); 600 601struct hisi_sas_command_table_ssp { 602 struct ssp_frame_hdr hdr; 603 union { 604 struct { 605 struct ssp_command_iu task; 606 u32 prot[7]; 607 }; 608 struct ssp_tmf_iu ssp_task; 609 struct xfer_rdy_iu xfer_rdy; 610 struct ssp_response_iu ssp_res; 611 } u; 612}; 613 614union hisi_sas_command_table { 615 struct hisi_sas_command_table_ssp ssp; 616 struct hisi_sas_command_table_smp smp; 617 struct hisi_sas_command_table_stp stp; 618} __aligned(16); 619 620struct hisi_sas_status_buffer { 621 struct hisi_sas_err_record err; 622 u8 iu[1024]; 623} __aligned(16); 624 625struct hisi_sas_slot_buf_table { 626 struct hisi_sas_status_buffer status_buffer; 627 union hisi_sas_command_table command_header; 628 struct hisi_sas_sge_page sge_page; 629}; 630 631struct hisi_sas_slot_dif_buf_table { 632 struct hisi_sas_slot_buf_table slot_buf; 633 struct hisi_sas_sge_dif_page sge_dif_page; 634}; 635 636extern struct scsi_transport_template *hisi_sas_stt; 637 638extern bool hisi_sas_debugfs_enable; 639extern u32 hisi_sas_debugfs_dump_count; 640extern struct dentry *hisi_sas_debugfs_dir; 641 642extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); 643extern int hisi_sas_alloc(struct hisi_hba *hisi_hba); 644extern void hisi_sas_free(struct hisi_hba *hisi_hba); 645extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, 646 int direction); 647extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 648extern void hisi_sas_sata_done(struct sas_task *task, 649 struct hisi_sas_slot *slot); 650extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); 651extern int hisi_sas_probe(struct platform_device *pdev, 652 const struct hisi_sas_hw *ops); 653extern int hisi_sas_remove(struct platform_device *pdev); 654 655extern int hisi_sas_slave_configure(struct scsi_device *sdev); 656extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time); 657extern void hisi_sas_scan_start(struct Scsi_Host *shost); 658extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type); 659extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, 660 int enable); 661extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); 662extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 663 struct sas_task *task, 664 struct hisi_sas_slot *slot); 665extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); 666extern void hisi_sas_rst_work_handler(struct work_struct *work); 667extern void hisi_sas_sync_rst_work_handler(struct work_struct *work); 668extern void hisi_sas_sync_irqs(struct hisi_hba *hisi_hba); 669extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no); 670extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, 671 enum hisi_sas_phy_event event); 672extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba); 673extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max); 674extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba); 675extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba); 676extern void hisi_sas_debugfs_init(struct hisi_hba *hisi_hba); 677extern void hisi_sas_debugfs_exit(struct hisi_hba *hisi_hba); 678extern void hisi_sas_debugfs_work_handler(struct work_struct *work); 679#endif 680