1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Linux for s390 qdio support, buffer handling, qdio API and module support. 4 * 5 * Copyright IBM Corp. 2000, 2008 6 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 7 * Jan Glauber <jang@linux.vnet.ibm.com> 8 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com> 9 */ 10#include <linux/module.h> 11#include <linux/init.h> 12#include <linux/kernel.h> 13#include <linux/timer.h> 14#include <linux/delay.h> 15#include <linux/gfp.h> 16#include <linux/io.h> 17#include <linux/atomic.h> 18#include <asm/debug.h> 19#include <asm/qdio.h> 20#include <asm/ipl.h> 21 22#include "cio.h" 23#include "css.h" 24#include "device.h" 25#include "qdio.h" 26#include "qdio_debug.h" 27 28MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\ 29 "Jan Glauber <jang@linux.vnet.ibm.com>"); 30MODULE_DESCRIPTION("QDIO base support"); 31MODULE_LICENSE("GPL"); 32 33static inline int do_siga_sync(unsigned long schid, 34 unsigned long out_mask, unsigned long in_mask, 35 unsigned int fc) 36{ 37 int cc; 38 39 asm volatile( 40 " lgr 0,%[fc]\n" 41 " lgr 1,%[schid]\n" 42 " lgr 2,%[out]\n" 43 " lgr 3,%[in]\n" 44 " siga 0\n" 45 " ipm %[cc]\n" 46 " srl %[cc],28\n" 47 : [cc] "=&d" (cc) 48 : [fc] "d" (fc), [schid] "d" (schid), 49 [out] "d" (out_mask), [in] "d" (in_mask) 50 : "cc", "0", "1", "2", "3"); 51 return cc; 52} 53 54static inline int do_siga_input(unsigned long schid, unsigned long mask, 55 unsigned long fc) 56{ 57 int cc; 58 59 asm volatile( 60 " lgr 0,%[fc]\n" 61 " lgr 1,%[schid]\n" 62 " lgr 2,%[mask]\n" 63 " siga 0\n" 64 " ipm %[cc]\n" 65 " srl %[cc],28\n" 66 : [cc] "=&d" (cc) 67 : [fc] "d" (fc), [schid] "d" (schid), [mask] "d" (mask) 68 : "cc", "0", "1", "2"); 69 return cc; 70} 71 72/** 73 * do_siga_output - perform SIGA-w/wt function 74 * @schid: subchannel id or in case of QEBSM the subchannel token 75 * @mask: which output queues to process 76 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer 77 * @fc: function code to perform 78 * @aob: asynchronous operation block 79 * 80 * Returns condition code. 81 * Note: For IQDC unicast queues only the highest priority queue is processed. 82 */ 83static inline int do_siga_output(unsigned long schid, unsigned long mask, 84 unsigned int *bb, unsigned long fc, 85 unsigned long aob) 86{ 87 int cc; 88 89 asm volatile( 90 " lgr 0,%[fc]\n" 91 " lgr 1,%[schid]\n" 92 " lgr 2,%[mask]\n" 93 " lgr 3,%[aob]\n" 94 " siga 0\n" 95 " lgr %[fc],0\n" 96 " ipm %[cc]\n" 97 " srl %[cc],28\n" 98 : [cc] "=&d" (cc), [fc] "+&d" (fc) 99 : [schid] "d" (schid), [mask] "d" (mask), [aob] "d" (aob) 100 : "cc", "0", "1", "2", "3"); 101 *bb = fc >> 31; 102 return cc; 103} 104 105/** 106 * qdio_do_eqbs - extract buffer states for QEBSM 107 * @q: queue to manipulate 108 * @state: state of the extracted buffers 109 * @start: buffer number to start at 110 * @count: count of buffers to examine 111 * @auto_ack: automatically acknowledge buffers 112 * 113 * Returns the number of successfully extracted equal buffer states. 114 * Stops processing if a state is different from the last buffers state. 115 */ 116static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state, 117 int start, int count, int auto_ack) 118{ 119 int tmp_count = count, tmp_start = start, nr = q->nr; 120 unsigned int ccq = 0; 121 122 qperf_inc(q, eqbs); 123 124 if (!q->is_input_q) 125 nr += q->irq_ptr->nr_input_qs; 126again: 127 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count, 128 auto_ack); 129 130 switch (ccq) { 131 case 0: 132 case 32: 133 /* all done, or next buffer state different */ 134 return count - tmp_count; 135 case 96: 136 /* not all buffers processed */ 137 qperf_inc(q, eqbs_partial); 138 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "EQBS part:%02x", 139 tmp_count); 140 return count - tmp_count; 141 case 97: 142 /* no buffer processed */ 143 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq); 144 goto again; 145 default: 146 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); 147 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q)); 148 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 149 q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr, 150 q->first_to_check, count, q->irq_ptr->int_parm); 151 return 0; 152 } 153} 154 155/** 156 * qdio_do_sqbs - set buffer states for QEBSM 157 * @q: queue to manipulate 158 * @state: new state of the buffers 159 * @start: first buffer number to change 160 * @count: how many buffers to change 161 * 162 * Returns the number of successfully changed buffers. 163 * Does retrying until the specified count of buffer states is set or an 164 * error occurs. 165 */ 166static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start, 167 int count) 168{ 169 unsigned int ccq = 0; 170 int tmp_count = count, tmp_start = start; 171 int nr = q->nr; 172 173 if (!count) 174 return 0; 175 qperf_inc(q, sqbs); 176 177 if (!q->is_input_q) 178 nr += q->irq_ptr->nr_input_qs; 179again: 180 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count); 181 182 switch (ccq) { 183 case 0: 184 case 32: 185 /* all done, or active buffer adapter-owned */ 186 WARN_ON_ONCE(tmp_count); 187 return count - tmp_count; 188 case 96: 189 /* not all buffers processed */ 190 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq); 191 qperf_inc(q, sqbs_partial); 192 goto again; 193 default: 194 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); 195 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q)); 196 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 197 q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr, 198 q->first_to_check, count, q->irq_ptr->int_parm); 199 return 0; 200 } 201} 202 203/* 204 * Returns number of examined buffers and their common state in *state. 205 * Requested number of buffers-to-examine must be > 0. 206 */ 207static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr, 208 unsigned char *state, unsigned int count, 209 int auto_ack, int merge_pending) 210{ 211 unsigned char __state = 0; 212 int i = 1; 213 214 if (is_qebsm(q)) 215 return qdio_do_eqbs(q, state, bufnr, count, auto_ack); 216 217 /* get initial state: */ 218 __state = q->slsb.val[bufnr]; 219 220 /* Bail out early if there is no work on the queue: */ 221 if (__state & SLSB_OWNER_CU) 222 goto out; 223 224 if (merge_pending && __state == SLSB_P_OUTPUT_PENDING) 225 __state = SLSB_P_OUTPUT_EMPTY; 226 227 for (; i < count; i++) { 228 bufnr = next_buf(bufnr); 229 230 /* merge PENDING into EMPTY: */ 231 if (merge_pending && 232 q->slsb.val[bufnr] == SLSB_P_OUTPUT_PENDING && 233 __state == SLSB_P_OUTPUT_EMPTY) 234 continue; 235 236 /* stop if next state differs from initial state: */ 237 if (q->slsb.val[bufnr] != __state) 238 break; 239 } 240 241out: 242 *state = __state; 243 return i; 244} 245 246static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr, 247 unsigned char *state, int auto_ack) 248{ 249 return get_buf_states(q, bufnr, state, 1, auto_ack, 0); 250} 251 252/* wrap-around safe setting of slsb states, returns number of changed buffers */ 253static inline int set_buf_states(struct qdio_q *q, int bufnr, 254 unsigned char state, int count) 255{ 256 int i; 257 258 if (is_qebsm(q)) 259 return qdio_do_sqbs(q, state, bufnr, count); 260 261 /* Ensure that all preceding changes to the SBALs are visible: */ 262 mb(); 263 264 for (i = 0; i < count; i++) { 265 WRITE_ONCE(q->slsb.val[bufnr], state); 266 bufnr = next_buf(bufnr); 267 } 268 269 /* Make our SLSB changes visible: */ 270 mb(); 271 272 return count; 273} 274 275static inline int set_buf_state(struct qdio_q *q, int bufnr, 276 unsigned char state) 277{ 278 return set_buf_states(q, bufnr, state, 1); 279} 280 281/* set slsb states to initial state */ 282static void qdio_init_buf_states(struct qdio_irq *irq_ptr) 283{ 284 struct qdio_q *q; 285 int i; 286 287 for_each_input_queue(irq_ptr, q, i) 288 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT, 289 QDIO_MAX_BUFFERS_PER_Q); 290 for_each_output_queue(irq_ptr, q, i) 291 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT, 292 QDIO_MAX_BUFFERS_PER_Q); 293} 294 295static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output, 296 unsigned int input) 297{ 298 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 299 unsigned int fc = QDIO_SIGA_SYNC; 300 int cc; 301 302 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr); 303 qperf_inc(q, siga_sync); 304 305 if (is_qebsm(q)) { 306 schid = q->irq_ptr->sch_token; 307 fc |= QDIO_SIGA_QEBSM_FLAG; 308 } 309 310 cc = do_siga_sync(schid, output, input, fc); 311 if (unlikely(cc)) 312 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc); 313 return (cc) ? -EIO : 0; 314} 315 316static inline int qdio_siga_sync_q(struct qdio_q *q) 317{ 318 if (q->is_input_q) 319 return qdio_siga_sync(q, 0, q->mask); 320 else 321 return qdio_siga_sync(q, q->mask, 0); 322} 323 324static int qdio_siga_output(struct qdio_q *q, unsigned int count, 325 unsigned int *busy_bit, unsigned long aob) 326{ 327 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 328 unsigned int fc = QDIO_SIGA_WRITE; 329 u64 start_time = 0; 330 int retries = 0, cc; 331 332 if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q)) { 333 if (count > 1) 334 fc = QDIO_SIGA_WRITEM; 335 else if (aob) 336 fc = QDIO_SIGA_WRITEQ; 337 } 338 339 if (is_qebsm(q)) { 340 schid = q->irq_ptr->sch_token; 341 fc |= QDIO_SIGA_QEBSM_FLAG; 342 } 343again: 344 cc = do_siga_output(schid, q->mask, busy_bit, fc, aob); 345 346 /* hipersocket busy condition */ 347 if (unlikely(*busy_bit)) { 348 retries++; 349 350 if (!start_time) { 351 start_time = get_tod_clock_fast(); 352 goto again; 353 } 354 if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE) 355 goto again; 356 } 357 if (retries) { 358 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, 359 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr); 360 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries); 361 } 362 return cc; 363} 364 365static inline int qdio_siga_input(struct qdio_q *q) 366{ 367 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 368 unsigned int fc = QDIO_SIGA_READ; 369 int cc; 370 371 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr); 372 qperf_inc(q, siga_read); 373 374 if (is_qebsm(q)) { 375 schid = q->irq_ptr->sch_token; 376 fc |= QDIO_SIGA_QEBSM_FLAG; 377 } 378 379 cc = do_siga_input(schid, q->mask, fc); 380 if (unlikely(cc)) 381 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc); 382 return (cc) ? -EIO : 0; 383} 384 385#define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0) 386#define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U) 387 388static inline void qdio_sync_queues(struct qdio_q *q) 389{ 390 /* PCI capable outbound queues will also be scanned so sync them too */ 391 if (pci_out_supported(q->irq_ptr)) 392 qdio_siga_sync_all(q); 393 else 394 qdio_siga_sync_q(q); 395} 396 397int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr, 398 unsigned char *state) 399{ 400 if (need_siga_sync(q)) 401 qdio_siga_sync_q(q); 402 return get_buf_state(q, bufnr, state, 0); 403} 404 405static inline void qdio_stop_polling(struct qdio_q *q) 406{ 407 if (!q->u.in.batch_count) 408 return; 409 410 qperf_inc(q, stop_polling); 411 412 /* show the card that we are not polling anymore */ 413 set_buf_states(q, q->u.in.batch_start, SLSB_P_INPUT_NOT_INIT, 414 q->u.in.batch_count); 415 q->u.in.batch_count = 0; 416} 417 418static inline void account_sbals(struct qdio_q *q, unsigned int count) 419{ 420 q->q_stats.nr_sbal_total += count; 421 q->q_stats.nr_sbals[ilog2(count)]++; 422} 423 424static void process_buffer_error(struct qdio_q *q, unsigned int start, 425 int count) 426{ 427 q->qdio_error = QDIO_ERROR_SLSB_STATE; 428 429 /* special handling for no target buffer empty */ 430 if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q && 431 q->sbal[start]->element[15].sflags == 0x10) { 432 qperf_inc(q, target_full); 433 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", start); 434 return; 435 } 436 437 DBF_ERROR("%4x BUF ERROR", SCH_NO(q)); 438 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); 439 DBF_ERROR("FTC:%3d C:%3d", start, count); 440 DBF_ERROR("F14:%2x F15:%2x", 441 q->sbal[start]->element[14].sflags, 442 q->sbal[start]->element[15].sflags); 443} 444 445static inline void inbound_handle_work(struct qdio_q *q, unsigned int start, 446 int count, bool auto_ack) 447{ 448 /* ACK the newest SBAL: */ 449 if (!auto_ack) 450 set_buf_state(q, add_buf(start, count - 1), SLSB_P_INPUT_ACK); 451 452 if (!q->u.in.batch_count) 453 q->u.in.batch_start = start; 454 q->u.in.batch_count += count; 455} 456 457static int get_inbound_buffer_frontier(struct qdio_q *q, unsigned int start) 458{ 459 unsigned char state = 0; 460 int count; 461 462 q->timestamp = get_tod_clock_fast(); 463 464 count = atomic_read(&q->nr_buf_used); 465 if (!count) 466 return 0; 467 468 /* 469 * No siga sync here, as a PCI or we after a thin interrupt 470 * already sync'ed the queues. 471 */ 472 count = get_buf_states(q, start, &state, count, 1, 0); 473 if (!count) 474 return 0; 475 476 switch (state) { 477 case SLSB_P_INPUT_PRIMED: 478 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, 479 count); 480 481 inbound_handle_work(q, start, count, is_qebsm(q)); 482 if (atomic_sub_return(count, &q->nr_buf_used) == 0) 483 qperf_inc(q, inbound_queue_full); 484 if (q->irq_ptr->perf_stat_enabled) 485 account_sbals(q, count); 486 return count; 487 case SLSB_P_INPUT_ERROR: 488 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in err:%1d %02x", q->nr, 489 count); 490 491 process_buffer_error(q, start, count); 492 inbound_handle_work(q, start, count, false); 493 if (atomic_sub_return(count, &q->nr_buf_used) == 0) 494 qperf_inc(q, inbound_queue_full); 495 if (q->irq_ptr->perf_stat_enabled) 496 account_sbals_error(q, count); 497 return count; 498 case SLSB_CU_INPUT_EMPTY: 499 if (q->irq_ptr->perf_stat_enabled) 500 q->q_stats.nr_sbal_nop++; 501 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x", 502 q->nr, start); 503 return 0; 504 case SLSB_P_INPUT_NOT_INIT: 505 case SLSB_P_INPUT_ACK: 506 /* We should never see this state, throw a WARN: */ 507 default: 508 dev_WARN_ONCE(&q->irq_ptr->cdev->dev, 1, 509 "found state %#x at index %u on queue %u\n", 510 state, start, q->nr); 511 return 0; 512 } 513} 514 515static int qdio_inbound_q_moved(struct qdio_q *q, unsigned int start) 516{ 517 return get_inbound_buffer_frontier(q, start); 518} 519 520static inline int qdio_inbound_q_done(struct qdio_q *q, unsigned int start) 521{ 522 unsigned char state = 0; 523 524 if (!atomic_read(&q->nr_buf_used)) 525 return 1; 526 527 if (need_siga_sync(q)) 528 qdio_siga_sync_q(q); 529 get_buf_state(q, start, &state, 0); 530 531 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR) 532 /* more work coming */ 533 return 0; 534 535 return 1; 536} 537 538static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q, 539 int bufnr) 540{ 541 unsigned long phys_aob = 0; 542 543 if (!q->aobs[bufnr]) { 544 struct qaob *aob = qdio_allocate_aob(); 545 q->aobs[bufnr] = aob; 546 } 547 if (q->aobs[bufnr]) { 548 q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user; 549 phys_aob = virt_to_phys(q->aobs[bufnr]); 550 WARN_ON_ONCE(phys_aob & 0xFF); 551 } 552 553 q->sbal_state[bufnr].flags = 0; 554 return phys_aob; 555} 556 557static void qdio_kick_handler(struct qdio_q *q, unsigned int start, 558 unsigned int count) 559{ 560 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 561 return; 562 563 if (q->is_input_q) { 564 qperf_inc(q, inbound_handler); 565 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count); 566 } else { 567 qperf_inc(q, outbound_handler); 568 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x", 569 start, count); 570 } 571 572 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count, 573 q->irq_ptr->int_parm); 574 575 /* for the next time */ 576 q->qdio_error = 0; 577} 578 579static inline int qdio_tasklet_schedule(struct qdio_q *q) 580{ 581 if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) { 582 tasklet_schedule(&q->tasklet); 583 return 0; 584 } 585 return -EPERM; 586} 587 588static void __qdio_inbound_processing(struct qdio_q *q) 589{ 590 unsigned int start = q->first_to_check; 591 int count; 592 593 qperf_inc(q, tasklet_inbound); 594 595 count = qdio_inbound_q_moved(q, start); 596 if (count == 0) 597 return; 598 599 qdio_kick_handler(q, start, count); 600 start = add_buf(start, count); 601 q->first_to_check = start; 602 603 if (!qdio_inbound_q_done(q, start)) { 604 /* means poll time is not yet over */ 605 qperf_inc(q, tasklet_inbound_resched); 606 if (!qdio_tasklet_schedule(q)) 607 return; 608 } 609 610 qdio_stop_polling(q); 611 /* 612 * We need to check again to not lose initiative after 613 * resetting the ACK state. 614 */ 615 if (!qdio_inbound_q_done(q, start)) { 616 qperf_inc(q, tasklet_inbound_resched2); 617 qdio_tasklet_schedule(q); 618 } 619} 620 621void qdio_inbound_processing(unsigned long data) 622{ 623 struct qdio_q *q = (struct qdio_q *)data; 624 __qdio_inbound_processing(q); 625} 626 627static void qdio_check_pending(struct qdio_q *q, unsigned int index) 628{ 629 unsigned char state; 630 631 if (get_buf_state(q, index, &state, 0) > 0 && 632 state == SLSB_P_OUTPUT_PENDING && 633 q->u.out.aobs[index]) { 634 q->u.out.sbal_state[index].flags |= 635 QDIO_OUTBUF_STATE_FLAG_PENDING; 636 q->u.out.aobs[index] = NULL; 637 } 638} 639 640static int get_outbound_buffer_frontier(struct qdio_q *q, unsigned int start) 641{ 642 unsigned char state = 0; 643 int count; 644 645 q->timestamp = get_tod_clock_fast(); 646 647 if (need_siga_sync(q)) 648 if (((queue_type(q) != QDIO_IQDIO_QFMT) && 649 !pci_out_supported(q->irq_ptr)) || 650 (queue_type(q) == QDIO_IQDIO_QFMT && 651 multicast_outbound(q))) 652 qdio_siga_sync_q(q); 653 654 count = atomic_read(&q->nr_buf_used); 655 if (!count) 656 return 0; 657 658 count = get_buf_states(q, start, &state, count, 0, q->u.out.use_cq); 659 if (!count) 660 return 0; 661 662 switch (state) { 663 case SLSB_P_OUTPUT_EMPTY: 664 case SLSB_P_OUTPUT_PENDING: 665 /* the adapter got it */ 666 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, 667 "out empty:%1d %02x", q->nr, count); 668 669 atomic_sub(count, &q->nr_buf_used); 670 if (q->irq_ptr->perf_stat_enabled) 671 account_sbals(q, count); 672 return count; 673 case SLSB_P_OUTPUT_ERROR: 674 process_buffer_error(q, start, count); 675 atomic_sub(count, &q->nr_buf_used); 676 if (q->irq_ptr->perf_stat_enabled) 677 account_sbals_error(q, count); 678 return count; 679 case SLSB_CU_OUTPUT_PRIMED: 680 /* the adapter has not fetched the output yet */ 681 if (q->irq_ptr->perf_stat_enabled) 682 q->q_stats.nr_sbal_nop++; 683 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", 684 q->nr); 685 return 0; 686 case SLSB_P_OUTPUT_HALTED: 687 return 0; 688 case SLSB_P_OUTPUT_NOT_INIT: 689 /* We should never see this state, throw a WARN: */ 690 default: 691 dev_WARN_ONCE(&q->irq_ptr->cdev->dev, 1, 692 "found state %#x at index %u on queue %u\n", 693 state, start, q->nr); 694 return 0; 695 } 696} 697 698/* all buffers processed? */ 699static inline int qdio_outbound_q_done(struct qdio_q *q) 700{ 701 return atomic_read(&q->nr_buf_used) == 0; 702} 703 704static inline int qdio_outbound_q_moved(struct qdio_q *q, unsigned int start) 705{ 706 int count; 707 708 count = get_outbound_buffer_frontier(q, start); 709 710 if (count) { 711 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr); 712 713 if (q->u.out.use_cq) { 714 unsigned int i; 715 716 for (i = 0; i < count; i++) 717 qdio_check_pending(q, QDIO_BUFNR(start + i)); 718 } 719 } 720 721 return count; 722} 723 724static int qdio_kick_outbound_q(struct qdio_q *q, unsigned int count, 725 unsigned long aob) 726{ 727 int retries = 0, cc; 728 unsigned int busy_bit; 729 730 if (!need_siga_out(q)) 731 return 0; 732 733 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr); 734retry: 735 qperf_inc(q, siga_write); 736 737 cc = qdio_siga_output(q, count, &busy_bit, aob); 738 switch (cc) { 739 case 0: 740 break; 741 case 2: 742 if (busy_bit) { 743 while (++retries < QDIO_BUSY_BIT_RETRIES) { 744 mdelay(QDIO_BUSY_BIT_RETRY_DELAY); 745 goto retry; 746 } 747 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr); 748 cc = -EBUSY; 749 } else { 750 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr); 751 cc = -ENOBUFS; 752 } 753 break; 754 case 1: 755 case 3: 756 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc); 757 cc = -EIO; 758 break; 759 } 760 if (retries) { 761 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr); 762 DBF_ERROR("count:%u", retries); 763 } 764 return cc; 765} 766 767static void __qdio_outbound_processing(struct qdio_q *q) 768{ 769 unsigned int start = q->first_to_check; 770 int count; 771 772 qperf_inc(q, tasklet_outbound); 773 WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0); 774 775 count = qdio_outbound_q_moved(q, start); 776 if (count) { 777 q->first_to_check = add_buf(start, count); 778 qdio_kick_handler(q, start, count); 779 } 780 781 if (queue_type(q) == QDIO_ZFCP_QFMT && !pci_out_supported(q->irq_ptr) && 782 !qdio_outbound_q_done(q)) 783 goto sched; 784 785 if (q->u.out.pci_out_enabled) 786 return; 787 788 /* 789 * Now we know that queue type is either qeth without pci enabled 790 * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY 791 * is noticed and outbound_handler is called after some time. 792 */ 793 if (qdio_outbound_q_done(q)) 794 del_timer_sync(&q->u.out.timer); 795 else 796 if (!timer_pending(&q->u.out.timer) && 797 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) 798 mod_timer(&q->u.out.timer, jiffies + 10 * HZ); 799 return; 800 801sched: 802 qdio_tasklet_schedule(q); 803} 804 805/* outbound tasklet */ 806void qdio_outbound_processing(unsigned long data) 807{ 808 struct qdio_q *q = (struct qdio_q *)data; 809 __qdio_outbound_processing(q); 810} 811 812void qdio_outbound_timer(struct timer_list *t) 813{ 814 struct qdio_q *q = from_timer(q, t, u.out.timer); 815 816 qdio_tasklet_schedule(q); 817} 818 819static inline void qdio_check_outbound_pci_queues(struct qdio_irq *irq) 820{ 821 struct qdio_q *out; 822 int i; 823 824 if (!pci_out_supported(irq) || !irq->scan_threshold) 825 return; 826 827 for_each_output_queue(irq, out, i) 828 if (!qdio_outbound_q_done(out)) 829 qdio_tasklet_schedule(out); 830} 831 832void tiqdio_inbound_processing(unsigned long data) 833{ 834 struct qdio_q *q = (struct qdio_q *)data; 835 836 if (need_siga_sync(q) && need_siga_sync_after_ai(q)) 837 qdio_sync_queues(q); 838 839 /* The interrupt could be caused by a PCI request: */ 840 qdio_check_outbound_pci_queues(q->irq_ptr); 841 842 __qdio_inbound_processing(q); 843} 844 845static inline void qdio_set_state(struct qdio_irq *irq_ptr, 846 enum qdio_irq_states state) 847{ 848 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state); 849 850 irq_ptr->state = state; 851 mb(); 852} 853 854static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb) 855{ 856 if (irb->esw.esw0.erw.cons) { 857 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no); 858 DBF_ERROR_HEX(irb, 64); 859 DBF_ERROR_HEX(irb->ecw, 64); 860 } 861} 862 863/* PCI interrupt handler */ 864static void qdio_int_handler_pci(struct qdio_irq *irq_ptr) 865{ 866 int i; 867 struct qdio_q *q; 868 869 if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 870 return; 871 872 if (irq_ptr->irq_poll) { 873 if (!test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state)) 874 irq_ptr->irq_poll(irq_ptr->cdev, irq_ptr->int_parm); 875 else 876 QDIO_PERF_STAT_INC(irq_ptr, int_discarded); 877 } else { 878 for_each_input_queue(irq_ptr, q, i) 879 tasklet_schedule(&q->tasklet); 880 } 881 882 if (!pci_out_supported(irq_ptr) || !irq_ptr->scan_threshold) 883 return; 884 885 for_each_output_queue(irq_ptr, q, i) { 886 if (qdio_outbound_q_done(q)) 887 continue; 888 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q)) 889 qdio_siga_sync_q(q); 890 qdio_tasklet_schedule(q); 891 } 892} 893 894static void qdio_handle_activate_check(struct qdio_irq *irq_ptr, 895 unsigned long intparm, int cstat, 896 int dstat) 897{ 898 struct qdio_q *q; 899 900 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no); 901 DBF_ERROR("intp :%lx", intparm); 902 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 903 904 if (irq_ptr->nr_input_qs) { 905 q = irq_ptr->input_qs[0]; 906 } else if (irq_ptr->nr_output_qs) { 907 q = irq_ptr->output_qs[0]; 908 } else { 909 dump_stack(); 910 goto no_handler; 911 } 912 913 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE, 914 q->nr, q->first_to_check, 0, irq_ptr->int_parm); 915no_handler: 916 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 917 /* 918 * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen. 919 * Therefore we call the LGR detection function here. 920 */ 921 lgr_info_log(); 922} 923 924static void qdio_establish_handle_irq(struct qdio_irq *irq_ptr, int cstat, 925 int dstat) 926{ 927 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq"); 928 929 if (cstat) 930 goto error; 931 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END)) 932 goto error; 933 if (!(dstat & DEV_STAT_DEV_END)) 934 goto error; 935 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED); 936 return; 937 938error: 939 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no); 940 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 941 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 942} 943 944/* qdio interrupt handler */ 945void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, 946 struct irb *irb) 947{ 948 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 949 struct subchannel_id schid; 950 int cstat, dstat; 951 952 if (!intparm || !irq_ptr) { 953 ccw_device_get_schid(cdev, &schid); 954 DBF_ERROR("qint:%4x", schid.sch_no); 955 return; 956 } 957 958 if (irq_ptr->perf_stat_enabled) 959 irq_ptr->perf_stat.qdio_int++; 960 961 if (IS_ERR(irb)) { 962 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no); 963 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 964 wake_up(&cdev->private->wait_q); 965 return; 966 } 967 qdio_irq_check_sense(irq_ptr, irb); 968 cstat = irb->scsw.cmd.cstat; 969 dstat = irb->scsw.cmd.dstat; 970 971 switch (irq_ptr->state) { 972 case QDIO_IRQ_STATE_INACTIVE: 973 qdio_establish_handle_irq(irq_ptr, cstat, dstat); 974 break; 975 case QDIO_IRQ_STATE_CLEANUP: 976 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 977 break; 978 case QDIO_IRQ_STATE_ESTABLISHED: 979 case QDIO_IRQ_STATE_ACTIVE: 980 if (cstat & SCHN_STAT_PCI) { 981 qdio_int_handler_pci(irq_ptr); 982 return; 983 } 984 if (cstat || dstat) 985 qdio_handle_activate_check(irq_ptr, intparm, cstat, 986 dstat); 987 break; 988 case QDIO_IRQ_STATE_STOPPED: 989 break; 990 default: 991 WARN_ON_ONCE(1); 992 } 993 wake_up(&cdev->private->wait_q); 994} 995 996/** 997 * qdio_get_ssqd_desc - get qdio subchannel description 998 * @cdev: ccw device to get description for 999 * @data: where to store the ssqd 1000 * 1001 * Returns 0 or an error code. The results of the chsc are stored in the 1002 * specified structure. 1003 */ 1004int qdio_get_ssqd_desc(struct ccw_device *cdev, 1005 struct qdio_ssqd_desc *data) 1006{ 1007 struct subchannel_id schid; 1008 1009 if (!cdev || !cdev->private) 1010 return -EINVAL; 1011 1012 ccw_device_get_schid(cdev, &schid); 1013 DBF_EVENT("get ssqd:%4x", schid.sch_no); 1014 return qdio_setup_get_ssqd(NULL, &schid, data); 1015} 1016EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc); 1017 1018static void qdio_shutdown_queues(struct qdio_irq *irq_ptr) 1019{ 1020 struct qdio_q *q; 1021 int i; 1022 1023 for_each_input_queue(irq_ptr, q, i) 1024 tasklet_kill(&q->tasklet); 1025 1026 for_each_output_queue(irq_ptr, q, i) { 1027 del_timer_sync(&q->u.out.timer); 1028 tasklet_kill(&q->tasklet); 1029 } 1030} 1031 1032static int qdio_cancel_ccw(struct qdio_irq *irq, int how) 1033{ 1034 struct ccw_device *cdev = irq->cdev; 1035 int rc; 1036 1037 spin_lock_irq(get_ccwdev_lock(cdev)); 1038 qdio_set_state(irq, QDIO_IRQ_STATE_CLEANUP); 1039 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR) 1040 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP); 1041 else 1042 /* default behaviour is halt */ 1043 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP); 1044 spin_unlock_irq(get_ccwdev_lock(cdev)); 1045 if (rc) { 1046 DBF_ERROR("%4x SHUTD ERR", irq->schid.sch_no); 1047 DBF_ERROR("rc:%4d", rc); 1048 return rc; 1049 } 1050 1051 wait_event_interruptible_timeout(cdev->private->wait_q, 1052 irq->state == QDIO_IRQ_STATE_INACTIVE || 1053 irq->state == QDIO_IRQ_STATE_ERR, 1054 10 * HZ); 1055 1056 return 0; 1057} 1058 1059/** 1060 * qdio_shutdown - shut down a qdio subchannel 1061 * @cdev: associated ccw device 1062 * @how: use halt or clear to shutdown 1063 */ 1064int qdio_shutdown(struct ccw_device *cdev, int how) 1065{ 1066 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1067 struct subchannel_id schid; 1068 int rc; 1069 1070 if (!irq_ptr) 1071 return -ENODEV; 1072 1073 WARN_ON_ONCE(irqs_disabled()); 1074 ccw_device_get_schid(cdev, &schid); 1075 DBF_EVENT("qshutdown:%4x", schid.sch_no); 1076 1077 mutex_lock(&irq_ptr->setup_mutex); 1078 /* 1079 * Subchannel was already shot down. We cannot prevent being called 1080 * twice since cio may trigger a shutdown asynchronously. 1081 */ 1082 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1083 mutex_unlock(&irq_ptr->setup_mutex); 1084 return 0; 1085 } 1086 1087 /* 1088 * Indicate that the device is going down. Scheduling the queue 1089 * tasklets is forbidden from here on. 1090 */ 1091 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 1092 1093 tiqdio_remove_device(irq_ptr); 1094 qdio_shutdown_queues(irq_ptr); 1095 qdio_shutdown_debug_entries(irq_ptr); 1096 1097 rc = qdio_cancel_ccw(irq_ptr, how); 1098 qdio_shutdown_thinint(irq_ptr); 1099 qdio_shutdown_irq(irq_ptr); 1100 1101 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1102 mutex_unlock(&irq_ptr->setup_mutex); 1103 if (rc) 1104 return rc; 1105 return 0; 1106} 1107EXPORT_SYMBOL_GPL(qdio_shutdown); 1108 1109/** 1110 * qdio_free - free data structures for a qdio subchannel 1111 * @cdev: associated ccw device 1112 */ 1113int qdio_free(struct ccw_device *cdev) 1114{ 1115 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1116 struct subchannel_id schid; 1117 1118 if (!irq_ptr) 1119 return -ENODEV; 1120 1121 ccw_device_get_schid(cdev, &schid); 1122 DBF_EVENT("qfree:%4x", schid.sch_no); 1123 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned"); 1124 mutex_lock(&irq_ptr->setup_mutex); 1125 1126 irq_ptr->debug_area = NULL; 1127 cdev->private->qdio_data = NULL; 1128 mutex_unlock(&irq_ptr->setup_mutex); 1129 1130 qdio_free_async_data(irq_ptr); 1131 qdio_free_queues(irq_ptr); 1132 free_page((unsigned long) irq_ptr->qdr); 1133 free_page(irq_ptr->chsc_page); 1134 free_page((unsigned long) irq_ptr); 1135 return 0; 1136} 1137EXPORT_SYMBOL_GPL(qdio_free); 1138 1139/** 1140 * qdio_allocate - allocate qdio queues and associated data 1141 * @cdev: associated ccw device 1142 * @no_input_qs: allocate this number of Input Queues 1143 * @no_output_qs: allocate this number of Output Queues 1144 */ 1145int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs, 1146 unsigned int no_output_qs) 1147{ 1148 struct subchannel_id schid; 1149 struct qdio_irq *irq_ptr; 1150 int rc = -ENOMEM; 1151 1152 ccw_device_get_schid(cdev, &schid); 1153 DBF_EVENT("qallocate:%4x", schid.sch_no); 1154 1155 if (no_input_qs > QDIO_MAX_QUEUES_PER_IRQ || 1156 no_output_qs > QDIO_MAX_QUEUES_PER_IRQ) 1157 return -EINVAL; 1158 1159 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */ 1160 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1161 if (!irq_ptr) 1162 return -ENOMEM; 1163 1164 irq_ptr->cdev = cdev; 1165 mutex_init(&irq_ptr->setup_mutex); 1166 if (qdio_allocate_dbf(irq_ptr)) 1167 goto err_dbf; 1168 1169 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "alloc niq:%1u noq:%1u", no_input_qs, 1170 no_output_qs); 1171 1172 /* 1173 * Allocate a page for the chsc calls in qdio_establish. 1174 * Must be pre-allocated since a zfcp recovery will call 1175 * qdio_establish. In case of low memory and swap on a zfcp disk 1176 * we may not be able to allocate memory otherwise. 1177 */ 1178 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL); 1179 if (!irq_ptr->chsc_page) 1180 goto err_chsc; 1181 1182 /* qdr is used in ccw1.cda which is u32 */ 1183 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1184 if (!irq_ptr->qdr) 1185 goto err_qdr; 1186 1187 rc = qdio_allocate_qs(irq_ptr, no_input_qs, no_output_qs); 1188 if (rc) 1189 goto err_queues; 1190 1191 INIT_LIST_HEAD(&irq_ptr->entry); 1192 cdev->private->qdio_data = irq_ptr; 1193 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1194 return 0; 1195 1196err_queues: 1197 free_page((unsigned long) irq_ptr->qdr); 1198err_qdr: 1199 free_page(irq_ptr->chsc_page); 1200err_chsc: 1201err_dbf: 1202 free_page((unsigned long) irq_ptr); 1203 return rc; 1204} 1205EXPORT_SYMBOL_GPL(qdio_allocate); 1206 1207static void qdio_detect_hsicq(struct qdio_irq *irq_ptr) 1208{ 1209 struct qdio_q *q = irq_ptr->input_qs[0]; 1210 int i, use_cq = 0; 1211 1212 if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT) 1213 use_cq = 1; 1214 1215 for_each_output_queue(irq_ptr, q, i) { 1216 if (use_cq) { 1217 if (multicast_outbound(q)) 1218 continue; 1219 if (qdio_enable_async_operation(&q->u.out) < 0) { 1220 use_cq = 0; 1221 continue; 1222 } 1223 } else 1224 qdio_disable_async_operation(&q->u.out); 1225 } 1226 DBF_EVENT("use_cq:%d", use_cq); 1227} 1228 1229static void qdio_trace_init_data(struct qdio_irq *irq, 1230 struct qdio_initialize *data) 1231{ 1232 DBF_DEV_EVENT(DBF_ERR, irq, "qfmt:%1u", data->q_format); 1233 DBF_DEV_EVENT(DBF_ERR, irq, "qpff%4x", data->qib_param_field_format); 1234 DBF_DEV_HEX(irq, &data->qib_param_field, sizeof(void *), DBF_ERR); 1235 DBF_DEV_HEX(irq, &data->input_slib_elements, sizeof(void *), DBF_ERR); 1236 DBF_DEV_HEX(irq, &data->output_slib_elements, sizeof(void *), DBF_ERR); 1237 DBF_DEV_EVENT(DBF_ERR, irq, "niq:%1u noq:%1u", data->no_input_qs, 1238 data->no_output_qs); 1239 DBF_DEV_HEX(irq, &data->input_handler, sizeof(void *), DBF_ERR); 1240 DBF_DEV_HEX(irq, &data->output_handler, sizeof(void *), DBF_ERR); 1241 DBF_DEV_HEX(irq, &data->int_parm, sizeof(long), DBF_ERR); 1242 DBF_DEV_HEX(irq, &data->input_sbal_addr_array, sizeof(void *), DBF_ERR); 1243 DBF_DEV_HEX(irq, &data->output_sbal_addr_array, sizeof(void *), 1244 DBF_ERR); 1245} 1246 1247/** 1248 * qdio_establish - establish queues on a qdio subchannel 1249 * @cdev: associated ccw device 1250 * @init_data: initialization data 1251 */ 1252int qdio_establish(struct ccw_device *cdev, 1253 struct qdio_initialize *init_data) 1254{ 1255 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1256 struct subchannel_id schid; 1257 long timeout; 1258 int rc; 1259 1260 ccw_device_get_schid(cdev, &schid); 1261 DBF_EVENT("qestablish:%4x", schid.sch_no); 1262 1263 if (!irq_ptr) 1264 return -ENODEV; 1265 1266 if (init_data->no_input_qs > irq_ptr->max_input_qs || 1267 init_data->no_output_qs > irq_ptr->max_output_qs) 1268 return -EINVAL; 1269 1270 if ((init_data->no_input_qs && !init_data->input_handler) || 1271 (init_data->no_output_qs && !init_data->output_handler)) 1272 return -EINVAL; 1273 1274 if (!init_data->input_sbal_addr_array || 1275 !init_data->output_sbal_addr_array) 1276 return -EINVAL; 1277 1278 mutex_lock(&irq_ptr->setup_mutex); 1279 qdio_trace_init_data(irq_ptr, init_data); 1280 qdio_setup_irq(irq_ptr, init_data); 1281 1282 rc = qdio_establish_thinint(irq_ptr); 1283 if (rc) 1284 goto err_thinint; 1285 1286 /* establish q */ 1287 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd; 1288 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1289 irq_ptr->ccw.count = irq_ptr->equeue.count; 1290 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr); 1291 1292 spin_lock_irq(get_ccwdev_lock(cdev)); 1293 ccw_device_set_options_mask(cdev, 0); 1294 1295 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0); 1296 spin_unlock_irq(get_ccwdev_lock(cdev)); 1297 if (rc) { 1298 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no); 1299 DBF_ERROR("rc:%4x", rc); 1300 goto err_ccw_start; 1301 } 1302 1303 timeout = wait_event_interruptible_timeout(cdev->private->wait_q, 1304 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED || 1305 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ); 1306 if (timeout <= 0) { 1307 rc = (timeout == -ERESTARTSYS) ? -EINTR : -ETIME; 1308 goto err_ccw_timeout; 1309 } 1310 1311 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) { 1312 mutex_unlock(&irq_ptr->setup_mutex); 1313 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1314 return -EIO; 1315 } 1316 1317 qdio_setup_ssqd_info(irq_ptr); 1318 1319 qdio_detect_hsicq(irq_ptr); 1320 1321 /* qebsm is now setup if available, initialize buffer states */ 1322 qdio_init_buf_states(irq_ptr); 1323 1324 mutex_unlock(&irq_ptr->setup_mutex); 1325 qdio_print_subchannel_info(irq_ptr); 1326 qdio_setup_debug_entries(irq_ptr); 1327 return 0; 1328 1329err_ccw_timeout: 1330 qdio_cancel_ccw(irq_ptr, QDIO_FLAG_CLEANUP_USING_CLEAR); 1331err_ccw_start: 1332 qdio_shutdown_thinint(irq_ptr); 1333err_thinint: 1334 qdio_shutdown_irq(irq_ptr); 1335 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1336 mutex_unlock(&irq_ptr->setup_mutex); 1337 return rc; 1338} 1339EXPORT_SYMBOL_GPL(qdio_establish); 1340 1341/** 1342 * qdio_activate - activate queues on a qdio subchannel 1343 * @cdev: associated cdev 1344 */ 1345int qdio_activate(struct ccw_device *cdev) 1346{ 1347 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1348 struct subchannel_id schid; 1349 int rc; 1350 1351 ccw_device_get_schid(cdev, &schid); 1352 DBF_EVENT("qactivate:%4x", schid.sch_no); 1353 1354 if (!irq_ptr) 1355 return -ENODEV; 1356 1357 mutex_lock(&irq_ptr->setup_mutex); 1358 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1359 rc = -EBUSY; 1360 goto out; 1361 } 1362 1363 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd; 1364 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1365 irq_ptr->ccw.count = irq_ptr->aqueue.count; 1366 irq_ptr->ccw.cda = 0; 1367 1368 spin_lock_irq(get_ccwdev_lock(cdev)); 1369 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL); 1370 1371 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE, 1372 0, DOIO_DENY_PREFETCH); 1373 spin_unlock_irq(get_ccwdev_lock(cdev)); 1374 if (rc) { 1375 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no); 1376 DBF_ERROR("rc:%4x", rc); 1377 goto out; 1378 } 1379 1380 if (is_thinint_irq(irq_ptr)) 1381 tiqdio_add_device(irq_ptr); 1382 1383 /* wait for subchannel to become active */ 1384 msleep(5); 1385 1386 switch (irq_ptr->state) { 1387 case QDIO_IRQ_STATE_STOPPED: 1388 case QDIO_IRQ_STATE_ERR: 1389 rc = -EIO; 1390 break; 1391 default: 1392 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE); 1393 rc = 0; 1394 } 1395out: 1396 mutex_unlock(&irq_ptr->setup_mutex); 1397 return rc; 1398} 1399EXPORT_SYMBOL_GPL(qdio_activate); 1400 1401/** 1402 * handle_inbound - reset processed input buffers 1403 * @q: queue containing the buffers 1404 * @callflags: flags 1405 * @bufnr: first buffer to process 1406 * @count: how many buffers are emptied 1407 */ 1408static int handle_inbound(struct qdio_q *q, unsigned int callflags, 1409 int bufnr, int count) 1410{ 1411 int overlap; 1412 1413 qperf_inc(q, inbound_call); 1414 1415 /* If any processed SBALs are returned to HW, adjust our tracking: */ 1416 overlap = min_t(int, count - sub_buf(q->u.in.batch_start, bufnr), 1417 q->u.in.batch_count); 1418 if (overlap > 0) { 1419 q->u.in.batch_start = add_buf(q->u.in.batch_start, overlap); 1420 q->u.in.batch_count -= overlap; 1421 } 1422 1423 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count); 1424 atomic_add(count, &q->nr_buf_used); 1425 1426 if (need_siga_in(q)) 1427 return qdio_siga_input(q); 1428 1429 return 0; 1430} 1431 1432/** 1433 * handle_outbound - process filled outbound buffers 1434 * @q: queue containing the buffers 1435 * @callflags: flags 1436 * @bufnr: first buffer to process 1437 * @count: how many buffers are filled 1438 */ 1439static int handle_outbound(struct qdio_q *q, unsigned int callflags, 1440 unsigned int bufnr, unsigned int count) 1441{ 1442 const unsigned int scan_threshold = q->irq_ptr->scan_threshold; 1443 unsigned char state = 0; 1444 int used, rc = 0; 1445 1446 qperf_inc(q, outbound_call); 1447 1448 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count); 1449 used = atomic_add_return(count, &q->nr_buf_used); 1450 1451 if (used == QDIO_MAX_BUFFERS_PER_Q) 1452 qperf_inc(q, outbound_queue_full); 1453 1454 if (callflags & QDIO_FLAG_PCI_OUT) { 1455 q->u.out.pci_out_enabled = 1; 1456 qperf_inc(q, pci_request_int); 1457 } else 1458 q->u.out.pci_out_enabled = 0; 1459 1460 if (queue_type(q) == QDIO_IQDIO_QFMT) { 1461 unsigned long phys_aob = 0; 1462 1463 if (q->u.out.use_cq && count == 1) 1464 phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr); 1465 1466 rc = qdio_kick_outbound_q(q, count, phys_aob); 1467 } else if (need_siga_sync(q)) { 1468 rc = qdio_siga_sync_q(q); 1469 } else if (count < QDIO_MAX_BUFFERS_PER_Q && 1470 get_buf_state(q, prev_buf(bufnr), &state, 0) > 0 && 1471 state == SLSB_CU_OUTPUT_PRIMED) { 1472 /* The previous buffer is not processed yet, tack on. */ 1473 qperf_inc(q, fast_requeue); 1474 } else { 1475 rc = qdio_kick_outbound_q(q, count, 0); 1476 } 1477 1478 /* Let drivers implement their own completion scanning: */ 1479 if (!scan_threshold) 1480 return rc; 1481 1482 /* in case of SIGA errors we must process the error immediately */ 1483 if (used >= scan_threshold || rc) 1484 qdio_tasklet_schedule(q); 1485 else 1486 /* free the SBALs in case of no further traffic */ 1487 if (!timer_pending(&q->u.out.timer) && 1488 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) 1489 mod_timer(&q->u.out.timer, jiffies + HZ); 1490 return rc; 1491} 1492 1493/** 1494 * do_QDIO - process input or output buffers 1495 * @cdev: associated ccw_device for the qdio subchannel 1496 * @callflags: input or output and special flags from the program 1497 * @q_nr: queue number 1498 * @bufnr: buffer number 1499 * @count: how many buffers to process 1500 */ 1501int do_QDIO(struct ccw_device *cdev, unsigned int callflags, 1502 int q_nr, unsigned int bufnr, unsigned int count) 1503{ 1504 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1505 1506 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q) 1507 return -EINVAL; 1508 1509 if (!irq_ptr) 1510 return -ENODEV; 1511 1512 DBF_DEV_EVENT(DBF_INFO, irq_ptr, 1513 "do%02x b:%02x c:%02x", callflags, bufnr, count); 1514 1515 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE) 1516 return -EIO; 1517 if (!count) 1518 return 0; 1519 if (callflags & QDIO_FLAG_SYNC_INPUT) 1520 return handle_inbound(irq_ptr->input_qs[q_nr], 1521 callflags, bufnr, count); 1522 else if (callflags & QDIO_FLAG_SYNC_OUTPUT) 1523 return handle_outbound(irq_ptr->output_qs[q_nr], 1524 callflags, bufnr, count); 1525 return -EINVAL; 1526} 1527EXPORT_SYMBOL_GPL(do_QDIO); 1528 1529/** 1530 * qdio_start_irq - enable interrupt processing for the device 1531 * @cdev: associated ccw_device for the qdio subchannel 1532 * 1533 * Return codes 1534 * 0 - success 1535 * 1 - irqs not started since new data is available 1536 */ 1537int qdio_start_irq(struct ccw_device *cdev) 1538{ 1539 struct qdio_q *q; 1540 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1541 unsigned int i; 1542 1543 if (!irq_ptr) 1544 return -ENODEV; 1545 1546 for_each_input_queue(irq_ptr, q, i) 1547 qdio_stop_polling(q); 1548 1549 clear_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state); 1550 1551 /* 1552 * We need to check again to not lose initiative after 1553 * resetting the ACK state. 1554 */ 1555 if (test_nonshared_ind(irq_ptr)) 1556 goto rescan; 1557 1558 for_each_input_queue(irq_ptr, q, i) { 1559 if (!qdio_inbound_q_done(q, q->first_to_check)) 1560 goto rescan; 1561 } 1562 1563 return 0; 1564 1565rescan: 1566 if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state)) 1567 return 0; 1568 else 1569 return 1; 1570 1571} 1572EXPORT_SYMBOL(qdio_start_irq); 1573 1574static int __qdio_inspect_queue(struct qdio_q *q, unsigned int *bufnr, 1575 unsigned int *error) 1576{ 1577 unsigned int start = q->first_to_check; 1578 int count; 1579 1580 count = q->is_input_q ? qdio_inbound_q_moved(q, start) : 1581 qdio_outbound_q_moved(q, start); 1582 if (count == 0) 1583 return 0; 1584 1585 *bufnr = start; 1586 *error = q->qdio_error; 1587 1588 /* for the next time */ 1589 q->first_to_check = add_buf(start, count); 1590 q->qdio_error = 0; 1591 1592 return count; 1593} 1594 1595int qdio_inspect_queue(struct ccw_device *cdev, unsigned int nr, bool is_input, 1596 unsigned int *bufnr, unsigned int *error) 1597{ 1598 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1599 struct qdio_q *q; 1600 1601 if (!irq_ptr) 1602 return -ENODEV; 1603 q = is_input ? irq_ptr->input_qs[nr] : irq_ptr->output_qs[nr]; 1604 1605 if (need_siga_sync(q)) 1606 qdio_siga_sync_q(q); 1607 1608 return __qdio_inspect_queue(q, bufnr, error); 1609} 1610EXPORT_SYMBOL_GPL(qdio_inspect_queue); 1611 1612/** 1613 * qdio_get_next_buffers - process input buffers 1614 * @cdev: associated ccw_device for the qdio subchannel 1615 * @nr: input queue number 1616 * @bufnr: first filled buffer number 1617 * @error: buffers are in error state 1618 * 1619 * Return codes 1620 * < 0 - error 1621 * = 0 - no new buffers found 1622 * > 0 - number of processed buffers 1623 */ 1624int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr, 1625 int *error) 1626{ 1627 struct qdio_q *q; 1628 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1629 1630 if (!irq_ptr) 1631 return -ENODEV; 1632 q = irq_ptr->input_qs[nr]; 1633 1634 /* 1635 * Cannot rely on automatic sync after interrupt since queues may 1636 * also be examined without interrupt. 1637 */ 1638 if (need_siga_sync(q)) 1639 qdio_sync_queues(q); 1640 1641 qdio_check_outbound_pci_queues(irq_ptr); 1642 1643 /* Note: upper-layer MUST stop processing immediately here ... */ 1644 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 1645 return -EIO; 1646 1647 return __qdio_inspect_queue(q, bufnr, error); 1648} 1649EXPORT_SYMBOL(qdio_get_next_buffers); 1650 1651/** 1652 * qdio_stop_irq - disable interrupt processing for the device 1653 * @cdev: associated ccw_device for the qdio subchannel 1654 * 1655 * Return codes 1656 * 0 - interrupts were already disabled 1657 * 1 - interrupts successfully disabled 1658 */ 1659int qdio_stop_irq(struct ccw_device *cdev) 1660{ 1661 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1662 1663 if (!irq_ptr) 1664 return -ENODEV; 1665 1666 if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state)) 1667 return 0; 1668 else 1669 return 1; 1670} 1671EXPORT_SYMBOL(qdio_stop_irq); 1672 1673static int __init init_QDIO(void) 1674{ 1675 int rc; 1676 1677 rc = qdio_debug_init(); 1678 if (rc) 1679 return rc; 1680 rc = qdio_setup_init(); 1681 if (rc) 1682 goto out_debug; 1683 rc = qdio_thinint_init(); 1684 if (rc) 1685 goto out_cache; 1686 return 0; 1687 1688out_cache: 1689 qdio_setup_exit(); 1690out_debug: 1691 qdio_debug_exit(); 1692 return rc; 1693} 1694 1695static void __exit exit_QDIO(void) 1696{ 1697 qdio_thinint_exit(); 1698 qdio_setup_exit(); 1699 qdio_debug_exit(); 1700} 1701 1702module_init(init_QDIO); 1703module_exit(exit_QDIO); 1704