1// SPDX-License-Identifier: GPL-2.0-only 2/* drivers/rtc/rtc-s3c.c 3 * 4 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com/ 6 * 7 * Copyright (c) 2004,2006 Simtec Electronics 8 * Ben Dooks, <ben@simtec.co.uk> 9 * http://armlinux.simtec.co.uk/ 10 * 11 * S3C2410/S3C2440/S3C24XX Internal RTC Driver 12*/ 13 14#include <linux/module.h> 15#include <linux/fs.h> 16#include <linux/string.h> 17#include <linux/init.h> 18#include <linux/platform_device.h> 19#include <linux/interrupt.h> 20#include <linux/rtc.h> 21#include <linux/bcd.h> 22#include <linux/clk.h> 23#include <linux/log2.h> 24#include <linux/slab.h> 25#include <linux/of.h> 26#include <linux/of_device.h> 27#include <linux/uaccess.h> 28#include <linux/io.h> 29 30#include <asm/irq.h> 31#include "rtc-s3c.h" 32 33struct s3c_rtc { 34 struct device *dev; 35 struct rtc_device *rtc; 36 37 void __iomem *base; 38 struct clk *rtc_clk; 39 struct clk *rtc_src_clk; 40 bool alarm_enabled; 41 42 const struct s3c_rtc_data *data; 43 44 int irq_alarm; 45 int irq_tick; 46 47 spinlock_t pie_lock; 48 spinlock_t alarm_lock; 49 50 int ticnt_save; 51 int ticnt_en_save; 52 bool wake_en; 53}; 54 55struct s3c_rtc_data { 56 int max_user_freq; 57 bool needs_src_clk; 58 59 void (*irq_handler) (struct s3c_rtc *info, int mask); 60 void (*set_freq) (struct s3c_rtc *info, int freq); 61 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq); 62 void (*select_tick_clk) (struct s3c_rtc *info); 63 void (*save_tick_cnt) (struct s3c_rtc *info); 64 void (*restore_tick_cnt) (struct s3c_rtc *info); 65 void (*enable) (struct s3c_rtc *info); 66 void (*disable) (struct s3c_rtc *info); 67}; 68 69static int s3c_rtc_enable_clk(struct s3c_rtc *info) 70{ 71 int ret; 72 73 ret = clk_enable(info->rtc_clk); 74 if (ret) 75 return ret; 76 77 if (info->data->needs_src_clk) { 78 ret = clk_enable(info->rtc_src_clk); 79 if (ret) { 80 clk_disable(info->rtc_clk); 81 return ret; 82 } 83 } 84 return 0; 85} 86 87static void s3c_rtc_disable_clk(struct s3c_rtc *info) 88{ 89 if (info->data->needs_src_clk) 90 clk_disable(info->rtc_src_clk); 91 clk_disable(info->rtc_clk); 92} 93 94/* IRQ Handlers */ 95static irqreturn_t s3c_rtc_tickirq(int irq, void *id) 96{ 97 struct s3c_rtc *info = (struct s3c_rtc *)id; 98 99 if (info->data->irq_handler) 100 info->data->irq_handler(info, S3C2410_INTP_TIC); 101 102 return IRQ_HANDLED; 103} 104 105static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) 106{ 107 struct s3c_rtc *info = (struct s3c_rtc *)id; 108 109 if (info->data->irq_handler) 110 info->data->irq_handler(info, S3C2410_INTP_ALM); 111 112 return IRQ_HANDLED; 113} 114 115/* Update control registers */ 116static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) 117{ 118 struct s3c_rtc *info = dev_get_drvdata(dev); 119 unsigned long flags; 120 unsigned int tmp; 121 int ret; 122 123 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled); 124 125 ret = s3c_rtc_enable_clk(info); 126 if (ret) 127 return ret; 128 129 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; 130 131 if (enabled) 132 tmp |= S3C2410_RTCALM_ALMEN; 133 134 writeb(tmp, info->base + S3C2410_RTCALM); 135 136 spin_lock_irqsave(&info->alarm_lock, flags); 137 138 if (info->alarm_enabled && !enabled) 139 s3c_rtc_disable_clk(info); 140 else if (!info->alarm_enabled && enabled) 141 ret = s3c_rtc_enable_clk(info); 142 143 info->alarm_enabled = enabled; 144 spin_unlock_irqrestore(&info->alarm_lock, flags); 145 146 s3c_rtc_disable_clk(info); 147 148 return ret; 149} 150 151/* Set RTC frequency */ 152static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq) 153{ 154 int ret; 155 156 if (!is_power_of_2(freq)) 157 return -EINVAL; 158 159 ret = s3c_rtc_enable_clk(info); 160 if (ret) 161 return ret; 162 spin_lock_irq(&info->pie_lock); 163 164 if (info->data->set_freq) 165 info->data->set_freq(info, freq); 166 167 spin_unlock_irq(&info->pie_lock); 168 s3c_rtc_disable_clk(info); 169 170 return 0; 171} 172 173/* Time read/write */ 174static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) 175{ 176 struct s3c_rtc *info = dev_get_drvdata(dev); 177 unsigned int have_retried = 0; 178 int ret; 179 180 ret = s3c_rtc_enable_clk(info); 181 if (ret) 182 return ret; 183 184retry_get_time: 185 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN); 186 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR); 187 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE); 188 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON); 189 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR); 190 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC); 191 192 /* the only way to work out whether the system was mid-update 193 * when we read it is to check the second counter, and if it 194 * is zero, then we re-try the entire read 195 */ 196 197 if (rtc_tm->tm_sec == 0 && !have_retried) { 198 have_retried = 1; 199 goto retry_get_time; 200 } 201 202 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); 203 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); 204 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); 205 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); 206 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); 207 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); 208 209 s3c_rtc_disable_clk(info); 210 211 rtc_tm->tm_year += 100; 212 rtc_tm->tm_mon -= 1; 213 214 dev_dbg(dev, "read time %ptR\n", rtc_tm); 215 return 0; 216} 217 218static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) 219{ 220 struct s3c_rtc *info = dev_get_drvdata(dev); 221 int year = tm->tm_year - 100; 222 int ret; 223 224 dev_dbg(dev, "set time %ptR\n", tm); 225 226 /* we get around y2k by simply not supporting it */ 227 228 if (year < 0 || year >= 100) { 229 dev_err(dev, "rtc only supports 100 years\n"); 230 return -EINVAL; 231 } 232 233 ret = s3c_rtc_enable_clk(info); 234 if (ret) 235 return ret; 236 237 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC); 238 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN); 239 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR); 240 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE); 241 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON); 242 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR); 243 244 s3c_rtc_disable_clk(info); 245 246 return 0; 247} 248 249static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) 250{ 251 struct s3c_rtc *info = dev_get_drvdata(dev); 252 struct rtc_time *alm_tm = &alrm->time; 253 unsigned int alm_en; 254 int ret; 255 256 ret = s3c_rtc_enable_clk(info); 257 if (ret) 258 return ret; 259 260 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC); 261 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN); 262 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR); 263 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON); 264 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE); 265 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR); 266 267 alm_en = readb(info->base + S3C2410_RTCALM); 268 269 s3c_rtc_disable_clk(info); 270 271 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; 272 273 dev_dbg(dev, "read alarm %d, %ptR\n", alm_en, alm_tm); 274 275 /* decode the alarm enable field */ 276 if (alm_en & S3C2410_RTCALM_SECEN) 277 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); 278 279 if (alm_en & S3C2410_RTCALM_MINEN) 280 alm_tm->tm_min = bcd2bin(alm_tm->tm_min); 281 282 if (alm_en & S3C2410_RTCALM_HOUREN) 283 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); 284 285 if (alm_en & S3C2410_RTCALM_DAYEN) 286 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); 287 288 if (alm_en & S3C2410_RTCALM_MONEN) { 289 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); 290 alm_tm->tm_mon -= 1; 291 } 292 293 if (alm_en & S3C2410_RTCALM_YEAREN) 294 alm_tm->tm_year = bcd2bin(alm_tm->tm_year); 295 296 return 0; 297} 298 299static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 300{ 301 struct s3c_rtc *info = dev_get_drvdata(dev); 302 struct rtc_time *tm = &alrm->time; 303 unsigned int alrm_en; 304 int ret; 305 306 dev_dbg(dev, "s3c_rtc_setalarm: %d, %ptR\n", alrm->enabled, tm); 307 308 ret = s3c_rtc_enable_clk(info); 309 if (ret) 310 return ret; 311 312 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; 313 writeb(0x00, info->base + S3C2410_RTCALM); 314 315 if (tm->tm_sec < 60 && tm->tm_sec >= 0) { 316 alrm_en |= S3C2410_RTCALM_SECEN; 317 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC); 318 } 319 320 if (tm->tm_min < 60 && tm->tm_min >= 0) { 321 alrm_en |= S3C2410_RTCALM_MINEN; 322 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN); 323 } 324 325 if (tm->tm_hour < 24 && tm->tm_hour >= 0) { 326 alrm_en |= S3C2410_RTCALM_HOUREN; 327 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR); 328 } 329 330 if (tm->tm_mon < 12 && tm->tm_mon >= 0) { 331 alrm_en |= S3C2410_RTCALM_MONEN; 332 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON); 333 } 334 335 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) { 336 alrm_en |= S3C2410_RTCALM_DAYEN; 337 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE); 338 } 339 340 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en); 341 342 writeb(alrm_en, info->base + S3C2410_RTCALM); 343 344 s3c_rtc_setaie(dev, alrm->enabled); 345 346 s3c_rtc_disable_clk(info); 347 348 return 0; 349} 350 351static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) 352{ 353 struct s3c_rtc *info = dev_get_drvdata(dev); 354 int ret; 355 356 ret = s3c_rtc_enable_clk(info); 357 if (ret) 358 return ret; 359 360 if (info->data->enable_tick) 361 info->data->enable_tick(info, seq); 362 363 s3c_rtc_disable_clk(info); 364 365 return 0; 366} 367 368static const struct rtc_class_ops s3c_rtcops = { 369 .read_time = s3c_rtc_gettime, 370 .set_time = s3c_rtc_settime, 371 .read_alarm = s3c_rtc_getalarm, 372 .set_alarm = s3c_rtc_setalarm, 373 .proc = s3c_rtc_proc, 374 .alarm_irq_enable = s3c_rtc_setaie, 375}; 376 377static void s3c24xx_rtc_enable(struct s3c_rtc *info) 378{ 379 unsigned int con, tmp; 380 381 con = readw(info->base + S3C2410_RTCCON); 382 /* re-enable the device, and check it is ok */ 383 if ((con & S3C2410_RTCCON_RTCEN) == 0) { 384 dev_info(info->dev, "rtc disabled, re-enabling\n"); 385 386 tmp = readw(info->base + S3C2410_RTCCON); 387 writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON); 388 } 389 390 if (con & S3C2410_RTCCON_CNTSEL) { 391 dev_info(info->dev, "removing RTCCON_CNTSEL\n"); 392 393 tmp = readw(info->base + S3C2410_RTCCON); 394 writew(tmp & ~S3C2410_RTCCON_CNTSEL, 395 info->base + S3C2410_RTCCON); 396 } 397 398 if (con & S3C2410_RTCCON_CLKRST) { 399 dev_info(info->dev, "removing RTCCON_CLKRST\n"); 400 401 tmp = readw(info->base + S3C2410_RTCCON); 402 writew(tmp & ~S3C2410_RTCCON_CLKRST, 403 info->base + S3C2410_RTCCON); 404 } 405} 406 407static void s3c24xx_rtc_disable(struct s3c_rtc *info) 408{ 409 unsigned int con; 410 411 con = readw(info->base + S3C2410_RTCCON); 412 con &= ~S3C2410_RTCCON_RTCEN; 413 writew(con, info->base + S3C2410_RTCCON); 414 415 con = readb(info->base + S3C2410_TICNT); 416 con &= ~S3C2410_TICNT_ENABLE; 417 writeb(con, info->base + S3C2410_TICNT); 418} 419 420static void s3c6410_rtc_disable(struct s3c_rtc *info) 421{ 422 unsigned int con; 423 424 con = readw(info->base + S3C2410_RTCCON); 425 con &= ~S3C64XX_RTCCON_TICEN; 426 con &= ~S3C2410_RTCCON_RTCEN; 427 writew(con, info->base + S3C2410_RTCCON); 428} 429 430static int s3c_rtc_remove(struct platform_device *pdev) 431{ 432 struct s3c_rtc *info = platform_get_drvdata(pdev); 433 434 s3c_rtc_setaie(info->dev, 0); 435 436 if (info->data->needs_src_clk) 437 clk_unprepare(info->rtc_src_clk); 438 clk_unprepare(info->rtc_clk); 439 440 return 0; 441} 442 443static int s3c_rtc_probe(struct platform_device *pdev) 444{ 445 struct s3c_rtc *info = NULL; 446 struct rtc_time rtc_tm; 447 int ret; 448 449 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); 450 if (!info) 451 return -ENOMEM; 452 453 /* find the IRQs */ 454 info->irq_tick = platform_get_irq(pdev, 1); 455 if (info->irq_tick < 0) 456 return info->irq_tick; 457 458 info->dev = &pdev->dev; 459 info->data = of_device_get_match_data(&pdev->dev); 460 if (!info->data) { 461 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n"); 462 return -EINVAL; 463 } 464 spin_lock_init(&info->pie_lock); 465 spin_lock_init(&info->alarm_lock); 466 467 platform_set_drvdata(pdev, info); 468 469 info->irq_alarm = platform_get_irq(pdev, 0); 470 if (info->irq_alarm < 0) 471 return info->irq_alarm; 472 473 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n", 474 info->irq_tick, info->irq_alarm); 475 476 /* get the memory region */ 477 info->base = devm_platform_ioremap_resource(pdev, 0); 478 if (IS_ERR(info->base)) 479 return PTR_ERR(info->base); 480 481 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc"); 482 if (IS_ERR(info->rtc_clk)) { 483 ret = PTR_ERR(info->rtc_clk); 484 if (ret != -EPROBE_DEFER) 485 dev_err(&pdev->dev, "failed to find rtc clock\n"); 486 else 487 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n"); 488 return ret; 489 } 490 ret = clk_prepare_enable(info->rtc_clk); 491 if (ret) 492 return ret; 493 494 if (info->data->needs_src_clk) { 495 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src"); 496 if (IS_ERR(info->rtc_src_clk)) { 497 ret = dev_err_probe(&pdev->dev, PTR_ERR(info->rtc_src_clk), 498 "failed to find rtc source clock\n"); 499 goto err_src_clk; 500 } 501 ret = clk_prepare_enable(info->rtc_src_clk); 502 if (ret) 503 goto err_src_clk; 504 } 505 506 /* check to see if everything is setup correctly */ 507 if (info->data->enable) 508 info->data->enable(info); 509 510 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n", 511 readw(info->base + S3C2410_RTCCON)); 512 513 device_init_wakeup(&pdev->dev, 1); 514 515 /* Check RTC Time */ 516 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) { 517 rtc_tm.tm_year = 100; 518 rtc_tm.tm_mon = 0; 519 rtc_tm.tm_mday = 1; 520 rtc_tm.tm_hour = 0; 521 rtc_tm.tm_min = 0; 522 rtc_tm.tm_sec = 0; 523 524 s3c_rtc_settime(&pdev->dev, &rtc_tm); 525 526 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n"); 527 } 528 529 /* register RTC and exit */ 530 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops, 531 THIS_MODULE); 532 if (IS_ERR(info->rtc)) { 533 dev_err(&pdev->dev, "cannot attach rtc\n"); 534 ret = PTR_ERR(info->rtc); 535 goto err_nortc; 536 } 537 538 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq, 539 0, "s3c2410-rtc alarm", info); 540 if (ret) { 541 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret); 542 goto err_nortc; 543 } 544 545 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq, 546 0, "s3c2410-rtc tick", info); 547 if (ret) { 548 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret); 549 goto err_nortc; 550 } 551 552 if (info->data->select_tick_clk) 553 info->data->select_tick_clk(info); 554 555 s3c_rtc_setfreq(info, 1); 556 557 s3c_rtc_disable_clk(info); 558 559 return 0; 560 561err_nortc: 562 if (info->data->disable) 563 info->data->disable(info); 564 565 if (info->data->needs_src_clk) 566 clk_disable_unprepare(info->rtc_src_clk); 567err_src_clk: 568 clk_disable_unprepare(info->rtc_clk); 569 570 return ret; 571} 572 573#ifdef CONFIG_PM_SLEEP 574 575static int s3c_rtc_suspend(struct device *dev) 576{ 577 struct s3c_rtc *info = dev_get_drvdata(dev); 578 int ret; 579 580 ret = s3c_rtc_enable_clk(info); 581 if (ret) 582 return ret; 583 584 /* save TICNT for anyone using periodic interrupts */ 585 if (info->data->save_tick_cnt) 586 info->data->save_tick_cnt(info); 587 588 if (info->data->disable) 589 info->data->disable(info); 590 591 if (device_may_wakeup(dev) && !info->wake_en) { 592 if (enable_irq_wake(info->irq_alarm) == 0) 593 info->wake_en = true; 594 else 595 dev_err(dev, "enable_irq_wake failed\n"); 596 } 597 598 return 0; 599} 600 601static int s3c_rtc_resume(struct device *dev) 602{ 603 struct s3c_rtc *info = dev_get_drvdata(dev); 604 605 if (info->data->enable) 606 info->data->enable(info); 607 608 if (info->data->restore_tick_cnt) 609 info->data->restore_tick_cnt(info); 610 611 s3c_rtc_disable_clk(info); 612 613 if (device_may_wakeup(dev) && info->wake_en) { 614 disable_irq_wake(info->irq_alarm); 615 info->wake_en = false; 616 } 617 618 return 0; 619} 620#endif 621static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume); 622 623static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask) 624{ 625 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); 626} 627 628static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask) 629{ 630 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); 631 writeb(mask, info->base + S3C2410_INTP); 632} 633 634static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq) 635{ 636 unsigned int tmp = 0; 637 int val; 638 639 tmp = readb(info->base + S3C2410_TICNT); 640 tmp &= S3C2410_TICNT_ENABLE; 641 642 val = (info->rtc->max_user_freq / freq) - 1; 643 tmp |= val; 644 645 writel(tmp, info->base + S3C2410_TICNT); 646} 647 648static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq) 649{ 650 unsigned int tmp = 0; 651 int val; 652 653 tmp = readb(info->base + S3C2410_TICNT); 654 tmp &= S3C2410_TICNT_ENABLE; 655 656 val = (info->rtc->max_user_freq / freq) - 1; 657 658 tmp |= S3C2443_TICNT_PART(val); 659 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1); 660 661 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2); 662 663 writel(tmp, info->base + S3C2410_TICNT); 664} 665 666static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq) 667{ 668 unsigned int tmp = 0; 669 int val; 670 671 tmp = readb(info->base + S3C2410_TICNT); 672 tmp &= S3C2410_TICNT_ENABLE; 673 674 val = (info->rtc->max_user_freq / freq) - 1; 675 676 tmp |= S3C2443_TICNT_PART(val); 677 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1); 678 679 writel(tmp, info->base + S3C2410_TICNT); 680} 681 682static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq) 683{ 684 int val; 685 686 val = (info->rtc->max_user_freq / freq) - 1; 687 writel(val, info->base + S3C2410_TICNT); 688} 689 690static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq) 691{ 692 unsigned int ticnt; 693 694 ticnt = readb(info->base + S3C2410_TICNT); 695 ticnt &= S3C2410_TICNT_ENABLE; 696 697 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); 698} 699 700static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info) 701{ 702 unsigned int con; 703 704 con = readw(info->base + S3C2410_RTCCON); 705 con |= S3C2443_RTCCON_TICSEL; 706 writew(con, info->base + S3C2410_RTCCON); 707} 708 709static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq) 710{ 711 unsigned int ticnt; 712 713 ticnt = readw(info->base + S3C2410_RTCCON); 714 ticnt &= S3C64XX_RTCCON_TICEN; 715 716 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); 717} 718 719static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info) 720{ 721 info->ticnt_save = readb(info->base + S3C2410_TICNT); 722} 723 724static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info) 725{ 726 writeb(info->ticnt_save, info->base + S3C2410_TICNT); 727} 728 729static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info) 730{ 731 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON); 732 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN; 733 info->ticnt_save = readl(info->base + S3C2410_TICNT); 734} 735 736static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info) 737{ 738 unsigned int con; 739 740 writel(info->ticnt_save, info->base + S3C2410_TICNT); 741 if (info->ticnt_en_save) { 742 con = readw(info->base + S3C2410_RTCCON); 743 writew(con | info->ticnt_en_save, info->base + S3C2410_RTCCON); 744 } 745} 746 747static struct s3c_rtc_data const s3c2410_rtc_data = { 748 .max_user_freq = 128, 749 .irq_handler = s3c24xx_rtc_irq, 750 .set_freq = s3c2410_rtc_setfreq, 751 .enable_tick = s3c24xx_rtc_enable_tick, 752 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt, 753 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt, 754 .enable = s3c24xx_rtc_enable, 755 .disable = s3c24xx_rtc_disable, 756}; 757 758static struct s3c_rtc_data const s3c2416_rtc_data = { 759 .max_user_freq = 32768, 760 .irq_handler = s3c24xx_rtc_irq, 761 .set_freq = s3c2416_rtc_setfreq, 762 .enable_tick = s3c24xx_rtc_enable_tick, 763 .select_tick_clk = s3c2416_rtc_select_tick_clk, 764 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt, 765 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt, 766 .enable = s3c24xx_rtc_enable, 767 .disable = s3c24xx_rtc_disable, 768}; 769 770static struct s3c_rtc_data const s3c2443_rtc_data = { 771 .max_user_freq = 32768, 772 .irq_handler = s3c24xx_rtc_irq, 773 .set_freq = s3c2443_rtc_setfreq, 774 .enable_tick = s3c24xx_rtc_enable_tick, 775 .select_tick_clk = s3c2416_rtc_select_tick_clk, 776 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt, 777 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt, 778 .enable = s3c24xx_rtc_enable, 779 .disable = s3c24xx_rtc_disable, 780}; 781 782static struct s3c_rtc_data const s3c6410_rtc_data = { 783 .max_user_freq = 32768, 784 .needs_src_clk = true, 785 .irq_handler = s3c6410_rtc_irq, 786 .set_freq = s3c6410_rtc_setfreq, 787 .enable_tick = s3c6410_rtc_enable_tick, 788 .save_tick_cnt = s3c6410_rtc_save_tick_cnt, 789 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt, 790 .enable = s3c24xx_rtc_enable, 791 .disable = s3c6410_rtc_disable, 792}; 793 794static const struct of_device_id s3c_rtc_dt_match[] = { 795 { 796 .compatible = "samsung,s3c2410-rtc", 797 .data = &s3c2410_rtc_data, 798 }, { 799 .compatible = "samsung,s3c2416-rtc", 800 .data = &s3c2416_rtc_data, 801 }, { 802 .compatible = "samsung,s3c2443-rtc", 803 .data = &s3c2443_rtc_data, 804 }, { 805 .compatible = "samsung,s3c6410-rtc", 806 .data = &s3c6410_rtc_data, 807 }, { 808 .compatible = "samsung,exynos3250-rtc", 809 .data = &s3c6410_rtc_data, 810 }, 811 { /* sentinel */ }, 812}; 813MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match); 814 815static struct platform_driver s3c_rtc_driver = { 816 .probe = s3c_rtc_probe, 817 .remove = s3c_rtc_remove, 818 .driver = { 819 .name = "s3c-rtc", 820 .pm = &s3c_rtc_pm_ops, 821 .of_match_table = of_match_ptr(s3c_rtc_dt_match), 822 }, 823}; 824module_platform_driver(s3c_rtc_driver); 825 826MODULE_DESCRIPTION("Samsung S3C RTC Driver"); 827MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 828MODULE_LICENSE("GPL"); 829MODULE_ALIAS("platform:s3c2410-rtc"); 830