18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * RTC driver for the interal RTC block in the Amlogic Meson6, Meson8,
48c2ecf20Sopenharmony_ci * Meson8b and Meson8m2 SoCs.
58c2ecf20Sopenharmony_ci *
68c2ecf20Sopenharmony_ci * The RTC is split in to two parts, the AHB front end and a simple serial
78c2ecf20Sopenharmony_ci * connection to the actual registers. This driver manages both parts.
88c2ecf20Sopenharmony_ci *
98c2ecf20Sopenharmony_ci * Copyright (c) 2018 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
108c2ecf20Sopenharmony_ci * Copyright (c) 2015 Ben Dooks <ben.dooks@codethink.co.uk> for Codethink Ltd
118c2ecf20Sopenharmony_ci * Based on origin by Carlo Caione <carlo@endlessm.com>
128c2ecf20Sopenharmony_ci */
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#include <linux/bitfield.h>
158c2ecf20Sopenharmony_ci#include <linux/delay.h>
168c2ecf20Sopenharmony_ci#include <linux/io.h>
178c2ecf20Sopenharmony_ci#include <linux/kernel.h>
188c2ecf20Sopenharmony_ci#include <linux/module.h>
198c2ecf20Sopenharmony_ci#include <linux/nvmem-provider.h>
208c2ecf20Sopenharmony_ci#include <linux/of.h>
218c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
228c2ecf20Sopenharmony_ci#include <linux/regmap.h>
238c2ecf20Sopenharmony_ci#include <linux/regulator/consumer.h>
248c2ecf20Sopenharmony_ci#include <linux/reset.h>
258c2ecf20Sopenharmony_ci#include <linux/rtc.h>
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/* registers accessed from cpu bus */
288c2ecf20Sopenharmony_ci#define RTC_ADDR0				0x00
298c2ecf20Sopenharmony_ci	#define RTC_ADDR0_LINE_SCLK		BIT(0)
308c2ecf20Sopenharmony_ci	#define RTC_ADDR0_LINE_SEN		BIT(1)
318c2ecf20Sopenharmony_ci	#define RTC_ADDR0_LINE_SDI		BIT(2)
328c2ecf20Sopenharmony_ci	#define RTC_ADDR0_START_SER		BIT(17)
338c2ecf20Sopenharmony_ci	#define RTC_ADDR0_WAIT_SER		BIT(22)
348c2ecf20Sopenharmony_ci	#define RTC_ADDR0_DATA			GENMASK(31, 24)
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci#define RTC_ADDR1				0x04
378c2ecf20Sopenharmony_ci	#define RTC_ADDR1_SDO			BIT(0)
388c2ecf20Sopenharmony_ci	#define RTC_ADDR1_S_READY		BIT(1)
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci#define RTC_ADDR2				0x08
418c2ecf20Sopenharmony_ci#define RTC_ADDR3				0x0c
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci#define RTC_REG4				0x10
448c2ecf20Sopenharmony_ci	#define RTC_REG4_STATIC_VALUE		GENMASK(7, 0)
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci/* rtc registers accessed via rtc-serial interface */
478c2ecf20Sopenharmony_ci#define RTC_COUNTER		(0)
488c2ecf20Sopenharmony_ci#define RTC_SEC_ADJ		(2)
498c2ecf20Sopenharmony_ci#define RTC_REGMEM_0		(4)
508c2ecf20Sopenharmony_ci#define RTC_REGMEM_1		(5)
518c2ecf20Sopenharmony_ci#define RTC_REGMEM_2		(6)
528c2ecf20Sopenharmony_ci#define RTC_REGMEM_3		(7)
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ci#define RTC_ADDR_BITS		(3)	/* number of address bits to send */
558c2ecf20Sopenharmony_ci#define RTC_DATA_BITS		(32)	/* number of data bits to tx/rx */
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci#define MESON_STATIC_BIAS_CUR	(0x5 << 1)
588c2ecf20Sopenharmony_ci#define MESON_STATIC_VOLTAGE	(0x3 << 11)
598c2ecf20Sopenharmony_ci#define MESON_STATIC_DEFAULT    (MESON_STATIC_BIAS_CUR | MESON_STATIC_VOLTAGE)
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_cistruct meson_rtc {
628c2ecf20Sopenharmony_ci	struct rtc_device	*rtc;		/* rtc device we created */
638c2ecf20Sopenharmony_ci	struct device		*dev;		/* device we bound from */
648c2ecf20Sopenharmony_ci	struct reset_control	*reset;		/* reset source */
658c2ecf20Sopenharmony_ci	struct regulator	*vdd;		/* voltage input */
668c2ecf20Sopenharmony_ci	struct regmap		*peripheral;	/* peripheral registers */
678c2ecf20Sopenharmony_ci	struct regmap		*serial;	/* serial registers */
688c2ecf20Sopenharmony_ci};
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_cistatic const struct regmap_config meson_rtc_peripheral_regmap_config = {
718c2ecf20Sopenharmony_ci	.name		= "peripheral-registers",
728c2ecf20Sopenharmony_ci	.reg_bits	= 8,
738c2ecf20Sopenharmony_ci	.val_bits	= 32,
748c2ecf20Sopenharmony_ci	.reg_stride	= 4,
758c2ecf20Sopenharmony_ci	.max_register	= RTC_REG4,
768c2ecf20Sopenharmony_ci	.fast_io	= true,
778c2ecf20Sopenharmony_ci};
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci/* RTC front-end serialiser controls */
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_cistatic void meson_rtc_sclk_pulse(struct meson_rtc *rtc)
828c2ecf20Sopenharmony_ci{
838c2ecf20Sopenharmony_ci	udelay(5);
848c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, 0);
858c2ecf20Sopenharmony_ci	udelay(5);
868c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK,
878c2ecf20Sopenharmony_ci			   RTC_ADDR0_LINE_SCLK);
888c2ecf20Sopenharmony_ci}
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_cistatic void meson_rtc_send_bit(struct meson_rtc *rtc, unsigned int bit)
918c2ecf20Sopenharmony_ci{
928c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI,
938c2ecf20Sopenharmony_ci			   bit ? RTC_ADDR0_LINE_SDI : 0);
948c2ecf20Sopenharmony_ci	meson_rtc_sclk_pulse(rtc);
958c2ecf20Sopenharmony_ci}
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_cistatic void meson_rtc_send_bits(struct meson_rtc *rtc, u32 data,
988c2ecf20Sopenharmony_ci				unsigned int nr)
998c2ecf20Sopenharmony_ci{
1008c2ecf20Sopenharmony_ci	u32 bit = 1 << (nr - 1);
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	while (bit) {
1038c2ecf20Sopenharmony_ci		meson_rtc_send_bit(rtc, data & bit);
1048c2ecf20Sopenharmony_ci		bit >>= 1;
1058c2ecf20Sopenharmony_ci	}
1068c2ecf20Sopenharmony_ci}
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_cistatic void meson_rtc_set_dir(struct meson_rtc *rtc, u32 mode)
1098c2ecf20Sopenharmony_ci{
1108c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN, 0);
1118c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, 0);
1128c2ecf20Sopenharmony_ci	meson_rtc_send_bit(rtc, mode);
1138c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, 0);
1148c2ecf20Sopenharmony_ci}
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_cistatic u32 meson_rtc_get_data(struct meson_rtc *rtc)
1178c2ecf20Sopenharmony_ci{
1188c2ecf20Sopenharmony_ci	u32 tmp, val = 0;
1198c2ecf20Sopenharmony_ci	int bit;
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci	for (bit = 0; bit < RTC_DATA_BITS; bit++) {
1228c2ecf20Sopenharmony_ci		meson_rtc_sclk_pulse(rtc);
1238c2ecf20Sopenharmony_ci		val <<= 1;
1248c2ecf20Sopenharmony_ci
1258c2ecf20Sopenharmony_ci		regmap_read(rtc->peripheral, RTC_ADDR1, &tmp);
1268c2ecf20Sopenharmony_ci		val |= tmp & RTC_ADDR1_SDO;
1278c2ecf20Sopenharmony_ci	}
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_ci	return val;
1308c2ecf20Sopenharmony_ci}
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_cistatic int meson_rtc_get_bus(struct meson_rtc *rtc)
1338c2ecf20Sopenharmony_ci{
1348c2ecf20Sopenharmony_ci	int ret, retries;
1358c2ecf20Sopenharmony_ci	u32 val;
1368c2ecf20Sopenharmony_ci
1378c2ecf20Sopenharmony_ci	/* prepare bus for transfers, set all lines low */
1388c2ecf20Sopenharmony_ci	val = RTC_ADDR0_LINE_SDI | RTC_ADDR0_LINE_SEN | RTC_ADDR0_LINE_SCLK;
1398c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, val, 0);
1408c2ecf20Sopenharmony_ci
1418c2ecf20Sopenharmony_ci	for (retries = 0; retries < 3; retries++) {
1428c2ecf20Sopenharmony_ci		/* wait for the bus to be ready */
1438c2ecf20Sopenharmony_ci		if (!regmap_read_poll_timeout(rtc->peripheral, RTC_ADDR1, val,
1448c2ecf20Sopenharmony_ci					      val & RTC_ADDR1_S_READY, 10,
1458c2ecf20Sopenharmony_ci					      10000))
1468c2ecf20Sopenharmony_ci			return 0;
1478c2ecf20Sopenharmony_ci
1488c2ecf20Sopenharmony_ci		dev_warn(rtc->dev, "failed to get bus, resetting RTC\n");
1498c2ecf20Sopenharmony_ci
1508c2ecf20Sopenharmony_ci		ret = reset_control_reset(rtc->reset);
1518c2ecf20Sopenharmony_ci		if (ret)
1528c2ecf20Sopenharmony_ci			return ret;
1538c2ecf20Sopenharmony_ci	}
1548c2ecf20Sopenharmony_ci
1558c2ecf20Sopenharmony_ci	dev_err(rtc->dev, "bus is not ready\n");
1568c2ecf20Sopenharmony_ci	return -ETIMEDOUT;
1578c2ecf20Sopenharmony_ci}
1588c2ecf20Sopenharmony_ci
1598c2ecf20Sopenharmony_cistatic int meson_rtc_serial_bus_reg_read(void *context, unsigned int reg,
1608c2ecf20Sopenharmony_ci					 unsigned int *data)
1618c2ecf20Sopenharmony_ci{
1628c2ecf20Sopenharmony_ci	struct meson_rtc *rtc = context;
1638c2ecf20Sopenharmony_ci	int ret;
1648c2ecf20Sopenharmony_ci
1658c2ecf20Sopenharmony_ci	ret = meson_rtc_get_bus(rtc);
1668c2ecf20Sopenharmony_ci	if (ret)
1678c2ecf20Sopenharmony_ci		return ret;
1688c2ecf20Sopenharmony_ci
1698c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN,
1708c2ecf20Sopenharmony_ci			   RTC_ADDR0_LINE_SEN);
1718c2ecf20Sopenharmony_ci	meson_rtc_send_bits(rtc, reg, RTC_ADDR_BITS);
1728c2ecf20Sopenharmony_ci	meson_rtc_set_dir(rtc, 0);
1738c2ecf20Sopenharmony_ci	*data = meson_rtc_get_data(rtc);
1748c2ecf20Sopenharmony_ci
1758c2ecf20Sopenharmony_ci	return 0;
1768c2ecf20Sopenharmony_ci}
1778c2ecf20Sopenharmony_ci
1788c2ecf20Sopenharmony_cistatic int meson_rtc_serial_bus_reg_write(void *context, unsigned int reg,
1798c2ecf20Sopenharmony_ci					  unsigned int data)
1808c2ecf20Sopenharmony_ci{
1818c2ecf20Sopenharmony_ci	struct meson_rtc *rtc = context;
1828c2ecf20Sopenharmony_ci	int ret;
1838c2ecf20Sopenharmony_ci
1848c2ecf20Sopenharmony_ci	ret = meson_rtc_get_bus(rtc);
1858c2ecf20Sopenharmony_ci	if (ret)
1868c2ecf20Sopenharmony_ci		return ret;
1878c2ecf20Sopenharmony_ci
1888c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SEN,
1898c2ecf20Sopenharmony_ci			   RTC_ADDR0_LINE_SEN);
1908c2ecf20Sopenharmony_ci	meson_rtc_send_bits(rtc, data, RTC_DATA_BITS);
1918c2ecf20Sopenharmony_ci	meson_rtc_send_bits(rtc, reg, RTC_ADDR_BITS);
1928c2ecf20Sopenharmony_ci	meson_rtc_set_dir(rtc, 1);
1938c2ecf20Sopenharmony_ci
1948c2ecf20Sopenharmony_ci	return 0;
1958c2ecf20Sopenharmony_ci}
1968c2ecf20Sopenharmony_ci
1978c2ecf20Sopenharmony_cistatic const struct regmap_bus meson_rtc_serial_bus = {
1988c2ecf20Sopenharmony_ci	.reg_read	= meson_rtc_serial_bus_reg_read,
1998c2ecf20Sopenharmony_ci	.reg_write	= meson_rtc_serial_bus_reg_write,
2008c2ecf20Sopenharmony_ci};
2018c2ecf20Sopenharmony_ci
2028c2ecf20Sopenharmony_cistatic const struct regmap_config meson_rtc_serial_regmap_config = {
2038c2ecf20Sopenharmony_ci	.name		= "serial-registers",
2048c2ecf20Sopenharmony_ci	.reg_bits	= 4,
2058c2ecf20Sopenharmony_ci	.reg_stride	= 1,
2068c2ecf20Sopenharmony_ci	.val_bits	= 32,
2078c2ecf20Sopenharmony_ci	.max_register	= RTC_REGMEM_3,
2088c2ecf20Sopenharmony_ci	.fast_io	= false,
2098c2ecf20Sopenharmony_ci};
2108c2ecf20Sopenharmony_ci
2118c2ecf20Sopenharmony_cistatic int meson_rtc_write_static(struct meson_rtc *rtc, u32 data)
2128c2ecf20Sopenharmony_ci{
2138c2ecf20Sopenharmony_ci	u32 tmp;
2148c2ecf20Sopenharmony_ci
2158c2ecf20Sopenharmony_ci	regmap_write(rtc->peripheral, RTC_REG4,
2168c2ecf20Sopenharmony_ci		     FIELD_PREP(RTC_REG4_STATIC_VALUE, (data >> 8)));
2178c2ecf20Sopenharmony_ci
2188c2ecf20Sopenharmony_ci	/* write the static value and start the auto serializer */
2198c2ecf20Sopenharmony_ci	tmp = FIELD_PREP(RTC_ADDR0_DATA, (data & 0xff)) | RTC_ADDR0_START_SER;
2208c2ecf20Sopenharmony_ci	regmap_update_bits(rtc->peripheral, RTC_ADDR0,
2218c2ecf20Sopenharmony_ci			   RTC_ADDR0_DATA | RTC_ADDR0_START_SER, tmp);
2228c2ecf20Sopenharmony_ci
2238c2ecf20Sopenharmony_ci	/* wait for the auto serializer to complete */
2248c2ecf20Sopenharmony_ci	return regmap_read_poll_timeout(rtc->peripheral, RTC_REG4, tmp,
2258c2ecf20Sopenharmony_ci					!(tmp & RTC_ADDR0_WAIT_SER), 10,
2268c2ecf20Sopenharmony_ci					10000);
2278c2ecf20Sopenharmony_ci}
2288c2ecf20Sopenharmony_ci
2298c2ecf20Sopenharmony_ci/* RTC interface layer functions */
2308c2ecf20Sopenharmony_ci
2318c2ecf20Sopenharmony_cistatic int meson_rtc_gettime(struct device *dev, struct rtc_time *tm)
2328c2ecf20Sopenharmony_ci{
2338c2ecf20Sopenharmony_ci	struct meson_rtc *rtc = dev_get_drvdata(dev);
2348c2ecf20Sopenharmony_ci	u32 time;
2358c2ecf20Sopenharmony_ci	int ret;
2368c2ecf20Sopenharmony_ci
2378c2ecf20Sopenharmony_ci	ret = regmap_read(rtc->serial, RTC_COUNTER, &time);
2388c2ecf20Sopenharmony_ci	if (!ret)
2398c2ecf20Sopenharmony_ci		rtc_time64_to_tm(time, tm);
2408c2ecf20Sopenharmony_ci
2418c2ecf20Sopenharmony_ci	return ret;
2428c2ecf20Sopenharmony_ci}
2438c2ecf20Sopenharmony_ci
2448c2ecf20Sopenharmony_cistatic int meson_rtc_settime(struct device *dev, struct rtc_time *tm)
2458c2ecf20Sopenharmony_ci{
2468c2ecf20Sopenharmony_ci	struct meson_rtc *rtc = dev_get_drvdata(dev);
2478c2ecf20Sopenharmony_ci
2488c2ecf20Sopenharmony_ci	return regmap_write(rtc->serial, RTC_COUNTER, rtc_tm_to_time64(tm));
2498c2ecf20Sopenharmony_ci}
2508c2ecf20Sopenharmony_ci
2518c2ecf20Sopenharmony_cistatic const struct rtc_class_ops meson_rtc_ops = {
2528c2ecf20Sopenharmony_ci	.read_time	= meson_rtc_gettime,
2538c2ecf20Sopenharmony_ci	.set_time	= meson_rtc_settime,
2548c2ecf20Sopenharmony_ci};
2558c2ecf20Sopenharmony_ci
2568c2ecf20Sopenharmony_ci/* NVMEM interface layer functions */
2578c2ecf20Sopenharmony_ci
2588c2ecf20Sopenharmony_cistatic int meson_rtc_regmem_read(void *context, unsigned int offset,
2598c2ecf20Sopenharmony_ci				 void *buf, size_t bytes)
2608c2ecf20Sopenharmony_ci{
2618c2ecf20Sopenharmony_ci	struct meson_rtc *rtc = context;
2628c2ecf20Sopenharmony_ci	unsigned int read_offset, read_size;
2638c2ecf20Sopenharmony_ci
2648c2ecf20Sopenharmony_ci	read_offset = RTC_REGMEM_0 + (offset / 4);
2658c2ecf20Sopenharmony_ci	read_size = bytes / 4;
2668c2ecf20Sopenharmony_ci
2678c2ecf20Sopenharmony_ci	return regmap_bulk_read(rtc->serial, read_offset, buf, read_size);
2688c2ecf20Sopenharmony_ci}
2698c2ecf20Sopenharmony_ci
2708c2ecf20Sopenharmony_cistatic int meson_rtc_regmem_write(void *context, unsigned int offset,
2718c2ecf20Sopenharmony_ci				  void *buf, size_t bytes)
2728c2ecf20Sopenharmony_ci{
2738c2ecf20Sopenharmony_ci	struct meson_rtc *rtc = context;
2748c2ecf20Sopenharmony_ci	unsigned int write_offset, write_size;
2758c2ecf20Sopenharmony_ci
2768c2ecf20Sopenharmony_ci	write_offset = RTC_REGMEM_0 + (offset / 4);
2778c2ecf20Sopenharmony_ci	write_size = bytes / 4;
2788c2ecf20Sopenharmony_ci
2798c2ecf20Sopenharmony_ci	return regmap_bulk_write(rtc->serial, write_offset, buf, write_size);
2808c2ecf20Sopenharmony_ci}
2818c2ecf20Sopenharmony_ci
2828c2ecf20Sopenharmony_cistatic int meson_rtc_probe(struct platform_device *pdev)
2838c2ecf20Sopenharmony_ci{
2848c2ecf20Sopenharmony_ci	struct nvmem_config meson_rtc_nvmem_config = {
2858c2ecf20Sopenharmony_ci		.name = "meson-rtc-regmem",
2868c2ecf20Sopenharmony_ci		.type = NVMEM_TYPE_BATTERY_BACKED,
2878c2ecf20Sopenharmony_ci		.word_size = 4,
2888c2ecf20Sopenharmony_ci		.stride = 4,
2898c2ecf20Sopenharmony_ci		.size = 4 * 4,
2908c2ecf20Sopenharmony_ci		.reg_read = meson_rtc_regmem_read,
2918c2ecf20Sopenharmony_ci		.reg_write = meson_rtc_regmem_write,
2928c2ecf20Sopenharmony_ci	};
2938c2ecf20Sopenharmony_ci	struct device *dev = &pdev->dev;
2948c2ecf20Sopenharmony_ci	struct meson_rtc *rtc;
2958c2ecf20Sopenharmony_ci	void __iomem *base;
2968c2ecf20Sopenharmony_ci	int ret;
2978c2ecf20Sopenharmony_ci	u32 tm;
2988c2ecf20Sopenharmony_ci
2998c2ecf20Sopenharmony_ci	rtc = devm_kzalloc(dev, sizeof(struct meson_rtc), GFP_KERNEL);
3008c2ecf20Sopenharmony_ci	if (!rtc)
3018c2ecf20Sopenharmony_ci		return -ENOMEM;
3028c2ecf20Sopenharmony_ci
3038c2ecf20Sopenharmony_ci	rtc->rtc = devm_rtc_allocate_device(dev);
3048c2ecf20Sopenharmony_ci	if (IS_ERR(rtc->rtc))
3058c2ecf20Sopenharmony_ci		return PTR_ERR(rtc->rtc);
3068c2ecf20Sopenharmony_ci
3078c2ecf20Sopenharmony_ci	platform_set_drvdata(pdev, rtc);
3088c2ecf20Sopenharmony_ci
3098c2ecf20Sopenharmony_ci	rtc->dev = dev;
3108c2ecf20Sopenharmony_ci
3118c2ecf20Sopenharmony_ci	rtc->rtc->ops = &meson_rtc_ops;
3128c2ecf20Sopenharmony_ci	rtc->rtc->range_max = U32_MAX;
3138c2ecf20Sopenharmony_ci
3148c2ecf20Sopenharmony_ci	base = devm_platform_ioremap_resource(pdev, 0);
3158c2ecf20Sopenharmony_ci	if (IS_ERR(base))
3168c2ecf20Sopenharmony_ci		return PTR_ERR(base);
3178c2ecf20Sopenharmony_ci
3188c2ecf20Sopenharmony_ci	rtc->peripheral = devm_regmap_init_mmio(dev, base,
3198c2ecf20Sopenharmony_ci					&meson_rtc_peripheral_regmap_config);
3208c2ecf20Sopenharmony_ci	if (IS_ERR(rtc->peripheral)) {
3218c2ecf20Sopenharmony_ci		dev_err(dev, "failed to create peripheral regmap\n");
3228c2ecf20Sopenharmony_ci		return PTR_ERR(rtc->peripheral);
3238c2ecf20Sopenharmony_ci	}
3248c2ecf20Sopenharmony_ci
3258c2ecf20Sopenharmony_ci	rtc->reset = devm_reset_control_get(dev, NULL);
3268c2ecf20Sopenharmony_ci	if (IS_ERR(rtc->reset)) {
3278c2ecf20Sopenharmony_ci		dev_err(dev, "missing reset line\n");
3288c2ecf20Sopenharmony_ci		return PTR_ERR(rtc->reset);
3298c2ecf20Sopenharmony_ci	}
3308c2ecf20Sopenharmony_ci
3318c2ecf20Sopenharmony_ci	rtc->vdd = devm_regulator_get(dev, "vdd");
3328c2ecf20Sopenharmony_ci	if (IS_ERR(rtc->vdd)) {
3338c2ecf20Sopenharmony_ci		dev_err(dev, "failed to get the vdd-supply\n");
3348c2ecf20Sopenharmony_ci		return PTR_ERR(rtc->vdd);
3358c2ecf20Sopenharmony_ci	}
3368c2ecf20Sopenharmony_ci
3378c2ecf20Sopenharmony_ci	ret = regulator_enable(rtc->vdd);
3388c2ecf20Sopenharmony_ci	if (ret) {
3398c2ecf20Sopenharmony_ci		dev_err(dev, "failed to enable vdd-supply\n");
3408c2ecf20Sopenharmony_ci		return ret;
3418c2ecf20Sopenharmony_ci	}
3428c2ecf20Sopenharmony_ci
3438c2ecf20Sopenharmony_ci	ret = meson_rtc_write_static(rtc, MESON_STATIC_DEFAULT);
3448c2ecf20Sopenharmony_ci	if (ret) {
3458c2ecf20Sopenharmony_ci		dev_err(dev, "failed to set static values\n");
3468c2ecf20Sopenharmony_ci		goto out_disable_vdd;
3478c2ecf20Sopenharmony_ci	}
3488c2ecf20Sopenharmony_ci
3498c2ecf20Sopenharmony_ci	rtc->serial = devm_regmap_init(dev, &meson_rtc_serial_bus, rtc,
3508c2ecf20Sopenharmony_ci				       &meson_rtc_serial_regmap_config);
3518c2ecf20Sopenharmony_ci	if (IS_ERR(rtc->serial)) {
3528c2ecf20Sopenharmony_ci		dev_err(dev, "failed to create serial regmap\n");
3538c2ecf20Sopenharmony_ci		ret = PTR_ERR(rtc->serial);
3548c2ecf20Sopenharmony_ci		goto out_disable_vdd;
3558c2ecf20Sopenharmony_ci	}
3568c2ecf20Sopenharmony_ci
3578c2ecf20Sopenharmony_ci	/*
3588c2ecf20Sopenharmony_ci	 * check if we can read RTC counter, if not then the RTC is probably
3598c2ecf20Sopenharmony_ci	 * not functional. If it isn't probably best to not bind.
3608c2ecf20Sopenharmony_ci	 */
3618c2ecf20Sopenharmony_ci	ret = regmap_read(rtc->serial, RTC_COUNTER, &tm);
3628c2ecf20Sopenharmony_ci	if (ret) {
3638c2ecf20Sopenharmony_ci		dev_err(dev, "cannot read RTC counter, RTC not functional\n");
3648c2ecf20Sopenharmony_ci		goto out_disable_vdd;
3658c2ecf20Sopenharmony_ci	}
3668c2ecf20Sopenharmony_ci
3678c2ecf20Sopenharmony_ci	meson_rtc_nvmem_config.priv = rtc;
3688c2ecf20Sopenharmony_ci	ret = rtc_nvmem_register(rtc->rtc, &meson_rtc_nvmem_config);
3698c2ecf20Sopenharmony_ci	if (ret)
3708c2ecf20Sopenharmony_ci		goto out_disable_vdd;
3718c2ecf20Sopenharmony_ci
3728c2ecf20Sopenharmony_ci	ret = rtc_register_device(rtc->rtc);
3738c2ecf20Sopenharmony_ci	if (ret)
3748c2ecf20Sopenharmony_ci		goto out_disable_vdd;
3758c2ecf20Sopenharmony_ci
3768c2ecf20Sopenharmony_ci	return 0;
3778c2ecf20Sopenharmony_ci
3788c2ecf20Sopenharmony_ciout_disable_vdd:
3798c2ecf20Sopenharmony_ci	regulator_disable(rtc->vdd);
3808c2ecf20Sopenharmony_ci	return ret;
3818c2ecf20Sopenharmony_ci}
3828c2ecf20Sopenharmony_ci
3838c2ecf20Sopenharmony_cistatic const struct of_device_id meson_rtc_dt_match[] = {
3848c2ecf20Sopenharmony_ci	{ .compatible = "amlogic,meson6-rtc", },
3858c2ecf20Sopenharmony_ci	{ .compatible = "amlogic,meson8-rtc", },
3868c2ecf20Sopenharmony_ci	{ .compatible = "amlogic,meson8b-rtc", },
3878c2ecf20Sopenharmony_ci	{ .compatible = "amlogic,meson8m2-rtc", },
3888c2ecf20Sopenharmony_ci	{ },
3898c2ecf20Sopenharmony_ci};
3908c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, meson_rtc_dt_match);
3918c2ecf20Sopenharmony_ci
3928c2ecf20Sopenharmony_cistatic struct platform_driver meson_rtc_driver = {
3938c2ecf20Sopenharmony_ci	.probe		= meson_rtc_probe,
3948c2ecf20Sopenharmony_ci	.driver		= {
3958c2ecf20Sopenharmony_ci		.name		= "meson-rtc",
3968c2ecf20Sopenharmony_ci		.of_match_table	= of_match_ptr(meson_rtc_dt_match),
3978c2ecf20Sopenharmony_ci	},
3988c2ecf20Sopenharmony_ci};
3998c2ecf20Sopenharmony_cimodule_platform_driver(meson_rtc_driver);
4008c2ecf20Sopenharmony_ci
4018c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Amlogic Meson RTC Driver");
4028c2ecf20Sopenharmony_ciMODULE_AUTHOR("Ben Dooks <ben.doosk@codethink.co.uk>");
4038c2ecf20Sopenharmony_ciMODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
4048c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
4058c2ecf20Sopenharmony_ciMODULE_ALIAS("platform:meson-rtc");
406