18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * ST M48T86 / Dallas DS12887 RTC driver 48c2ecf20Sopenharmony_ci * Copyright (c) 2006 Tower Technologies 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Author: Alessandro Zummo <a.zummo@towertech.it> 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * This drivers only supports the clock running in BCD and 24H mode. 98c2ecf20Sopenharmony_ci * If it will be ever adapted to binary and 12H mode, care must be taken 108c2ecf20Sopenharmony_ci * to not introduce bugs. 118c2ecf20Sopenharmony_ci */ 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#include <linux/module.h> 148c2ecf20Sopenharmony_ci#include <linux/rtc.h> 158c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 168c2ecf20Sopenharmony_ci#include <linux/bcd.h> 178c2ecf20Sopenharmony_ci#include <linux/io.h> 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci#define M48T86_SEC 0x00 208c2ecf20Sopenharmony_ci#define M48T86_SECALRM 0x01 218c2ecf20Sopenharmony_ci#define M48T86_MIN 0x02 228c2ecf20Sopenharmony_ci#define M48T86_MINALRM 0x03 238c2ecf20Sopenharmony_ci#define M48T86_HOUR 0x04 248c2ecf20Sopenharmony_ci#define M48T86_HOURALRM 0x05 258c2ecf20Sopenharmony_ci#define M48T86_DOW 0x06 /* 1 = sunday */ 268c2ecf20Sopenharmony_ci#define M48T86_DOM 0x07 278c2ecf20Sopenharmony_ci#define M48T86_MONTH 0x08 /* 1 - 12 */ 288c2ecf20Sopenharmony_ci#define M48T86_YEAR 0x09 /* 0 - 99 */ 298c2ecf20Sopenharmony_ci#define M48T86_A 0x0a 308c2ecf20Sopenharmony_ci#define M48T86_B 0x0b 318c2ecf20Sopenharmony_ci#define M48T86_B_SET BIT(7) 328c2ecf20Sopenharmony_ci#define M48T86_B_DM BIT(2) 338c2ecf20Sopenharmony_ci#define M48T86_B_H24 BIT(1) 348c2ecf20Sopenharmony_ci#define M48T86_C 0x0c 358c2ecf20Sopenharmony_ci#define M48T86_D 0x0d 368c2ecf20Sopenharmony_ci#define M48T86_D_VRT BIT(7) 378c2ecf20Sopenharmony_ci#define M48T86_NVRAM(x) (0x0e + (x)) 388c2ecf20Sopenharmony_ci#define M48T86_NVRAM_LEN 114 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_cistruct m48t86_rtc_info { 418c2ecf20Sopenharmony_ci void __iomem *index_reg; 428c2ecf20Sopenharmony_ci void __iomem *data_reg; 438c2ecf20Sopenharmony_ci struct rtc_device *rtc; 448c2ecf20Sopenharmony_ci}; 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_cistatic unsigned char m48t86_readb(struct device *dev, unsigned long addr) 478c2ecf20Sopenharmony_ci{ 488c2ecf20Sopenharmony_ci struct m48t86_rtc_info *info = dev_get_drvdata(dev); 498c2ecf20Sopenharmony_ci unsigned char value; 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci writeb(addr, info->index_reg); 528c2ecf20Sopenharmony_ci value = readb(info->data_reg); 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci return value; 558c2ecf20Sopenharmony_ci} 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_cistatic void m48t86_writeb(struct device *dev, 588c2ecf20Sopenharmony_ci unsigned char value, unsigned long addr) 598c2ecf20Sopenharmony_ci{ 608c2ecf20Sopenharmony_ci struct m48t86_rtc_info *info = dev_get_drvdata(dev); 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci writeb(addr, info->index_reg); 638c2ecf20Sopenharmony_ci writeb(value, info->data_reg); 648c2ecf20Sopenharmony_ci} 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_cistatic int m48t86_rtc_read_time(struct device *dev, struct rtc_time *tm) 678c2ecf20Sopenharmony_ci{ 688c2ecf20Sopenharmony_ci unsigned char reg; 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci reg = m48t86_readb(dev, M48T86_B); 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci if (reg & M48T86_B_DM) { 738c2ecf20Sopenharmony_ci /* data (binary) mode */ 748c2ecf20Sopenharmony_ci tm->tm_sec = m48t86_readb(dev, M48T86_SEC); 758c2ecf20Sopenharmony_ci tm->tm_min = m48t86_readb(dev, M48T86_MIN); 768c2ecf20Sopenharmony_ci tm->tm_hour = m48t86_readb(dev, M48T86_HOUR) & 0x3f; 778c2ecf20Sopenharmony_ci tm->tm_mday = m48t86_readb(dev, M48T86_DOM); 788c2ecf20Sopenharmony_ci /* tm_mon is 0-11 */ 798c2ecf20Sopenharmony_ci tm->tm_mon = m48t86_readb(dev, M48T86_MONTH) - 1; 808c2ecf20Sopenharmony_ci tm->tm_year = m48t86_readb(dev, M48T86_YEAR) + 100; 818c2ecf20Sopenharmony_ci tm->tm_wday = m48t86_readb(dev, M48T86_DOW); 828c2ecf20Sopenharmony_ci } else { 838c2ecf20Sopenharmony_ci /* bcd mode */ 848c2ecf20Sopenharmony_ci tm->tm_sec = bcd2bin(m48t86_readb(dev, M48T86_SEC)); 858c2ecf20Sopenharmony_ci tm->tm_min = bcd2bin(m48t86_readb(dev, M48T86_MIN)); 868c2ecf20Sopenharmony_ci tm->tm_hour = bcd2bin(m48t86_readb(dev, M48T86_HOUR) & 878c2ecf20Sopenharmony_ci 0x3f); 888c2ecf20Sopenharmony_ci tm->tm_mday = bcd2bin(m48t86_readb(dev, M48T86_DOM)); 898c2ecf20Sopenharmony_ci /* tm_mon is 0-11 */ 908c2ecf20Sopenharmony_ci tm->tm_mon = bcd2bin(m48t86_readb(dev, M48T86_MONTH)) - 1; 918c2ecf20Sopenharmony_ci tm->tm_year = bcd2bin(m48t86_readb(dev, M48T86_YEAR)) + 100; 928c2ecf20Sopenharmony_ci tm->tm_wday = bcd2bin(m48t86_readb(dev, M48T86_DOW)); 938c2ecf20Sopenharmony_ci } 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci /* correct the hour if the clock is in 12h mode */ 968c2ecf20Sopenharmony_ci if (!(reg & M48T86_B_H24)) 978c2ecf20Sopenharmony_ci if (m48t86_readb(dev, M48T86_HOUR) & 0x80) 988c2ecf20Sopenharmony_ci tm->tm_hour += 12; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci return 0; 1018c2ecf20Sopenharmony_ci} 1028c2ecf20Sopenharmony_ci 1038c2ecf20Sopenharmony_cistatic int m48t86_rtc_set_time(struct device *dev, struct rtc_time *tm) 1048c2ecf20Sopenharmony_ci{ 1058c2ecf20Sopenharmony_ci unsigned char reg; 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci reg = m48t86_readb(dev, M48T86_B); 1088c2ecf20Sopenharmony_ci 1098c2ecf20Sopenharmony_ci /* update flag and 24h mode */ 1108c2ecf20Sopenharmony_ci reg |= M48T86_B_SET | M48T86_B_H24; 1118c2ecf20Sopenharmony_ci m48t86_writeb(dev, reg, M48T86_B); 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ci if (reg & M48T86_B_DM) { 1148c2ecf20Sopenharmony_ci /* data (binary) mode */ 1158c2ecf20Sopenharmony_ci m48t86_writeb(dev, tm->tm_sec, M48T86_SEC); 1168c2ecf20Sopenharmony_ci m48t86_writeb(dev, tm->tm_min, M48T86_MIN); 1178c2ecf20Sopenharmony_ci m48t86_writeb(dev, tm->tm_hour, M48T86_HOUR); 1188c2ecf20Sopenharmony_ci m48t86_writeb(dev, tm->tm_mday, M48T86_DOM); 1198c2ecf20Sopenharmony_ci m48t86_writeb(dev, tm->tm_mon + 1, M48T86_MONTH); 1208c2ecf20Sopenharmony_ci m48t86_writeb(dev, tm->tm_year % 100, M48T86_YEAR); 1218c2ecf20Sopenharmony_ci m48t86_writeb(dev, tm->tm_wday, M48T86_DOW); 1228c2ecf20Sopenharmony_ci } else { 1238c2ecf20Sopenharmony_ci /* bcd mode */ 1248c2ecf20Sopenharmony_ci m48t86_writeb(dev, bin2bcd(tm->tm_sec), M48T86_SEC); 1258c2ecf20Sopenharmony_ci m48t86_writeb(dev, bin2bcd(tm->tm_min), M48T86_MIN); 1268c2ecf20Sopenharmony_ci m48t86_writeb(dev, bin2bcd(tm->tm_hour), M48T86_HOUR); 1278c2ecf20Sopenharmony_ci m48t86_writeb(dev, bin2bcd(tm->tm_mday), M48T86_DOM); 1288c2ecf20Sopenharmony_ci m48t86_writeb(dev, bin2bcd(tm->tm_mon + 1), M48T86_MONTH); 1298c2ecf20Sopenharmony_ci m48t86_writeb(dev, bin2bcd(tm->tm_year % 100), M48T86_YEAR); 1308c2ecf20Sopenharmony_ci m48t86_writeb(dev, bin2bcd(tm->tm_wday), M48T86_DOW); 1318c2ecf20Sopenharmony_ci } 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci /* update ended */ 1348c2ecf20Sopenharmony_ci reg &= ~M48T86_B_SET; 1358c2ecf20Sopenharmony_ci m48t86_writeb(dev, reg, M48T86_B); 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ci return 0; 1388c2ecf20Sopenharmony_ci} 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_cistatic int m48t86_rtc_proc(struct device *dev, struct seq_file *seq) 1418c2ecf20Sopenharmony_ci{ 1428c2ecf20Sopenharmony_ci unsigned char reg; 1438c2ecf20Sopenharmony_ci 1448c2ecf20Sopenharmony_ci reg = m48t86_readb(dev, M48T86_B); 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci seq_printf(seq, "mode\t\t: %s\n", 1478c2ecf20Sopenharmony_ci (reg & M48T86_B_DM) ? "binary" : "bcd"); 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ci reg = m48t86_readb(dev, M48T86_D); 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_ci seq_printf(seq, "battery\t\t: %s\n", 1528c2ecf20Sopenharmony_ci (reg & M48T86_D_VRT) ? "ok" : "exhausted"); 1538c2ecf20Sopenharmony_ci 1548c2ecf20Sopenharmony_ci return 0; 1558c2ecf20Sopenharmony_ci} 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_cistatic const struct rtc_class_ops m48t86_rtc_ops = { 1588c2ecf20Sopenharmony_ci .read_time = m48t86_rtc_read_time, 1598c2ecf20Sopenharmony_ci .set_time = m48t86_rtc_set_time, 1608c2ecf20Sopenharmony_ci .proc = m48t86_rtc_proc, 1618c2ecf20Sopenharmony_ci}; 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_cistatic int m48t86_nvram_read(void *priv, unsigned int off, void *buf, 1648c2ecf20Sopenharmony_ci size_t count) 1658c2ecf20Sopenharmony_ci{ 1668c2ecf20Sopenharmony_ci struct device *dev = priv; 1678c2ecf20Sopenharmony_ci unsigned int i; 1688c2ecf20Sopenharmony_ci 1698c2ecf20Sopenharmony_ci for (i = 0; i < count; i++) 1708c2ecf20Sopenharmony_ci ((u8 *)buf)[i] = m48t86_readb(dev, M48T86_NVRAM(off + i)); 1718c2ecf20Sopenharmony_ci 1728c2ecf20Sopenharmony_ci return 0; 1738c2ecf20Sopenharmony_ci} 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_cistatic int m48t86_nvram_write(void *priv, unsigned int off, void *buf, 1768c2ecf20Sopenharmony_ci size_t count) 1778c2ecf20Sopenharmony_ci{ 1788c2ecf20Sopenharmony_ci struct device *dev = priv; 1798c2ecf20Sopenharmony_ci unsigned int i; 1808c2ecf20Sopenharmony_ci 1818c2ecf20Sopenharmony_ci for (i = 0; i < count; i++) 1828c2ecf20Sopenharmony_ci m48t86_writeb(dev, ((u8 *)buf)[i], M48T86_NVRAM(off + i)); 1838c2ecf20Sopenharmony_ci 1848c2ecf20Sopenharmony_ci return 0; 1858c2ecf20Sopenharmony_ci} 1868c2ecf20Sopenharmony_ci 1878c2ecf20Sopenharmony_ci/* 1888c2ecf20Sopenharmony_ci * The RTC is an optional feature at purchase time on some Technologic Systems 1898c2ecf20Sopenharmony_ci * boards. Verify that it actually exists by checking if the last two bytes 1908c2ecf20Sopenharmony_ci * of the NVRAM can be changed. 1918c2ecf20Sopenharmony_ci * 1928c2ecf20Sopenharmony_ci * This is based on the method used in their rtc7800.c example. 1938c2ecf20Sopenharmony_ci */ 1948c2ecf20Sopenharmony_cistatic bool m48t86_verify_chip(struct platform_device *pdev) 1958c2ecf20Sopenharmony_ci{ 1968c2ecf20Sopenharmony_ci unsigned int offset0 = M48T86_NVRAM(M48T86_NVRAM_LEN - 2); 1978c2ecf20Sopenharmony_ci unsigned int offset1 = M48T86_NVRAM(M48T86_NVRAM_LEN - 1); 1988c2ecf20Sopenharmony_ci unsigned char tmp0, tmp1; 1998c2ecf20Sopenharmony_ci 2008c2ecf20Sopenharmony_ci tmp0 = m48t86_readb(&pdev->dev, offset0); 2018c2ecf20Sopenharmony_ci tmp1 = m48t86_readb(&pdev->dev, offset1); 2028c2ecf20Sopenharmony_ci 2038c2ecf20Sopenharmony_ci m48t86_writeb(&pdev->dev, 0x00, offset0); 2048c2ecf20Sopenharmony_ci m48t86_writeb(&pdev->dev, 0x55, offset1); 2058c2ecf20Sopenharmony_ci if (m48t86_readb(&pdev->dev, offset1) == 0x55) { 2068c2ecf20Sopenharmony_ci m48t86_writeb(&pdev->dev, 0xaa, offset1); 2078c2ecf20Sopenharmony_ci if (m48t86_readb(&pdev->dev, offset1) == 0xaa && 2088c2ecf20Sopenharmony_ci m48t86_readb(&pdev->dev, offset0) == 0x00) { 2098c2ecf20Sopenharmony_ci m48t86_writeb(&pdev->dev, tmp0, offset0); 2108c2ecf20Sopenharmony_ci m48t86_writeb(&pdev->dev, tmp1, offset1); 2118c2ecf20Sopenharmony_ci 2128c2ecf20Sopenharmony_ci return true; 2138c2ecf20Sopenharmony_ci } 2148c2ecf20Sopenharmony_ci } 2158c2ecf20Sopenharmony_ci return false; 2168c2ecf20Sopenharmony_ci} 2178c2ecf20Sopenharmony_ci 2188c2ecf20Sopenharmony_cistatic int m48t86_rtc_probe(struct platform_device *pdev) 2198c2ecf20Sopenharmony_ci{ 2208c2ecf20Sopenharmony_ci struct m48t86_rtc_info *info; 2218c2ecf20Sopenharmony_ci unsigned char reg; 2228c2ecf20Sopenharmony_ci int err; 2238c2ecf20Sopenharmony_ci struct nvmem_config m48t86_nvmem_cfg = { 2248c2ecf20Sopenharmony_ci .name = "m48t86_nvram", 2258c2ecf20Sopenharmony_ci .word_size = 1, 2268c2ecf20Sopenharmony_ci .stride = 1, 2278c2ecf20Sopenharmony_ci .size = M48T86_NVRAM_LEN, 2288c2ecf20Sopenharmony_ci .reg_read = m48t86_nvram_read, 2298c2ecf20Sopenharmony_ci .reg_write = m48t86_nvram_write, 2308c2ecf20Sopenharmony_ci .priv = &pdev->dev, 2318c2ecf20Sopenharmony_ci }; 2328c2ecf20Sopenharmony_ci 2338c2ecf20Sopenharmony_ci info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); 2348c2ecf20Sopenharmony_ci if (!info) 2358c2ecf20Sopenharmony_ci return -ENOMEM; 2368c2ecf20Sopenharmony_ci 2378c2ecf20Sopenharmony_ci info->index_reg = devm_platform_ioremap_resource(pdev, 0); 2388c2ecf20Sopenharmony_ci if (IS_ERR(info->index_reg)) 2398c2ecf20Sopenharmony_ci return PTR_ERR(info->index_reg); 2408c2ecf20Sopenharmony_ci 2418c2ecf20Sopenharmony_ci info->data_reg = devm_platform_ioremap_resource(pdev, 1); 2428c2ecf20Sopenharmony_ci if (IS_ERR(info->data_reg)) 2438c2ecf20Sopenharmony_ci return PTR_ERR(info->data_reg); 2448c2ecf20Sopenharmony_ci 2458c2ecf20Sopenharmony_ci dev_set_drvdata(&pdev->dev, info); 2468c2ecf20Sopenharmony_ci 2478c2ecf20Sopenharmony_ci if (!m48t86_verify_chip(pdev)) { 2488c2ecf20Sopenharmony_ci dev_info(&pdev->dev, "RTC not present\n"); 2498c2ecf20Sopenharmony_ci return -ENODEV; 2508c2ecf20Sopenharmony_ci } 2518c2ecf20Sopenharmony_ci 2528c2ecf20Sopenharmony_ci info->rtc = devm_rtc_allocate_device(&pdev->dev); 2538c2ecf20Sopenharmony_ci if (IS_ERR(info->rtc)) 2548c2ecf20Sopenharmony_ci return PTR_ERR(info->rtc); 2558c2ecf20Sopenharmony_ci 2568c2ecf20Sopenharmony_ci info->rtc->ops = &m48t86_rtc_ops; 2578c2ecf20Sopenharmony_ci info->rtc->nvram_old_abi = true; 2588c2ecf20Sopenharmony_ci 2598c2ecf20Sopenharmony_ci err = rtc_register_device(info->rtc); 2608c2ecf20Sopenharmony_ci if (err) 2618c2ecf20Sopenharmony_ci return err; 2628c2ecf20Sopenharmony_ci 2638c2ecf20Sopenharmony_ci rtc_nvmem_register(info->rtc, &m48t86_nvmem_cfg); 2648c2ecf20Sopenharmony_ci 2658c2ecf20Sopenharmony_ci /* read battery status */ 2668c2ecf20Sopenharmony_ci reg = m48t86_readb(&pdev->dev, M48T86_D); 2678c2ecf20Sopenharmony_ci dev_info(&pdev->dev, "battery %s\n", 2688c2ecf20Sopenharmony_ci (reg & M48T86_D_VRT) ? "ok" : "exhausted"); 2698c2ecf20Sopenharmony_ci 2708c2ecf20Sopenharmony_ci return 0; 2718c2ecf20Sopenharmony_ci} 2728c2ecf20Sopenharmony_ci 2738c2ecf20Sopenharmony_cistatic struct platform_driver m48t86_rtc_platform_driver = { 2748c2ecf20Sopenharmony_ci .driver = { 2758c2ecf20Sopenharmony_ci .name = "rtc-m48t86", 2768c2ecf20Sopenharmony_ci }, 2778c2ecf20Sopenharmony_ci .probe = m48t86_rtc_probe, 2788c2ecf20Sopenharmony_ci}; 2798c2ecf20Sopenharmony_ci 2808c2ecf20Sopenharmony_cimodule_platform_driver(m48t86_rtc_platform_driver); 2818c2ecf20Sopenharmony_ci 2828c2ecf20Sopenharmony_ciMODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>"); 2838c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("M48T86 RTC driver"); 2848c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 2858c2ecf20Sopenharmony_ciMODULE_ALIAS("platform:rtc-m48t86"); 286