18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Freescale FlexTimer Module (FTM) alarm device driver. 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright 2014 Freescale Semiconductor, Inc. 68c2ecf20Sopenharmony_ci * Copyright 2019-2020 NXP 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include <linux/device.h> 118c2ecf20Sopenharmony_ci#include <linux/err.h> 128c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 138c2ecf20Sopenharmony_ci#include <linux/io.h> 148c2ecf20Sopenharmony_ci#include <linux/of_address.h> 158c2ecf20Sopenharmony_ci#include <linux/of_irq.h> 168c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 178c2ecf20Sopenharmony_ci#include <linux/of.h> 188c2ecf20Sopenharmony_ci#include <linux/of_device.h> 198c2ecf20Sopenharmony_ci#include <linux/module.h> 208c2ecf20Sopenharmony_ci#include <linux/fsl/ftm.h> 218c2ecf20Sopenharmony_ci#include <linux/rtc.h> 228c2ecf20Sopenharmony_ci#include <linux/time.h> 238c2ecf20Sopenharmony_ci#include <linux/acpi.h> 248c2ecf20Sopenharmony_ci#include <linux/pm_wakeirq.h> 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci#define FTM_SC_CLK(c) ((c) << FTM_SC_CLK_MASK_SHIFT) 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci/* 298c2ecf20Sopenharmony_ci * Select Fixed frequency clock (32KHz) as clock source 308c2ecf20Sopenharmony_ci * of FlexTimer Module 318c2ecf20Sopenharmony_ci */ 328c2ecf20Sopenharmony_ci#define FTM_SC_CLKS_FIXED_FREQ 0x02 338c2ecf20Sopenharmony_ci#define FIXED_FREQ_CLK 32000 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci/* Select 128 (2^7) as divider factor */ 368c2ecf20Sopenharmony_ci#define MAX_FREQ_DIV (1 << FTM_SC_PS_MASK) 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci/* Maximum counter value in FlexTimer's CNT registers */ 398c2ecf20Sopenharmony_ci#define MAX_COUNT_VAL 0xffff 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_cistruct ftm_rtc { 428c2ecf20Sopenharmony_ci struct rtc_device *rtc_dev; 438c2ecf20Sopenharmony_ci void __iomem *base; 448c2ecf20Sopenharmony_ci bool big_endian; 458c2ecf20Sopenharmony_ci u32 alarm_freq; 468c2ecf20Sopenharmony_ci}; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_cistatic inline u32 rtc_readl(struct ftm_rtc *dev, u32 reg) 498c2ecf20Sopenharmony_ci{ 508c2ecf20Sopenharmony_ci if (dev->big_endian) 518c2ecf20Sopenharmony_ci return ioread32be(dev->base + reg); 528c2ecf20Sopenharmony_ci else 538c2ecf20Sopenharmony_ci return ioread32(dev->base + reg); 548c2ecf20Sopenharmony_ci} 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_cistatic inline void rtc_writel(struct ftm_rtc *dev, u32 reg, u32 val) 578c2ecf20Sopenharmony_ci{ 588c2ecf20Sopenharmony_ci if (dev->big_endian) 598c2ecf20Sopenharmony_ci iowrite32be(val, dev->base + reg); 608c2ecf20Sopenharmony_ci else 618c2ecf20Sopenharmony_ci iowrite32(val, dev->base + reg); 628c2ecf20Sopenharmony_ci} 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_cistatic inline void ftm_counter_enable(struct ftm_rtc *rtc) 658c2ecf20Sopenharmony_ci{ 668c2ecf20Sopenharmony_ci u32 val; 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci /* select and enable counter clock source */ 698c2ecf20Sopenharmony_ci val = rtc_readl(rtc, FTM_SC); 708c2ecf20Sopenharmony_ci val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK); 718c2ecf20Sopenharmony_ci val |= (FTM_SC_PS_MASK | FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ)); 728c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_SC, val); 738c2ecf20Sopenharmony_ci} 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_cistatic inline void ftm_counter_disable(struct ftm_rtc *rtc) 768c2ecf20Sopenharmony_ci{ 778c2ecf20Sopenharmony_ci u32 val; 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci /* disable counter clock source */ 808c2ecf20Sopenharmony_ci val = rtc_readl(rtc, FTM_SC); 818c2ecf20Sopenharmony_ci val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK); 828c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_SC, val); 838c2ecf20Sopenharmony_ci} 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_cistatic inline void ftm_irq_acknowledge(struct ftm_rtc *rtc) 868c2ecf20Sopenharmony_ci{ 878c2ecf20Sopenharmony_ci unsigned int timeout = 100; 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci /* 908c2ecf20Sopenharmony_ci *Fix errata A-007728 for flextimer 918c2ecf20Sopenharmony_ci * If the FTM counter reaches the FTM_MOD value between 928c2ecf20Sopenharmony_ci * the reading of the TOF bit and the writing of 0 to 938c2ecf20Sopenharmony_ci * the TOF bit, the process of clearing the TOF bit 948c2ecf20Sopenharmony_ci * does not work as expected when FTMx_CONF[NUMTOF] != 0 958c2ecf20Sopenharmony_ci * and the current TOF count is less than FTMx_CONF[NUMTOF]. 968c2ecf20Sopenharmony_ci * If the above condition is met, the TOF bit remains set. 978c2ecf20Sopenharmony_ci * If the TOF interrupt is enabled (FTMx_SC[TOIE] = 1),the 988c2ecf20Sopenharmony_ci * TOF interrupt also remains asserted. 998c2ecf20Sopenharmony_ci * 1008c2ecf20Sopenharmony_ci * Above is the errata discription 1018c2ecf20Sopenharmony_ci * 1028c2ecf20Sopenharmony_ci * In one word: software clearing TOF bit not works when 1038c2ecf20Sopenharmony_ci * FTMx_CONF[NUMTOF] was seted as nonzero and FTM counter 1048c2ecf20Sopenharmony_ci * reaches the FTM_MOD value. 1058c2ecf20Sopenharmony_ci * 1068c2ecf20Sopenharmony_ci * The workaround is clearing TOF bit until it works 1078c2ecf20Sopenharmony_ci * (FTM counter doesn't always reache the FTM_MOD anyway), 1088c2ecf20Sopenharmony_ci * which may cost some cycles. 1098c2ecf20Sopenharmony_ci */ 1108c2ecf20Sopenharmony_ci while ((FTM_SC_TOF & rtc_readl(rtc, FTM_SC)) && timeout--) 1118c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_SC, rtc_readl(rtc, FTM_SC) & (~FTM_SC_TOF)); 1128c2ecf20Sopenharmony_ci} 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_cistatic inline void ftm_irq_enable(struct ftm_rtc *rtc) 1158c2ecf20Sopenharmony_ci{ 1168c2ecf20Sopenharmony_ci u32 val; 1178c2ecf20Sopenharmony_ci 1188c2ecf20Sopenharmony_ci val = rtc_readl(rtc, FTM_SC); 1198c2ecf20Sopenharmony_ci val |= FTM_SC_TOIE; 1208c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_SC, val); 1218c2ecf20Sopenharmony_ci} 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_cistatic inline void ftm_irq_disable(struct ftm_rtc *rtc) 1248c2ecf20Sopenharmony_ci{ 1258c2ecf20Sopenharmony_ci u32 val; 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ci val = rtc_readl(rtc, FTM_SC); 1288c2ecf20Sopenharmony_ci val &= ~FTM_SC_TOIE; 1298c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_SC, val); 1308c2ecf20Sopenharmony_ci} 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_cistatic inline void ftm_reset_counter(struct ftm_rtc *rtc) 1338c2ecf20Sopenharmony_ci{ 1348c2ecf20Sopenharmony_ci /* 1358c2ecf20Sopenharmony_ci * The CNT register contains the FTM counter value. 1368c2ecf20Sopenharmony_ci * Reset clears the CNT register. Writing any value to COUNT 1378c2ecf20Sopenharmony_ci * updates the counter with its initial value, CNTIN. 1388c2ecf20Sopenharmony_ci */ 1398c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_CNT, 0x00); 1408c2ecf20Sopenharmony_ci} 1418c2ecf20Sopenharmony_ci 1428c2ecf20Sopenharmony_cistatic void ftm_clean_alarm(struct ftm_rtc *rtc) 1438c2ecf20Sopenharmony_ci{ 1448c2ecf20Sopenharmony_ci ftm_counter_disable(rtc); 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_CNTIN, 0x00); 1478c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_MOD, ~0U); 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ci ftm_reset_counter(rtc); 1508c2ecf20Sopenharmony_ci} 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_cistatic irqreturn_t ftm_rtc_alarm_interrupt(int irq, void *dev) 1538c2ecf20Sopenharmony_ci{ 1548c2ecf20Sopenharmony_ci struct ftm_rtc *rtc = dev; 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_ci rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF); 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_ci ftm_irq_acknowledge(rtc); 1598c2ecf20Sopenharmony_ci ftm_irq_disable(rtc); 1608c2ecf20Sopenharmony_ci ftm_clean_alarm(rtc); 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ci return IRQ_HANDLED; 1638c2ecf20Sopenharmony_ci} 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_cistatic int ftm_rtc_alarm_irq_enable(struct device *dev, 1668c2ecf20Sopenharmony_ci unsigned int enabled) 1678c2ecf20Sopenharmony_ci{ 1688c2ecf20Sopenharmony_ci struct ftm_rtc *rtc = dev_get_drvdata(dev); 1698c2ecf20Sopenharmony_ci 1708c2ecf20Sopenharmony_ci if (enabled) 1718c2ecf20Sopenharmony_ci ftm_irq_enable(rtc); 1728c2ecf20Sopenharmony_ci else 1738c2ecf20Sopenharmony_ci ftm_irq_disable(rtc); 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_ci return 0; 1768c2ecf20Sopenharmony_ci} 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_ci/* 1798c2ecf20Sopenharmony_ci * Note: 1808c2ecf20Sopenharmony_ci * The function is not really getting time from the RTC 1818c2ecf20Sopenharmony_ci * since FlexTimer is not a RTC device, but we need to 1828c2ecf20Sopenharmony_ci * get time to setup alarm, so we are using system time 1838c2ecf20Sopenharmony_ci * for now. 1848c2ecf20Sopenharmony_ci */ 1858c2ecf20Sopenharmony_cistatic int ftm_rtc_read_time(struct device *dev, struct rtc_time *tm) 1868c2ecf20Sopenharmony_ci{ 1878c2ecf20Sopenharmony_ci rtc_time64_to_tm(ktime_get_real_seconds(), tm); 1888c2ecf20Sopenharmony_ci 1898c2ecf20Sopenharmony_ci return 0; 1908c2ecf20Sopenharmony_ci} 1918c2ecf20Sopenharmony_ci 1928c2ecf20Sopenharmony_cistatic int ftm_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 1938c2ecf20Sopenharmony_ci{ 1948c2ecf20Sopenharmony_ci return 0; 1958c2ecf20Sopenharmony_ci} 1968c2ecf20Sopenharmony_ci 1978c2ecf20Sopenharmony_ci/* 1988c2ecf20Sopenharmony_ci * 1. Select fixed frequency clock (32KHz) as clock source; 1998c2ecf20Sopenharmony_ci * 2. Select 128 (2^7) as divider factor; 2008c2ecf20Sopenharmony_ci * So clock is 250 Hz (32KHz/128). 2018c2ecf20Sopenharmony_ci * 2028c2ecf20Sopenharmony_ci * 3. FlexTimer's CNT register is a 32bit register, 2038c2ecf20Sopenharmony_ci * but the register's 16 bit as counter value,it's other 16 bit 2048c2ecf20Sopenharmony_ci * is reserved.So minimum counter value is 0x0,maximum counter 2058c2ecf20Sopenharmony_ci * value is 0xffff. 2068c2ecf20Sopenharmony_ci * So max alarm value is 262 (65536 / 250) seconds 2078c2ecf20Sopenharmony_ci */ 2088c2ecf20Sopenharmony_cistatic int ftm_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 2098c2ecf20Sopenharmony_ci{ 2108c2ecf20Sopenharmony_ci time64_t alm_time; 2118c2ecf20Sopenharmony_ci unsigned long long cycle; 2128c2ecf20Sopenharmony_ci struct ftm_rtc *rtc = dev_get_drvdata(dev); 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ci alm_time = rtc_tm_to_time64(&alm->time); 2158c2ecf20Sopenharmony_ci 2168c2ecf20Sopenharmony_ci ftm_clean_alarm(rtc); 2178c2ecf20Sopenharmony_ci cycle = (alm_time - ktime_get_real_seconds()) * rtc->alarm_freq; 2188c2ecf20Sopenharmony_ci if (cycle > MAX_COUNT_VAL) { 2198c2ecf20Sopenharmony_ci pr_err("Out of alarm range {0~262} seconds.\n"); 2208c2ecf20Sopenharmony_ci return -ERANGE; 2218c2ecf20Sopenharmony_ci } 2228c2ecf20Sopenharmony_ci 2238c2ecf20Sopenharmony_ci ftm_irq_disable(rtc); 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_ci /* 2268c2ecf20Sopenharmony_ci * The counter increments until the value of MOD is reached, 2278c2ecf20Sopenharmony_ci * at which point the counter is reloaded with the value of CNTIN. 2288c2ecf20Sopenharmony_ci * The TOF (the overflow flag) bit is set when the FTM counter 2298c2ecf20Sopenharmony_ci * changes from MOD to CNTIN. So we should using the cycle - 1. 2308c2ecf20Sopenharmony_ci */ 2318c2ecf20Sopenharmony_ci rtc_writel(rtc, FTM_MOD, cycle - 1); 2328c2ecf20Sopenharmony_ci 2338c2ecf20Sopenharmony_ci ftm_counter_enable(rtc); 2348c2ecf20Sopenharmony_ci ftm_irq_enable(rtc); 2358c2ecf20Sopenharmony_ci 2368c2ecf20Sopenharmony_ci return 0; 2378c2ecf20Sopenharmony_ci 2388c2ecf20Sopenharmony_ci} 2398c2ecf20Sopenharmony_ci 2408c2ecf20Sopenharmony_cistatic const struct rtc_class_ops ftm_rtc_ops = { 2418c2ecf20Sopenharmony_ci .read_time = ftm_rtc_read_time, 2428c2ecf20Sopenharmony_ci .read_alarm = ftm_rtc_read_alarm, 2438c2ecf20Sopenharmony_ci .set_alarm = ftm_rtc_set_alarm, 2448c2ecf20Sopenharmony_ci .alarm_irq_enable = ftm_rtc_alarm_irq_enable, 2458c2ecf20Sopenharmony_ci}; 2468c2ecf20Sopenharmony_ci 2478c2ecf20Sopenharmony_cistatic int ftm_rtc_probe(struct platform_device *pdev) 2488c2ecf20Sopenharmony_ci{ 2498c2ecf20Sopenharmony_ci int irq; 2508c2ecf20Sopenharmony_ci int ret; 2518c2ecf20Sopenharmony_ci struct ftm_rtc *rtc; 2528c2ecf20Sopenharmony_ci 2538c2ecf20Sopenharmony_ci rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); 2548c2ecf20Sopenharmony_ci if (unlikely(!rtc)) { 2558c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "cannot alloc memory for rtc\n"); 2568c2ecf20Sopenharmony_ci return -ENOMEM; 2578c2ecf20Sopenharmony_ci } 2588c2ecf20Sopenharmony_ci 2598c2ecf20Sopenharmony_ci platform_set_drvdata(pdev, rtc); 2608c2ecf20Sopenharmony_ci 2618c2ecf20Sopenharmony_ci rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev); 2628c2ecf20Sopenharmony_ci if (IS_ERR(rtc->rtc_dev)) 2638c2ecf20Sopenharmony_ci return PTR_ERR(rtc->rtc_dev); 2648c2ecf20Sopenharmony_ci 2658c2ecf20Sopenharmony_ci rtc->base = devm_platform_ioremap_resource(pdev, 0); 2668c2ecf20Sopenharmony_ci if (IS_ERR(rtc->base)) { 2678c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "cannot ioremap resource for rtc\n"); 2688c2ecf20Sopenharmony_ci return PTR_ERR(rtc->base); 2698c2ecf20Sopenharmony_ci } 2708c2ecf20Sopenharmony_ci 2718c2ecf20Sopenharmony_ci irq = platform_get_irq(pdev, 0); 2728c2ecf20Sopenharmony_ci if (irq < 0) 2738c2ecf20Sopenharmony_ci return irq; 2748c2ecf20Sopenharmony_ci 2758c2ecf20Sopenharmony_ci ret = devm_request_irq(&pdev->dev, irq, ftm_rtc_alarm_interrupt, 2768c2ecf20Sopenharmony_ci 0, dev_name(&pdev->dev), rtc); 2778c2ecf20Sopenharmony_ci if (ret < 0) { 2788c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "failed to request irq\n"); 2798c2ecf20Sopenharmony_ci return ret; 2808c2ecf20Sopenharmony_ci } 2818c2ecf20Sopenharmony_ci 2828c2ecf20Sopenharmony_ci rtc->big_endian = 2838c2ecf20Sopenharmony_ci device_property_read_bool(&pdev->dev, "big-endian"); 2848c2ecf20Sopenharmony_ci 2858c2ecf20Sopenharmony_ci rtc->alarm_freq = (u32)FIXED_FREQ_CLK / (u32)MAX_FREQ_DIV; 2868c2ecf20Sopenharmony_ci rtc->rtc_dev->ops = &ftm_rtc_ops; 2878c2ecf20Sopenharmony_ci 2888c2ecf20Sopenharmony_ci device_init_wakeup(&pdev->dev, true); 2898c2ecf20Sopenharmony_ci ret = dev_pm_set_wake_irq(&pdev->dev, irq); 2908c2ecf20Sopenharmony_ci if (ret) 2918c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "failed to enable irq wake\n"); 2928c2ecf20Sopenharmony_ci 2938c2ecf20Sopenharmony_ci ret = rtc_register_device(rtc->rtc_dev); 2948c2ecf20Sopenharmony_ci if (ret) { 2958c2ecf20Sopenharmony_ci dev_err(&pdev->dev, "can't register rtc device\n"); 2968c2ecf20Sopenharmony_ci return ret; 2978c2ecf20Sopenharmony_ci } 2988c2ecf20Sopenharmony_ci 2998c2ecf20Sopenharmony_ci return 0; 3008c2ecf20Sopenharmony_ci} 3018c2ecf20Sopenharmony_ci 3028c2ecf20Sopenharmony_cistatic const struct of_device_id ftm_rtc_match[] = { 3038c2ecf20Sopenharmony_ci { .compatible = "fsl,ls1012a-ftm-alarm", }, 3048c2ecf20Sopenharmony_ci { .compatible = "fsl,ls1021a-ftm-alarm", }, 3058c2ecf20Sopenharmony_ci { .compatible = "fsl,ls1028a-ftm-alarm", }, 3068c2ecf20Sopenharmony_ci { .compatible = "fsl,ls1043a-ftm-alarm", }, 3078c2ecf20Sopenharmony_ci { .compatible = "fsl,ls1046a-ftm-alarm", }, 3088c2ecf20Sopenharmony_ci { .compatible = "fsl,ls1088a-ftm-alarm", }, 3098c2ecf20Sopenharmony_ci { .compatible = "fsl,ls208xa-ftm-alarm", }, 3108c2ecf20Sopenharmony_ci { .compatible = "fsl,lx2160a-ftm-alarm", }, 3118c2ecf20Sopenharmony_ci { }, 3128c2ecf20Sopenharmony_ci}; 3138c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, ftm_rtc_match); 3148c2ecf20Sopenharmony_ci 3158c2ecf20Sopenharmony_cistatic const struct acpi_device_id ftm_imx_acpi_ids[] = { 3168c2ecf20Sopenharmony_ci {"NXP0014",}, 3178c2ecf20Sopenharmony_ci { } 3188c2ecf20Sopenharmony_ci}; 3198c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(acpi, ftm_imx_acpi_ids); 3208c2ecf20Sopenharmony_ci 3218c2ecf20Sopenharmony_cistatic struct platform_driver ftm_rtc_driver = { 3228c2ecf20Sopenharmony_ci .probe = ftm_rtc_probe, 3238c2ecf20Sopenharmony_ci .driver = { 3248c2ecf20Sopenharmony_ci .name = "ftm-alarm", 3258c2ecf20Sopenharmony_ci .of_match_table = ftm_rtc_match, 3268c2ecf20Sopenharmony_ci .acpi_match_table = ACPI_PTR(ftm_imx_acpi_ids), 3278c2ecf20Sopenharmony_ci }, 3288c2ecf20Sopenharmony_ci}; 3298c2ecf20Sopenharmony_ci 3308c2ecf20Sopenharmony_cistatic int __init ftm_alarm_init(void) 3318c2ecf20Sopenharmony_ci{ 3328c2ecf20Sopenharmony_ci return platform_driver_register(&ftm_rtc_driver); 3338c2ecf20Sopenharmony_ci} 3348c2ecf20Sopenharmony_ci 3358c2ecf20Sopenharmony_cidevice_initcall(ftm_alarm_init); 3368c2ecf20Sopenharmony_ci 3378c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("NXP/Freescale FlexTimer alarm driver"); 3388c2ecf20Sopenharmony_ciMODULE_AUTHOR("Biwen Li <biwen.li@nxp.com>"); 3398c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 340