1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Real Time Clock interface for Linux on Atmel AT91RM9200 4 * 5 * Copyright (C) 2002 Rick Bronson 6 * 7 * Converted to RTC class model by Andrew Victor 8 * 9 * Ported to Linux 2.6 by Steven Scholz 10 * Based on s3c2410-rtc.c Simtec Electronics 11 * 12 * Based on sa1100-rtc.c by Nils Faerber 13 * Based on rtc.c by Paul Gortmaker 14 */ 15 16#include <linux/bcd.h> 17#include <linux/bitfield.h> 18#include <linux/clk.h> 19#include <linux/completion.h> 20#include <linux/interrupt.h> 21#include <linux/ioctl.h> 22#include <linux/io.h> 23#include <linux/kernel.h> 24#include <linux/module.h> 25#include <linux/of_device.h> 26#include <linux/of.h> 27#include <linux/platform_device.h> 28#include <linux/rtc.h> 29#include <linux/spinlock.h> 30#include <linux/suspend.h> 31#include <linux/time.h> 32#include <linux/uaccess.h> 33 34#define AT91_RTC_CR 0x00 /* Control Register */ 35#define AT91_RTC_UPDTIM BIT(0) /* Update Request Time Register */ 36#define AT91_RTC_UPDCAL BIT(1) /* Update Request Calendar Register */ 37 38#define AT91_RTC_MR 0x04 /* Mode Register */ 39 40#define AT91_RTC_TIMR 0x08 /* Time Register */ 41#define AT91_RTC_SEC GENMASK(6, 0) /* Current Second */ 42#define AT91_RTC_MIN GENMASK(14, 8) /* Current Minute */ 43#define AT91_RTC_HOUR GENMASK(21, 16) /* Current Hour */ 44#define AT91_RTC_AMPM BIT(22) /* Ante Meridiem Post Meridiem Indicator */ 45 46#define AT91_RTC_CALR 0x0c /* Calendar Register */ 47#define AT91_RTC_CENT GENMASK(6, 0) /* Current Century */ 48#define AT91_RTC_YEAR GENMASK(15, 8) /* Current Year */ 49#define AT91_RTC_MONTH GENMASK(20, 16) /* Current Month */ 50#define AT91_RTC_DAY GENMASK(23, 21) /* Current Day */ 51#define AT91_RTC_DATE GENMASK(29, 24) /* Current Date */ 52 53#define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */ 54#define AT91_RTC_SECEN BIT(7) /* Second Alarm Enable */ 55#define AT91_RTC_MINEN BIT(15) /* Minute Alarm Enable */ 56#define AT91_RTC_HOUREN BIT(23) /* Hour Alarm Enable */ 57 58#define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */ 59#define AT91_RTC_MTHEN BIT(23) /* Month Alarm Enable */ 60#define AT91_RTC_DATEEN BIT(31) /* Date Alarm Enable */ 61 62#define AT91_RTC_SR 0x18 /* Status Register */ 63#define AT91_RTC_ACKUPD BIT(0) /* Acknowledge for Update */ 64#define AT91_RTC_ALARM BIT(1) /* Alarm Flag */ 65#define AT91_RTC_SECEV BIT(2) /* Second Event */ 66#define AT91_RTC_TIMEV BIT(3) /* Time Event */ 67#define AT91_RTC_CALEV BIT(4) /* Calendar Event */ 68 69#define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */ 70#define AT91_RTC_IER 0x20 /* Interrupt Enable Register */ 71#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ 72#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ 73 74#define AT91_RTC_VER 0x2c /* Valid Entry Register */ 75#define AT91_RTC_NVTIM BIT(0) /* Non valid Time */ 76#define AT91_RTC_NVCAL BIT(1) /* Non valid Calendar */ 77#define AT91_RTC_NVTIMALR BIT(2) /* Non valid Time Alarm */ 78#define AT91_RTC_NVCALALR BIT(3) /* Non valid Calendar Alarm */ 79 80#define at91_rtc_read(field) \ 81 readl_relaxed(at91_rtc_regs + field) 82#define at91_rtc_write(field, val) \ 83 writel_relaxed((val), at91_rtc_regs + field) 84 85struct at91_rtc_config { 86 bool use_shadow_imr; 87}; 88 89static const struct at91_rtc_config *at91_rtc_config; 90static DECLARE_COMPLETION(at91_rtc_updated); 91static DECLARE_COMPLETION(at91_rtc_upd_rdy); 92static void __iomem *at91_rtc_regs; 93static int irq; 94static DEFINE_SPINLOCK(at91_rtc_lock); 95static u32 at91_rtc_shadow_imr; 96static bool suspended; 97static DEFINE_SPINLOCK(suspended_lock); 98static unsigned long cached_events; 99static u32 at91_rtc_imr; 100static struct clk *sclk; 101 102static void at91_rtc_write_ier(u32 mask) 103{ 104 unsigned long flags; 105 106 spin_lock_irqsave(&at91_rtc_lock, flags); 107 at91_rtc_shadow_imr |= mask; 108 at91_rtc_write(AT91_RTC_IER, mask); 109 spin_unlock_irqrestore(&at91_rtc_lock, flags); 110} 111 112static void at91_rtc_write_idr(u32 mask) 113{ 114 unsigned long flags; 115 116 spin_lock_irqsave(&at91_rtc_lock, flags); 117 at91_rtc_write(AT91_RTC_IDR, mask); 118 /* 119 * Register read back (of any RTC-register) needed to make sure 120 * IDR-register write has reached the peripheral before updating 121 * shadow mask. 122 * 123 * Note that there is still a possibility that the mask is updated 124 * before interrupts have actually been disabled in hardware. The only 125 * way to be certain would be to poll the IMR-register, which is is 126 * the very register we are trying to emulate. The register read back 127 * is a reasonable heuristic. 128 */ 129 at91_rtc_read(AT91_RTC_SR); 130 at91_rtc_shadow_imr &= ~mask; 131 spin_unlock_irqrestore(&at91_rtc_lock, flags); 132} 133 134static u32 at91_rtc_read_imr(void) 135{ 136 unsigned long flags; 137 u32 mask; 138 139 if (at91_rtc_config->use_shadow_imr) { 140 spin_lock_irqsave(&at91_rtc_lock, flags); 141 mask = at91_rtc_shadow_imr; 142 spin_unlock_irqrestore(&at91_rtc_lock, flags); 143 } else { 144 mask = at91_rtc_read(AT91_RTC_IMR); 145 } 146 147 return mask; 148} 149 150/* 151 * Decode time/date into rtc_time structure 152 */ 153static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, 154 struct rtc_time *tm) 155{ 156 unsigned int time, date; 157 158 /* must read twice in case it changes */ 159 do { 160 time = at91_rtc_read(timereg); 161 date = at91_rtc_read(calreg); 162 } while ((time != at91_rtc_read(timereg)) || 163 (date != at91_rtc_read(calreg))); 164 165 tm->tm_sec = bcd2bin(FIELD_GET(AT91_RTC_SEC, time)); 166 tm->tm_min = bcd2bin(FIELD_GET(AT91_RTC_MIN, time)); 167 tm->tm_hour = bcd2bin(FIELD_GET(AT91_RTC_HOUR, time)); 168 169 /* 170 * The Calendar Alarm register does not have a field for 171 * the year - so these will return an invalid value. 172 */ 173 tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100; /* century */ 174 tm->tm_year += bcd2bin(FIELD_GET(AT91_RTC_YEAR, date)); /* year */ 175 176 tm->tm_wday = bcd2bin(FIELD_GET(AT91_RTC_DAY, date)) - 1; /* day of the week [0-6], Sunday=0 */ 177 tm->tm_mon = bcd2bin(FIELD_GET(AT91_RTC_MONTH, date)) - 1; 178 tm->tm_mday = bcd2bin(FIELD_GET(AT91_RTC_DATE, date)); 179} 180 181/* 182 * Read current time and date in RTC 183 */ 184static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) 185{ 186 at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm); 187 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); 188 tm->tm_year = tm->tm_year - 1900; 189 190 dev_dbg(dev, "%s(): %ptR\n", __func__, tm); 191 192 return 0; 193} 194 195/* 196 * Set current time and date in RTC 197 */ 198static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) 199{ 200 unsigned long cr; 201 202 dev_dbg(dev, "%s(): %ptR\n", __func__, tm); 203 204 wait_for_completion(&at91_rtc_upd_rdy); 205 206 /* Stop Time/Calendar from counting */ 207 cr = at91_rtc_read(AT91_RTC_CR); 208 at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); 209 210 at91_rtc_write_ier(AT91_RTC_ACKUPD); 211 wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ 212 at91_rtc_write_idr(AT91_RTC_ACKUPD); 213 214 at91_rtc_write(AT91_RTC_TIMR, 215 FIELD_PREP(AT91_RTC_SEC, bin2bcd(tm->tm_sec)) 216 | FIELD_PREP(AT91_RTC_MIN, bin2bcd(tm->tm_min)) 217 | FIELD_PREP(AT91_RTC_HOUR, bin2bcd(tm->tm_hour))); 218 219 at91_rtc_write(AT91_RTC_CALR, 220 FIELD_PREP(AT91_RTC_CENT, 221 bin2bcd((tm->tm_year + 1900) / 100)) 222 | FIELD_PREP(AT91_RTC_YEAR, bin2bcd(tm->tm_year % 100)) 223 | FIELD_PREP(AT91_RTC_MONTH, bin2bcd(tm->tm_mon + 1)) 224 | FIELD_PREP(AT91_RTC_DAY, bin2bcd(tm->tm_wday + 1)) 225 | FIELD_PREP(AT91_RTC_DATE, bin2bcd(tm->tm_mday))); 226 227 /* Restart Time/Calendar */ 228 cr = at91_rtc_read(AT91_RTC_CR); 229 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV); 230 at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); 231 at91_rtc_write_ier(AT91_RTC_SECEV); 232 233 return 0; 234} 235 236/* 237 * Read alarm time and date in RTC 238 */ 239static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) 240{ 241 struct rtc_time *tm = &alrm->time; 242 243 at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm); 244 tm->tm_year = -1; 245 246 alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM) 247 ? 1 : 0; 248 249 dev_dbg(dev, "%s(): %ptR %sabled\n", __func__, tm, 250 alrm->enabled ? "en" : "dis"); 251 252 return 0; 253} 254 255/* 256 * Set alarm time and date in RTC 257 */ 258static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 259{ 260 struct rtc_time tm = alrm->time; 261 262 at91_rtc_write_idr(AT91_RTC_ALARM); 263 at91_rtc_write(AT91_RTC_TIMALR, 264 FIELD_PREP(AT91_RTC_SEC, bin2bcd(alrm->time.tm_sec)) 265 | FIELD_PREP(AT91_RTC_MIN, bin2bcd(alrm->time.tm_min)) 266 | FIELD_PREP(AT91_RTC_HOUR, bin2bcd(alrm->time.tm_hour)) 267 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); 268 at91_rtc_write(AT91_RTC_CALALR, 269 FIELD_PREP(AT91_RTC_MONTH, bin2bcd(alrm->time.tm_mon + 1)) 270 | FIELD_PREP(AT91_RTC_DATE, bin2bcd(alrm->time.tm_mday)) 271 | AT91_RTC_DATEEN | AT91_RTC_MTHEN); 272 273 if (alrm->enabled) { 274 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 275 at91_rtc_write_ier(AT91_RTC_ALARM); 276 } 277 278 dev_dbg(dev, "%s(): %ptR\n", __func__, &tm); 279 280 return 0; 281} 282 283static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 284{ 285 dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled); 286 287 if (enabled) { 288 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 289 at91_rtc_write_ier(AT91_RTC_ALARM); 290 } else 291 at91_rtc_write_idr(AT91_RTC_ALARM); 292 293 return 0; 294} 295 296/* 297 * IRQ handler for the RTC 298 */ 299static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) 300{ 301 struct platform_device *pdev = dev_id; 302 struct rtc_device *rtc = platform_get_drvdata(pdev); 303 unsigned int rtsr; 304 unsigned long events = 0; 305 int ret = IRQ_NONE; 306 307 spin_lock(&suspended_lock); 308 rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr(); 309 if (rtsr) { /* this interrupt is shared! Is it ours? */ 310 if (rtsr & AT91_RTC_ALARM) 311 events |= (RTC_AF | RTC_IRQF); 312 if (rtsr & AT91_RTC_SECEV) { 313 complete(&at91_rtc_upd_rdy); 314 at91_rtc_write_idr(AT91_RTC_SECEV); 315 } 316 if (rtsr & AT91_RTC_ACKUPD) 317 complete(&at91_rtc_updated); 318 319 at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ 320 321 if (!suspended) { 322 rtc_update_irq(rtc, 1, events); 323 324 dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n", 325 __func__, events >> 8, events & 0x000000FF); 326 } else { 327 cached_events |= events; 328 at91_rtc_write_idr(at91_rtc_imr); 329 pm_system_wakeup(); 330 } 331 332 ret = IRQ_HANDLED; 333 } 334 spin_unlock(&suspended_lock); 335 336 return ret; 337} 338 339static const struct at91_rtc_config at91rm9200_config = { 340}; 341 342static const struct at91_rtc_config at91sam9x5_config = { 343 .use_shadow_imr = true, 344}; 345 346static const struct of_device_id at91_rtc_dt_ids[] = { 347 { 348 .compatible = "atmel,at91rm9200-rtc", 349 .data = &at91rm9200_config, 350 }, { 351 .compatible = "atmel,at91sam9x5-rtc", 352 .data = &at91sam9x5_config, 353 }, { 354 .compatible = "atmel,sama5d4-rtc", 355 .data = &at91rm9200_config, 356 }, { 357 .compatible = "atmel,sama5d2-rtc", 358 .data = &at91rm9200_config, 359 }, { 360 /* sentinel */ 361 } 362}; 363MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids); 364 365static const struct rtc_class_ops at91_rtc_ops = { 366 .read_time = at91_rtc_readtime, 367 .set_time = at91_rtc_settime, 368 .read_alarm = at91_rtc_readalarm, 369 .set_alarm = at91_rtc_setalarm, 370 .alarm_irq_enable = at91_rtc_alarm_irq_enable, 371}; 372 373/* 374 * Initialize and install RTC driver 375 */ 376static int __init at91_rtc_probe(struct platform_device *pdev) 377{ 378 struct rtc_device *rtc; 379 struct resource *regs; 380 int ret = 0; 381 382 at91_rtc_config = of_device_get_match_data(&pdev->dev); 383 if (!at91_rtc_config) 384 return -ENODEV; 385 386 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 387 if (!regs) { 388 dev_err(&pdev->dev, "no mmio resource defined\n"); 389 return -ENXIO; 390 } 391 392 irq = platform_get_irq(pdev, 0); 393 if (irq < 0) 394 return -ENXIO; 395 396 at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start, 397 resource_size(regs)); 398 if (!at91_rtc_regs) { 399 dev_err(&pdev->dev, "failed to map registers, aborting.\n"); 400 return -ENOMEM; 401 } 402 403 rtc = devm_rtc_allocate_device(&pdev->dev); 404 if (IS_ERR(rtc)) 405 return PTR_ERR(rtc); 406 platform_set_drvdata(pdev, rtc); 407 408 sclk = devm_clk_get(&pdev->dev, NULL); 409 if (IS_ERR(sclk)) 410 return PTR_ERR(sclk); 411 412 ret = clk_prepare_enable(sclk); 413 if (ret) { 414 dev_err(&pdev->dev, "Could not enable slow clock\n"); 415 return ret; 416 } 417 418 at91_rtc_write(AT91_RTC_CR, 0); 419 at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */ 420 421 /* Disable all interrupts */ 422 at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM | 423 AT91_RTC_SECEV | AT91_RTC_TIMEV | 424 AT91_RTC_CALEV); 425 426 ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt, 427 IRQF_SHARED | IRQF_COND_SUSPEND, 428 "at91_rtc", pdev); 429 if (ret) { 430 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq); 431 goto err_clk; 432 } 433 434 /* cpu init code should really have flagged this device as 435 * being wake-capable; if it didn't, do that here. 436 */ 437 if (!device_can_wakeup(&pdev->dev)) 438 device_init_wakeup(&pdev->dev, 1); 439 440 rtc->ops = &at91_rtc_ops; 441 rtc->range_min = RTC_TIMESTAMP_BEGIN_1900; 442 rtc->range_max = RTC_TIMESTAMP_END_2099; 443 ret = rtc_register_device(rtc); 444 if (ret) 445 goto err_clk; 446 447 /* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy 448 * completion. 449 */ 450 at91_rtc_write_ier(AT91_RTC_SECEV); 451 452 dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n"); 453 return 0; 454 455err_clk: 456 clk_disable_unprepare(sclk); 457 458 return ret; 459} 460 461/* 462 * Disable and remove the RTC driver 463 */ 464static int __exit at91_rtc_remove(struct platform_device *pdev) 465{ 466 /* Disable all interrupts */ 467 at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM | 468 AT91_RTC_SECEV | AT91_RTC_TIMEV | 469 AT91_RTC_CALEV); 470 471 clk_disable_unprepare(sclk); 472 473 return 0; 474} 475 476static void at91_rtc_shutdown(struct platform_device *pdev) 477{ 478 /* Disable all interrupts */ 479 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | 480 AT91_RTC_SECEV | AT91_RTC_TIMEV | 481 AT91_RTC_CALEV); 482} 483 484#ifdef CONFIG_PM_SLEEP 485 486/* AT91RM9200 RTC Power management control */ 487 488static int at91_rtc_suspend(struct device *dev) 489{ 490 /* this IRQ is shared with DBGU and other hardware which isn't 491 * necessarily doing PM like we are... 492 */ 493 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); 494 495 at91_rtc_imr = at91_rtc_read_imr() 496 & (AT91_RTC_ALARM|AT91_RTC_SECEV); 497 if (at91_rtc_imr) { 498 if (device_may_wakeup(dev)) { 499 unsigned long flags; 500 501 enable_irq_wake(irq); 502 503 spin_lock_irqsave(&suspended_lock, flags); 504 suspended = true; 505 spin_unlock_irqrestore(&suspended_lock, flags); 506 } else { 507 at91_rtc_write_idr(at91_rtc_imr); 508 } 509 } 510 return 0; 511} 512 513static int at91_rtc_resume(struct device *dev) 514{ 515 struct rtc_device *rtc = dev_get_drvdata(dev); 516 517 if (at91_rtc_imr) { 518 if (device_may_wakeup(dev)) { 519 unsigned long flags; 520 521 spin_lock_irqsave(&suspended_lock, flags); 522 523 if (cached_events) { 524 rtc_update_irq(rtc, 1, cached_events); 525 cached_events = 0; 526 } 527 528 suspended = false; 529 spin_unlock_irqrestore(&suspended_lock, flags); 530 531 disable_irq_wake(irq); 532 } 533 at91_rtc_write_ier(at91_rtc_imr); 534 } 535 return 0; 536} 537#endif 538 539static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume); 540 541static struct platform_driver at91_rtc_driver = { 542 .remove = __exit_p(at91_rtc_remove), 543 .shutdown = at91_rtc_shutdown, 544 .driver = { 545 .name = "at91_rtc", 546 .pm = &at91_rtc_pm_ops, 547 .of_match_table = of_match_ptr(at91_rtc_dt_ids), 548 }, 549}; 550 551module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe); 552 553MODULE_AUTHOR("Rick Bronson"); 554MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200"); 555MODULE_LICENSE("GPL"); 556MODULE_ALIAS("platform:at91_rtc"); 557