18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (C) 2013 STMicroelectronics (R&D) Limited 48c2ecf20Sopenharmony_ci * Author: Stephen Gallimore <stephen.gallimore@st.com> 58c2ecf20Sopenharmony_ci */ 68c2ecf20Sopenharmony_ci#ifndef __STI_RESET_SYSCFG_H 78c2ecf20Sopenharmony_ci#define __STI_RESET_SYSCFG_H 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#include <linux/device.h> 108c2ecf20Sopenharmony_ci#include <linux/regmap.h> 118c2ecf20Sopenharmony_ci#include <linux/reset-controller.h> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci/** 148c2ecf20Sopenharmony_ci * Reset channel description for a system configuration register based 158c2ecf20Sopenharmony_ci * reset controller. 168c2ecf20Sopenharmony_ci * 178c2ecf20Sopenharmony_ci * @compatible: Compatible string of the syscon regmap containing this 188c2ecf20Sopenharmony_ci * channel's control and ack (status) bits. 198c2ecf20Sopenharmony_ci * @reset: Regmap field description of the channel's reset bit. 208c2ecf20Sopenharmony_ci * @ack: Regmap field description of the channel's acknowledge bit. 218c2ecf20Sopenharmony_ci */ 228c2ecf20Sopenharmony_cistruct syscfg_reset_channel_data { 238c2ecf20Sopenharmony_ci const char *compatible; 248c2ecf20Sopenharmony_ci struct reg_field reset; 258c2ecf20Sopenharmony_ci struct reg_field ack; 268c2ecf20Sopenharmony_ci}; 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci#define _SYSCFG_RST_CH(_c, _rr, _rb, _ar, _ab) \ 298c2ecf20Sopenharmony_ci { .compatible = _c, \ 308c2ecf20Sopenharmony_ci .reset = REG_FIELD(_rr, _rb, _rb), \ 318c2ecf20Sopenharmony_ci .ack = REG_FIELD(_ar, _ab, _ab), } 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#define _SYSCFG_RST_CH_NO_ACK(_c, _rr, _rb) \ 348c2ecf20Sopenharmony_ci { .compatible = _c, \ 358c2ecf20Sopenharmony_ci .reset = REG_FIELD(_rr, _rb, _rb), } 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci/** 388c2ecf20Sopenharmony_ci * Description of a system configuration register based reset controller. 398c2ecf20Sopenharmony_ci * 408c2ecf20Sopenharmony_ci * @wait_for_ack: The controller will wait for reset assert and de-assert to 418c2ecf20Sopenharmony_ci * be "ack'd" in a channel's ack field. 428c2ecf20Sopenharmony_ci * @active_low: Are the resets in this controller active low, i.e. clearing 438c2ecf20Sopenharmony_ci * the reset bit puts the hardware into reset. 448c2ecf20Sopenharmony_ci * @nr_channels: The number of reset channels in this controller. 458c2ecf20Sopenharmony_ci * @channels: An array of reset channel descriptions. 468c2ecf20Sopenharmony_ci */ 478c2ecf20Sopenharmony_cistruct syscfg_reset_controller_data { 488c2ecf20Sopenharmony_ci bool wait_for_ack; 498c2ecf20Sopenharmony_ci bool active_low; 508c2ecf20Sopenharmony_ci int nr_channels; 518c2ecf20Sopenharmony_ci const struct syscfg_reset_channel_data *channels; 528c2ecf20Sopenharmony_ci}; 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci/** 558c2ecf20Sopenharmony_ci * syscfg_reset_probe(): platform device probe function used by syscfg 568c2ecf20Sopenharmony_ci * reset controller drivers. This registers a reset 578c2ecf20Sopenharmony_ci * controller configured by the OF match data for 588c2ecf20Sopenharmony_ci * the compatible device which should be of type 598c2ecf20Sopenharmony_ci * "struct syscfg_reset_controller_data". 608c2ecf20Sopenharmony_ci * 618c2ecf20Sopenharmony_ci * @pdev: platform device 628c2ecf20Sopenharmony_ci */ 638c2ecf20Sopenharmony_ciint syscfg_reset_probe(struct platform_device *pdev); 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci#endif /* __STI_RESET_SYSCFG_H */ 66