18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright Intel Corporation (C) 2017. All Rights Reserved 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Reset driver for Altera Arria10 MAX5 System Resource Chip 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Adapted from reset-socfpga.c 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include <linux/err.h> 118c2ecf20Sopenharmony_ci#include <linux/mfd/altera-a10sr.h> 128c2ecf20Sopenharmony_ci#include <linux/module.h> 138c2ecf20Sopenharmony_ci#include <linux/of.h> 148c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 158c2ecf20Sopenharmony_ci#include <linux/reset-controller.h> 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci#include <dt-bindings/reset/altr,rst-mgr-a10sr.h> 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_cistruct a10sr_reset { 208c2ecf20Sopenharmony_ci struct reset_controller_dev rcdev; 218c2ecf20Sopenharmony_ci struct regmap *regmap; 228c2ecf20Sopenharmony_ci}; 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_cistatic inline struct a10sr_reset *to_a10sr_rst(struct reset_controller_dev *rc) 258c2ecf20Sopenharmony_ci{ 268c2ecf20Sopenharmony_ci return container_of(rc, struct a10sr_reset, rcdev); 278c2ecf20Sopenharmony_ci} 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_cistatic inline int a10sr_reset_shift(unsigned long id) 308c2ecf20Sopenharmony_ci{ 318c2ecf20Sopenharmony_ci switch (id) { 328c2ecf20Sopenharmony_ci case A10SR_RESET_ENET_HPS: 338c2ecf20Sopenharmony_ci return 1; 348c2ecf20Sopenharmony_ci case A10SR_RESET_PCIE: 358c2ecf20Sopenharmony_ci case A10SR_RESET_FILE: 368c2ecf20Sopenharmony_ci case A10SR_RESET_BQSPI: 378c2ecf20Sopenharmony_ci case A10SR_RESET_USB: 388c2ecf20Sopenharmony_ci return id + 11; 398c2ecf20Sopenharmony_ci default: 408c2ecf20Sopenharmony_ci return -EINVAL; 418c2ecf20Sopenharmony_ci } 428c2ecf20Sopenharmony_ci} 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_cistatic int a10sr_reset_update(struct reset_controller_dev *rcdev, 458c2ecf20Sopenharmony_ci unsigned long id, bool assert) 468c2ecf20Sopenharmony_ci{ 478c2ecf20Sopenharmony_ci struct a10sr_reset *a10r = to_a10sr_rst(rcdev); 488c2ecf20Sopenharmony_ci int offset = a10sr_reset_shift(id); 498c2ecf20Sopenharmony_ci u8 mask = ALTR_A10SR_REG_BIT_MASK(offset); 508c2ecf20Sopenharmony_ci int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset); 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci return regmap_update_bits(a10r->regmap, index, mask, assert ? 0 : mask); 538c2ecf20Sopenharmony_ci} 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_cistatic int a10sr_reset_assert(struct reset_controller_dev *rcdev, 568c2ecf20Sopenharmony_ci unsigned long id) 578c2ecf20Sopenharmony_ci{ 588c2ecf20Sopenharmony_ci return a10sr_reset_update(rcdev, id, true); 598c2ecf20Sopenharmony_ci} 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_cistatic int a10sr_reset_deassert(struct reset_controller_dev *rcdev, 628c2ecf20Sopenharmony_ci unsigned long id) 638c2ecf20Sopenharmony_ci{ 648c2ecf20Sopenharmony_ci return a10sr_reset_update(rcdev, id, false); 658c2ecf20Sopenharmony_ci} 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_cistatic int a10sr_reset_status(struct reset_controller_dev *rcdev, 688c2ecf20Sopenharmony_ci unsigned long id) 698c2ecf20Sopenharmony_ci{ 708c2ecf20Sopenharmony_ci int ret; 718c2ecf20Sopenharmony_ci struct a10sr_reset *a10r = to_a10sr_rst(rcdev); 728c2ecf20Sopenharmony_ci int offset = a10sr_reset_shift(id); 738c2ecf20Sopenharmony_ci u8 mask = ALTR_A10SR_REG_BIT_MASK(offset); 748c2ecf20Sopenharmony_ci int index = ALTR_A10SR_HPS_RST_REG + ALTR_A10SR_REG_OFFSET(offset); 758c2ecf20Sopenharmony_ci unsigned int value; 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ci ret = regmap_read(a10r->regmap, index, &value); 788c2ecf20Sopenharmony_ci if (ret < 0) 798c2ecf20Sopenharmony_ci return ret; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci return !!(value & mask); 828c2ecf20Sopenharmony_ci} 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_cistatic const struct reset_control_ops a10sr_reset_ops = { 858c2ecf20Sopenharmony_ci .assert = a10sr_reset_assert, 868c2ecf20Sopenharmony_ci .deassert = a10sr_reset_deassert, 878c2ecf20Sopenharmony_ci .status = a10sr_reset_status, 888c2ecf20Sopenharmony_ci}; 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_cistatic int a10sr_reset_probe(struct platform_device *pdev) 918c2ecf20Sopenharmony_ci{ 928c2ecf20Sopenharmony_ci struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent); 938c2ecf20Sopenharmony_ci struct a10sr_reset *a10r; 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci a10r = devm_kzalloc(&pdev->dev, sizeof(struct a10sr_reset), 968c2ecf20Sopenharmony_ci GFP_KERNEL); 978c2ecf20Sopenharmony_ci if (!a10r) 988c2ecf20Sopenharmony_ci return -ENOMEM; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci a10r->rcdev.owner = THIS_MODULE; 1018c2ecf20Sopenharmony_ci a10r->rcdev.nr_resets = A10SR_RESET_NUM; 1028c2ecf20Sopenharmony_ci a10r->rcdev.ops = &a10sr_reset_ops; 1038c2ecf20Sopenharmony_ci a10r->rcdev.of_node = pdev->dev.of_node; 1048c2ecf20Sopenharmony_ci a10r->regmap = a10sr->regmap; 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ci platform_set_drvdata(pdev, a10r); 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci return devm_reset_controller_register(&pdev->dev, &a10r->rcdev); 1098c2ecf20Sopenharmony_ci} 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_cistatic const struct of_device_id a10sr_reset_of_match[] = { 1128c2ecf20Sopenharmony_ci { .compatible = "altr,a10sr-reset" }, 1138c2ecf20Sopenharmony_ci { }, 1148c2ecf20Sopenharmony_ci}; 1158c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, a10sr_reset_of_match); 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_cistatic struct platform_driver a10sr_reset_driver = { 1188c2ecf20Sopenharmony_ci .probe = a10sr_reset_probe, 1198c2ecf20Sopenharmony_ci .driver = { 1208c2ecf20Sopenharmony_ci .name = "altr_a10sr_reset", 1218c2ecf20Sopenharmony_ci .of_match_table = a10sr_reset_of_match, 1228c2ecf20Sopenharmony_ci }, 1238c2ecf20Sopenharmony_ci}; 1248c2ecf20Sopenharmony_cimodule_platform_driver(a10sr_reset_driver); 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ciMODULE_AUTHOR("Thor Thayer <thor.thayer@linux.intel.com>"); 1278c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Altera Arria10 System Resource Reset Controller Driver"); 1288c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2"); 129