18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ciconfig ARCH_HAS_RESET_CONTROLLER 38c2ecf20Sopenharmony_ci bool 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_cimenuconfig RESET_CONTROLLER 68c2ecf20Sopenharmony_ci bool "Reset Controller Support" 78c2ecf20Sopenharmony_ci default y if ARCH_HAS_RESET_CONTROLLER 88c2ecf20Sopenharmony_ci help 98c2ecf20Sopenharmony_ci Generic Reset Controller support. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci This framework is designed to abstract reset handling of devices 128c2ecf20Sopenharmony_ci via GPIOs or SoC-internal reset controller modules. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci If unsure, say no. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciif RESET_CONTROLLER 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ciconfig RESET_A10SR 198c2ecf20Sopenharmony_ci tristate "Altera Arria10 System Resource Reset" 208c2ecf20Sopenharmony_ci depends on MFD_ALTERA_A10SR 218c2ecf20Sopenharmony_ci help 228c2ecf20Sopenharmony_ci This option enables support for the external reset functions for 238c2ecf20Sopenharmony_ci peripheral PHYs on the Altera Arria10 System Resource Chip. 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ciconfig RESET_ATH79 268c2ecf20Sopenharmony_ci bool "AR71xx Reset Driver" if COMPILE_TEST 278c2ecf20Sopenharmony_ci default ATH79 288c2ecf20Sopenharmony_ci help 298c2ecf20Sopenharmony_ci This enables the ATH79 reset controller driver that supports the 308c2ecf20Sopenharmony_ci AR71xx SoC reset controller. 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ciconfig RESET_AXS10X 338c2ecf20Sopenharmony_ci bool "AXS10x Reset Driver" if COMPILE_TEST 348c2ecf20Sopenharmony_ci default ARC_PLAT_AXS10X 358c2ecf20Sopenharmony_ci help 368c2ecf20Sopenharmony_ci This enables the reset controller driver for AXS10x. 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ciconfig RESET_BERLIN 398c2ecf20Sopenharmony_ci bool "Berlin Reset Driver" if COMPILE_TEST 408c2ecf20Sopenharmony_ci default ARCH_BERLIN 418c2ecf20Sopenharmony_ci help 428c2ecf20Sopenharmony_ci This enables the reset controller driver for Marvell Berlin SoCs. 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ciconfig RESET_BRCMSTB 458c2ecf20Sopenharmony_ci tristate "Broadcom STB reset controller" 468c2ecf20Sopenharmony_ci depends on ARCH_BRCMSTB || COMPILE_TEST 478c2ecf20Sopenharmony_ci default ARCH_BRCMSTB 488c2ecf20Sopenharmony_ci help 498c2ecf20Sopenharmony_ci This enables the reset controller driver for Broadcom STB SoCs using 508c2ecf20Sopenharmony_ci a SUN_TOP_CTRL_SW_INIT style controller. 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ciconfig RESET_BRCMSTB_RESCAL 538c2ecf20Sopenharmony_ci bool "Broadcom STB RESCAL reset controller" 548c2ecf20Sopenharmony_ci depends on HAS_IOMEM 558c2ecf20Sopenharmony_ci depends on ARCH_BRCMSTB || COMPILE_TEST 568c2ecf20Sopenharmony_ci default ARCH_BRCMSTB 578c2ecf20Sopenharmony_ci help 588c2ecf20Sopenharmony_ci This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on 598c2ecf20Sopenharmony_ci BCM7216. 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ciconfig RESET_HSDK 628c2ecf20Sopenharmony_ci bool "Synopsys HSDK Reset Driver" 638c2ecf20Sopenharmony_ci depends on HAS_IOMEM 648c2ecf20Sopenharmony_ci depends on ARC_SOC_HSDK || COMPILE_TEST 658c2ecf20Sopenharmony_ci help 668c2ecf20Sopenharmony_ci This enables the reset controller driver for HSDK board. 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ciconfig RESET_IMX7 698c2ecf20Sopenharmony_ci tristate "i.MX7/8 Reset Driver" 708c2ecf20Sopenharmony_ci depends on HAS_IOMEM 718c2ecf20Sopenharmony_ci depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST 728c2ecf20Sopenharmony_ci default y if SOC_IMX7D 738c2ecf20Sopenharmony_ci select MFD_SYSCON 748c2ecf20Sopenharmony_ci help 758c2ecf20Sopenharmony_ci This enables the reset controller driver for i.MX7 SoCs. 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ciconfig RESET_INTEL_GW 788c2ecf20Sopenharmony_ci bool "Intel Reset Controller Driver" 798c2ecf20Sopenharmony_ci depends on X86 || COMPILE_TEST 808c2ecf20Sopenharmony_ci depends on OF && HAS_IOMEM 818c2ecf20Sopenharmony_ci select REGMAP_MMIO 828c2ecf20Sopenharmony_ci help 838c2ecf20Sopenharmony_ci This enables the reset controller driver for Intel Gateway SoCs. 848c2ecf20Sopenharmony_ci Say Y to control the reset signals provided by reset controller. 858c2ecf20Sopenharmony_ci Otherwise, say N. 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ciconfig RESET_LANTIQ 888c2ecf20Sopenharmony_ci bool "Lantiq XWAY Reset Driver" if COMPILE_TEST 898c2ecf20Sopenharmony_ci default SOC_TYPE_XWAY 908c2ecf20Sopenharmony_ci help 918c2ecf20Sopenharmony_ci This enables the reset controller driver for Lantiq / Intel XWAY SoCs. 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_ciconfig RESET_LPC18XX 948c2ecf20Sopenharmony_ci bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST 958c2ecf20Sopenharmony_ci default ARCH_LPC18XX 968c2ecf20Sopenharmony_ci help 978c2ecf20Sopenharmony_ci This enables the reset controller driver for NXP LPC18xx/43xx SoCs. 988c2ecf20Sopenharmony_ci 998c2ecf20Sopenharmony_ciconfig RESET_MESON 1008c2ecf20Sopenharmony_ci bool "Meson Reset Driver" if COMPILE_TEST 1018c2ecf20Sopenharmony_ci default ARCH_MESON 1028c2ecf20Sopenharmony_ci help 1038c2ecf20Sopenharmony_ci This enables the reset driver for Amlogic Meson SoCs. 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ciconfig RESET_MESON_AUDIO_ARB 1068c2ecf20Sopenharmony_ci tristate "Meson Audio Memory Arbiter Reset Driver" 1078c2ecf20Sopenharmony_ci depends on ARCH_MESON || COMPILE_TEST 1088c2ecf20Sopenharmony_ci help 1098c2ecf20Sopenharmony_ci This enables the reset driver for Audio Memory Arbiter of 1108c2ecf20Sopenharmony_ci Amlogic's A113 based SoCs 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ciconfig RESET_NPCM 1138c2ecf20Sopenharmony_ci bool "NPCM BMC Reset Driver" if COMPILE_TEST 1148c2ecf20Sopenharmony_ci default ARCH_NPCM 1158c2ecf20Sopenharmony_ci help 1168c2ecf20Sopenharmony_ci This enables the reset controller driver for Nuvoton NPCM 1178c2ecf20Sopenharmony_ci BMC SoCs. 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ciconfig RESET_OXNAS 1208c2ecf20Sopenharmony_ci bool 1218c2ecf20Sopenharmony_ci 1228c2ecf20Sopenharmony_ciconfig RESET_PISTACHIO 1238c2ecf20Sopenharmony_ci bool "Pistachio Reset Driver" if COMPILE_TEST 1248c2ecf20Sopenharmony_ci default MACH_PISTACHIO 1258c2ecf20Sopenharmony_ci help 1268c2ecf20Sopenharmony_ci This enables the reset driver for ImgTec Pistachio SoCs. 1278c2ecf20Sopenharmony_ci 1288c2ecf20Sopenharmony_ciconfig RESET_QCOM_AOSS 1298c2ecf20Sopenharmony_ci tristate "Qcom AOSS Reset Driver" 1308c2ecf20Sopenharmony_ci depends on ARCH_QCOM || COMPILE_TEST 1318c2ecf20Sopenharmony_ci help 1328c2ecf20Sopenharmony_ci This enables the AOSS (always on subsystem) reset driver 1338c2ecf20Sopenharmony_ci for Qualcomm SDM845 SoCs. Say Y if you want to control 1348c2ecf20Sopenharmony_ci reset signals provided by AOSS for Modem, Venus, ADSP, 1358c2ecf20Sopenharmony_ci GPU, Camera, Wireless, Display subsystem. Otherwise, say N. 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ciconfig RESET_QCOM_PDC 1388c2ecf20Sopenharmony_ci tristate "Qualcomm PDC Reset Driver" 1398c2ecf20Sopenharmony_ci depends on ARCH_QCOM || COMPILE_TEST 1408c2ecf20Sopenharmony_ci help 1418c2ecf20Sopenharmony_ci This enables the PDC (Power Domain Controller) reset driver 1428c2ecf20Sopenharmony_ci for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want 1438c2ecf20Sopenharmony_ci to control reset signals provided by PDC for Modem, Compute, 1448c2ecf20Sopenharmony_ci Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ciconfig RESET_RASPBERRYPI 1478c2ecf20Sopenharmony_ci tristate "Raspberry Pi 4 Firmware Reset Driver" 1488c2ecf20Sopenharmony_ci depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST) 1498c2ecf20Sopenharmony_ci default USB_XHCI_PCI 1508c2ecf20Sopenharmony_ci help 1518c2ecf20Sopenharmony_ci Raspberry Pi 4's co-processor controls some of the board's HW 1528c2ecf20Sopenharmony_ci initialization process, but it's up to Linux to trigger it when 1538c2ecf20Sopenharmony_ci relevant. This driver provides a reset controller capable of 1548c2ecf20Sopenharmony_ci interfacing with RPi4's co-processor and model these firmware 1558c2ecf20Sopenharmony_ci initialization routines as reset lines. 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_ciconfig RESET_SCMI 1588c2ecf20Sopenharmony_ci tristate "Reset driver controlled via ARM SCMI interface" 1598c2ecf20Sopenharmony_ci depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 1608c2ecf20Sopenharmony_ci default ARM_SCMI_PROTOCOL 1618c2ecf20Sopenharmony_ci help 1628c2ecf20Sopenharmony_ci This driver provides support for reset signal/domains that are 1638c2ecf20Sopenharmony_ci controlled by firmware that implements the SCMI interface. 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ci This driver uses SCMI Message Protocol to interact with the 1668c2ecf20Sopenharmony_ci firmware controlling all the reset signals. 1678c2ecf20Sopenharmony_ci 1688c2ecf20Sopenharmony_ciconfig RESET_SIMPLE 1698c2ecf20Sopenharmony_ci bool "Simple Reset Controller Driver" if COMPILE_TEST 1708c2ecf20Sopenharmony_ci default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC 1718c2ecf20Sopenharmony_ci help 1728c2ecf20Sopenharmony_ci This enables a simple reset controller driver for reset lines that 1738c2ecf20Sopenharmony_ci that can be asserted and deasserted by toggling bits in a contiguous, 1748c2ecf20Sopenharmony_ci exclusive register space. 1758c2ecf20Sopenharmony_ci 1768c2ecf20Sopenharmony_ci Currently this driver supports: 1778c2ecf20Sopenharmony_ci - Altera SoCFPGAs 1788c2ecf20Sopenharmony_ci - ASPEED BMC SoCs 1798c2ecf20Sopenharmony_ci - Bitmain BM1880 SoC 1808c2ecf20Sopenharmony_ci - Realtek SoCs 1818c2ecf20Sopenharmony_ci - RCC reset controller in STM32 MCUs 1828c2ecf20Sopenharmony_ci - Allwinner SoCs 1838c2ecf20Sopenharmony_ci - ZTE's zx2967 family 1848c2ecf20Sopenharmony_ci 1858c2ecf20Sopenharmony_ciconfig RESET_STM32MP157 1868c2ecf20Sopenharmony_ci bool "STM32MP157 Reset Driver" if COMPILE_TEST 1878c2ecf20Sopenharmony_ci default MACH_STM32MP157 1888c2ecf20Sopenharmony_ci help 1898c2ecf20Sopenharmony_ci This enables the RCC reset controller driver for STM32 MPUs. 1908c2ecf20Sopenharmony_ci 1918c2ecf20Sopenharmony_ciconfig RESET_SOCFPGA 1928c2ecf20Sopenharmony_ci bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA 1938c2ecf20Sopenharmony_ci default ARCH_SOCFPGA 1948c2ecf20Sopenharmony_ci select RESET_SIMPLE 1958c2ecf20Sopenharmony_ci help 1968c2ecf20Sopenharmony_ci This enables the reset driver for the SoCFPGA ARMv7 platforms. This 1978c2ecf20Sopenharmony_ci driver gets initialized early during platform init calls. 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_ciconfig RESET_SUNXI 2008c2ecf20Sopenharmony_ci bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI 2018c2ecf20Sopenharmony_ci default ARCH_SUNXI 2028c2ecf20Sopenharmony_ci select RESET_SIMPLE 2038c2ecf20Sopenharmony_ci help 2048c2ecf20Sopenharmony_ci This enables the reset driver for Allwinner SoCs. 2058c2ecf20Sopenharmony_ci 2068c2ecf20Sopenharmony_ciconfig RESET_TI_SCI 2078c2ecf20Sopenharmony_ci tristate "TI System Control Interface (TI-SCI) reset driver" 2088c2ecf20Sopenharmony_ci depends on TI_SCI_PROTOCOL 2098c2ecf20Sopenharmony_ci help 2108c2ecf20Sopenharmony_ci This enables the reset driver support over TI System Control Interface 2118c2ecf20Sopenharmony_ci available on some new TI's SoCs. If you wish to use reset resources 2128c2ecf20Sopenharmony_ci managed by the TI System Controller, say Y here. Otherwise, say N. 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ciconfig RESET_TI_SYSCON 2158c2ecf20Sopenharmony_ci tristate "TI SYSCON Reset Driver" 2168c2ecf20Sopenharmony_ci depends on HAS_IOMEM 2178c2ecf20Sopenharmony_ci select MFD_SYSCON 2188c2ecf20Sopenharmony_ci help 2198c2ecf20Sopenharmony_ci This enables the reset driver support for TI devices with 2208c2ecf20Sopenharmony_ci memory-mapped reset registers as part of a syscon device node. If 2218c2ecf20Sopenharmony_ci you wish to use the reset framework for such memory-mapped devices, 2228c2ecf20Sopenharmony_ci say Y here. Otherwise, say N. 2238c2ecf20Sopenharmony_ci 2248c2ecf20Sopenharmony_ciconfig RESET_UNIPHIER 2258c2ecf20Sopenharmony_ci tristate "Reset controller driver for UniPhier SoCs" 2268c2ecf20Sopenharmony_ci depends on ARCH_UNIPHIER || COMPILE_TEST 2278c2ecf20Sopenharmony_ci depends on OF && MFD_SYSCON 2288c2ecf20Sopenharmony_ci default ARCH_UNIPHIER 2298c2ecf20Sopenharmony_ci help 2308c2ecf20Sopenharmony_ci Support for reset controllers on UniPhier SoCs. 2318c2ecf20Sopenharmony_ci Say Y if you want to control reset signals provided by System Control 2328c2ecf20Sopenharmony_ci block, Media I/O block, Peripheral Block. 2338c2ecf20Sopenharmony_ci 2348c2ecf20Sopenharmony_ciconfig RESET_UNIPHIER_GLUE 2358c2ecf20Sopenharmony_ci tristate "Reset driver in glue layer for UniPhier SoCs" 2368c2ecf20Sopenharmony_ci depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF 2378c2ecf20Sopenharmony_ci default ARCH_UNIPHIER 2388c2ecf20Sopenharmony_ci select RESET_SIMPLE 2398c2ecf20Sopenharmony_ci help 2408c2ecf20Sopenharmony_ci Support for peripheral core reset included in its own glue layer 2418c2ecf20Sopenharmony_ci on UniPhier SoCs. Say Y if you want to control reset signals 2428c2ecf20Sopenharmony_ci provided by the glue layer. 2438c2ecf20Sopenharmony_ci 2448c2ecf20Sopenharmony_ciconfig RESET_ZYNQ 2458c2ecf20Sopenharmony_ci bool "ZYNQ Reset Driver" if COMPILE_TEST 2468c2ecf20Sopenharmony_ci default ARCH_ZYNQ 2478c2ecf20Sopenharmony_ci help 2488c2ecf20Sopenharmony_ci This enables the reset controller driver for Xilinx Zynq SoCs. 2498c2ecf20Sopenharmony_ci 2508c2ecf20Sopenharmony_cisource "drivers/reset/sti/Kconfig" 2518c2ecf20Sopenharmony_cisource "drivers/reset/hisilicon/Kconfig" 2528c2ecf20Sopenharmony_cisource "drivers/reset/tegra/Kconfig" 2538c2ecf20Sopenharmony_ci 2548c2ecf20Sopenharmony_ciendif 255