1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2019 MediaTek Inc.
4 */
5
6#ifndef __RPROC_MTK_COMMON_H
7#define __RPROC_MTK_COMMON_H
8
9#include <linux/interrupt.h>
10#include <linux/kernel.h>
11#include <linux/platform_device.h>
12#include <linux/remoteproc.h>
13#include <linux/remoteproc/mtk_scp.h>
14
15#define MT8183_SW_RSTN			0x0
16#define MT8183_SW_RSTN_BIT		BIT(0)
17#define MT8183_SCP_TO_HOST		0x1C
18#define MT8183_SCP_IPC_INT_BIT		BIT(0)
19#define MT8183_SCP_WDT_INT_BIT		BIT(8)
20#define MT8183_HOST_TO_SCP		0x28
21#define MT8183_HOST_IPC_INT_BIT		BIT(0)
22#define MT8183_WDT_CFG			0x84
23#define MT8183_SCP_CLK_SW_SEL		0x4000
24#define MT8183_SCP_CLK_DIV_SEL		0x4024
25#define MT8183_SCP_SRAM_PDN		0x402C
26#define MT8183_SCP_L1_SRAM_PD		0x4080
27#define MT8183_SCP_TCM_TAIL_SRAM_PD	0x4094
28
29#define MT8183_SCP_CACHE_SEL(x)		(0x14000 + (x) * 0x3000)
30#define MT8183_SCP_CACHE_CON		MT8183_SCP_CACHE_SEL(0)
31#define MT8183_SCP_DCACHE_CON		MT8183_SCP_CACHE_SEL(1)
32#define MT8183_SCP_CACHESIZE_8KB	BIT(8)
33#define MT8183_SCP_CACHE_CON_WAYEN	BIT(10)
34
35#define MT8192_L2TCM_SRAM_PD_0		0x10C0
36#define MT8192_L2TCM_SRAM_PD_1		0x10C4
37#define MT8192_L2TCM_SRAM_PD_2		0x10C8
38#define MT8192_L1TCM_SRAM_PDN		0x102C
39#define MT8192_CPU0_SRAM_PD		0x1080
40
41#define MT8192_SCP2APMCU_IPC_SET	0x4080
42#define MT8192_SCP2APMCU_IPC_CLR	0x4084
43#define MT8192_SCP_IPC_INT_BIT		BIT(0)
44#define MT8192_SCP2SPM_IPC_CLR		0x4094
45#define MT8192_GIPC_IN_SET		0x4098
46#define MT8192_HOST_IPC_INT_BIT		BIT(0)
47
48#define MT8192_CORE0_SW_RSTN_CLR	0x10000
49#define MT8192_CORE0_SW_RSTN_SET	0x10004
50#define MT8192_CORE0_WDT_IRQ		0x10030
51#define MT8192_CORE0_WDT_CFG		0x10034
52
53#define SCP_FW_VER_LEN			32
54#define SCP_SHARE_BUFFER_SIZE		288
55
56struct scp_run {
57	u32 signaled;
58	s8 fw_ver[SCP_FW_VER_LEN];
59	u32 dec_capability;
60	u32 enc_capability;
61	wait_queue_head_t wq;
62};
63
64struct scp_ipi_desc {
65	/* For protecting handler. */
66	struct mutex lock;
67	scp_ipi_handler_t handler;
68	void *priv;
69};
70
71struct mtk_scp;
72
73struct mtk_scp_of_data {
74	int (*scp_before_load)(struct mtk_scp *scp);
75	void (*scp_irq_handler)(struct mtk_scp *scp);
76	void (*scp_reset_assert)(struct mtk_scp *scp);
77	void (*scp_reset_deassert)(struct mtk_scp *scp);
78	void (*scp_stop)(struct mtk_scp *scp);
79
80	u32 host_to_scp_reg;
81	u32 host_to_scp_int_bit;
82};
83
84struct mtk_scp {
85	struct device *dev;
86	struct rproc *rproc;
87	struct clk *clk;
88	void __iomem *reg_base;
89	void __iomem *sram_base;
90	size_t sram_size;
91
92	const struct mtk_scp_of_data *data;
93
94	struct mtk_share_obj __iomem *recv_buf;
95	struct mtk_share_obj __iomem *send_buf;
96	struct scp_run run;
97	/* To prevent multiple ipi_send run concurrently. */
98	struct mutex send_lock;
99	struct scp_ipi_desc ipi_desc[SCP_IPI_MAX];
100	bool ipi_id_ack[SCP_IPI_MAX];
101	wait_queue_head_t ack_wq;
102
103	void __iomem *cpu_addr;
104	dma_addr_t dma_addr;
105	size_t dram_size;
106
107	struct rproc_subdev *rpmsg_subdev;
108};
109
110/**
111 * struct mtk_share_obj - SRAM buffer shared with AP and SCP
112 *
113 * @id:		IPI id
114 * @len:	share buffer length
115 * @share_buf:	share buffer data
116 */
117struct mtk_share_obj {
118	u32 id;
119	u32 len;
120	u8 share_buf[SCP_SHARE_BUFFER_SIZE];
121};
122
123void scp_memcpy_aligned(void __iomem *dst, const void *src, unsigned int len);
124void scp_ipi_lock(struct mtk_scp *scp, u32 id);
125void scp_ipi_unlock(struct mtk_scp *scp, u32 id);
126
127#endif
128