18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ci#include <linux/delay.h>
48c2ecf20Sopenharmony_ci#include <linux/gpio/consumer.h>
58c2ecf20Sopenharmony_ci#include <linux/i2c.h>
68c2ecf20Sopenharmony_ci#include <linux/interrupt.h>
78c2ecf20Sopenharmony_ci#include <linux/kernel.h>
88c2ecf20Sopenharmony_ci#include <linux/module.h>
98c2ecf20Sopenharmony_ci#include <linux/property.h>
108c2ecf20Sopenharmony_ci#include <linux/regmap.h>
118c2ecf20Sopenharmony_ci#include <linux/regulator/driver.h>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci#define RTMV20_REG_DEVINFO	0x00
148c2ecf20Sopenharmony_ci#define RTMV20_REG_PULSEDELAY	0x01
158c2ecf20Sopenharmony_ci#define RTMV20_REG_PULSEWIDTH	0x03
168c2ecf20Sopenharmony_ci#define RTMV20_REG_LDCTRL1	0x05
178c2ecf20Sopenharmony_ci#define RTMV20_REG_ESPULSEWIDTH	0x06
188c2ecf20Sopenharmony_ci#define RTMV20_REG_ESLDCTRL1	0x08
198c2ecf20Sopenharmony_ci#define RTMV20_REG_LBP		0x0A
208c2ecf20Sopenharmony_ci#define RTMV20_REG_LDCTRL2	0x0B
218c2ecf20Sopenharmony_ci#define RTMV20_REG_FSIN1CTRL1	0x0D
228c2ecf20Sopenharmony_ci#define RTMV20_REG_FSIN1CTRL3	0x0F
238c2ecf20Sopenharmony_ci#define RTMV20_REG_FSIN2CTRL1	0x10
248c2ecf20Sopenharmony_ci#define RTMV20_REG_FSIN2CTRL3	0x12
258c2ecf20Sopenharmony_ci#define RTMV20_REG_ENCTRL	0x13
268c2ecf20Sopenharmony_ci#define RTMV20_REG_STRBVSYNDLYL 0x29
278c2ecf20Sopenharmony_ci#define RTMV20_REG_LDIRQ	0x30
288c2ecf20Sopenharmony_ci#define RTMV20_REG_LDSTAT	0x40
298c2ecf20Sopenharmony_ci#define RTMV20_REG_LDMASK	0x50
308c2ecf20Sopenharmony_ci#define RTMV20_MAX_REGS		(RTMV20_REG_LDMASK + 1)
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci#define RTMV20_VID_MASK		GENMASK(7, 4)
338c2ecf20Sopenharmony_ci#define RICHTEK_VID		0x80
348c2ecf20Sopenharmony_ci#define RTMV20_LDCURR_MASK	GENMASK(7, 0)
358c2ecf20Sopenharmony_ci#define RTMV20_DELAY_MASK	GENMASK(9, 0)
368c2ecf20Sopenharmony_ci#define RTMV20_WIDTH_MASK	GENMASK(13, 0)
378c2ecf20Sopenharmony_ci#define RTMV20_WIDTH2_MASK	GENMASK(7, 0)
388c2ecf20Sopenharmony_ci#define RTMV20_LBPLVL_MASK	GENMASK(3, 0)
398c2ecf20Sopenharmony_ci#define RTMV20_LBPEN_MASK	BIT(7)
408c2ecf20Sopenharmony_ci#define RTMV20_STROBEPOL_MASK	BIT(0)
418c2ecf20Sopenharmony_ci#define RTMV20_VSYNPOL_MASK	BIT(1)
428c2ecf20Sopenharmony_ci#define RTMV20_FSINEN_MASK	BIT(7)
438c2ecf20Sopenharmony_ci#define RTMV20_ESEN_MASK	BIT(6)
448c2ecf20Sopenharmony_ci#define RTMV20_FSINOUT_MASK	BIT(2)
458c2ecf20Sopenharmony_ci#define LDENABLE_MASK		(BIT(3) | BIT(0))
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ci#define OTPEVT_MASK		BIT(4)
488c2ecf20Sopenharmony_ci#define SHORTEVT_MASK		BIT(3)
498c2ecf20Sopenharmony_ci#define OPENEVT_MASK		BIT(2)
508c2ecf20Sopenharmony_ci#define LBPEVT_MASK		BIT(1)
518c2ecf20Sopenharmony_ci#define OCPEVT_MASK		BIT(0)
528c2ecf20Sopenharmony_ci#define FAILEVT_MASK		(SHORTEVT_MASK | OPENEVT_MASK | LBPEVT_MASK)
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ci#define RTMV20_LSW_MINUA	0
558c2ecf20Sopenharmony_ci#define RTMV20_LSW_MAXUA	6000000
568c2ecf20Sopenharmony_ci#define RTMV20_LSW_STEPUA	30000
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci#define RTMV20_LSW_DEFAULTUA	3000000
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci#define RTMV20_I2CRDY_TIMEUS	200
618c2ecf20Sopenharmony_ci#define RTMV20_CSRDY_TIMEUS	2000
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_cistruct rtmv20_priv {
648c2ecf20Sopenharmony_ci	struct device *dev;
658c2ecf20Sopenharmony_ci	struct regmap *regmap;
668c2ecf20Sopenharmony_ci	struct gpio_desc *enable_gpio;
678c2ecf20Sopenharmony_ci	struct regulator_dev *rdev;
688c2ecf20Sopenharmony_ci};
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_cistatic int rtmv20_lsw_enable(struct regulator_dev *rdev)
718c2ecf20Sopenharmony_ci{
728c2ecf20Sopenharmony_ci	struct rtmv20_priv *priv = rdev_get_drvdata(rdev);
738c2ecf20Sopenharmony_ci	int ret;
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci	gpiod_set_value(priv->enable_gpio, 1);
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci	/* Wait for I2C can be accessed */
788c2ecf20Sopenharmony_ci	usleep_range(RTMV20_I2CRDY_TIMEUS, RTMV20_I2CRDY_TIMEUS + 100);
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci	/* HW re-enable, disable cache only and sync regcache here */
818c2ecf20Sopenharmony_ci	regcache_cache_only(priv->regmap, false);
828c2ecf20Sopenharmony_ci	ret = regcache_sync(priv->regmap);
838c2ecf20Sopenharmony_ci	if (ret)
848c2ecf20Sopenharmony_ci		return ret;
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci	return regulator_enable_regmap(rdev);
878c2ecf20Sopenharmony_ci}
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_cistatic int rtmv20_lsw_disable(struct regulator_dev *rdev)
908c2ecf20Sopenharmony_ci{
918c2ecf20Sopenharmony_ci	struct rtmv20_priv *priv = rdev_get_drvdata(rdev);
928c2ecf20Sopenharmony_ci	int ret;
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_ci	ret = regulator_disable_regmap(rdev);
958c2ecf20Sopenharmony_ci	if (ret)
968c2ecf20Sopenharmony_ci		return ret;
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci	/* Mark the regcache as dirty and cache only before HW disabled */
998c2ecf20Sopenharmony_ci	regcache_cache_only(priv->regmap, true);
1008c2ecf20Sopenharmony_ci	regcache_mark_dirty(priv->regmap);
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	gpiod_set_value(priv->enable_gpio, 0);
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci	return 0;
1058c2ecf20Sopenharmony_ci}
1068c2ecf20Sopenharmony_ci
1078c2ecf20Sopenharmony_cistatic int rtmv20_lsw_set_current_limit(struct regulator_dev *rdev, int min_uA,
1088c2ecf20Sopenharmony_ci					int max_uA)
1098c2ecf20Sopenharmony_ci{
1108c2ecf20Sopenharmony_ci	int sel;
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci	if (min_uA > RTMV20_LSW_MAXUA || max_uA < RTMV20_LSW_MINUA)
1138c2ecf20Sopenharmony_ci		return -EINVAL;
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci	if (max_uA > RTMV20_LSW_MAXUA)
1168c2ecf20Sopenharmony_ci		max_uA = RTMV20_LSW_MAXUA;
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci	sel = (max_uA - RTMV20_LSW_MINUA) / RTMV20_LSW_STEPUA;
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_ci	/* Ensure the selected setting is still in range */
1218c2ecf20Sopenharmony_ci	if ((sel * RTMV20_LSW_STEPUA + RTMV20_LSW_MINUA) < min_uA)
1228c2ecf20Sopenharmony_ci		return -EINVAL;
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_ci	sel <<= ffs(rdev->desc->csel_mask) - 1;
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ci	return regmap_update_bits(rdev->regmap, rdev->desc->csel_reg,
1278c2ecf20Sopenharmony_ci				  rdev->desc->csel_mask, sel);
1288c2ecf20Sopenharmony_ci}
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_cistatic int rtmv20_lsw_get_current_limit(struct regulator_dev *rdev)
1318c2ecf20Sopenharmony_ci{
1328c2ecf20Sopenharmony_ci	unsigned int val;
1338c2ecf20Sopenharmony_ci	int ret;
1348c2ecf20Sopenharmony_ci
1358c2ecf20Sopenharmony_ci	ret = regmap_read(rdev->regmap, rdev->desc->csel_reg, &val);
1368c2ecf20Sopenharmony_ci	if (ret)
1378c2ecf20Sopenharmony_ci		return ret;
1388c2ecf20Sopenharmony_ci
1398c2ecf20Sopenharmony_ci	val &= rdev->desc->csel_mask;
1408c2ecf20Sopenharmony_ci	val >>= ffs(rdev->desc->csel_mask) - 1;
1418c2ecf20Sopenharmony_ci
1428c2ecf20Sopenharmony_ci	return val * RTMV20_LSW_STEPUA + RTMV20_LSW_MINUA;
1438c2ecf20Sopenharmony_ci}
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_cistatic const struct regulator_ops rtmv20_regulator_ops = {
1468c2ecf20Sopenharmony_ci	.set_current_limit = rtmv20_lsw_set_current_limit,
1478c2ecf20Sopenharmony_ci	.get_current_limit = rtmv20_lsw_get_current_limit,
1488c2ecf20Sopenharmony_ci	.enable = rtmv20_lsw_enable,
1498c2ecf20Sopenharmony_ci	.disable = rtmv20_lsw_disable,
1508c2ecf20Sopenharmony_ci	.is_enabled = regulator_is_enabled_regmap,
1518c2ecf20Sopenharmony_ci};
1528c2ecf20Sopenharmony_ci
1538c2ecf20Sopenharmony_cistatic const struct regulator_desc rtmv20_lsw_desc = {
1548c2ecf20Sopenharmony_ci	.name = "rtmv20,lsw",
1558c2ecf20Sopenharmony_ci	.of_match = of_match_ptr("lsw"),
1568c2ecf20Sopenharmony_ci	.type = REGULATOR_CURRENT,
1578c2ecf20Sopenharmony_ci	.owner = THIS_MODULE,
1588c2ecf20Sopenharmony_ci	.ops = &rtmv20_regulator_ops,
1598c2ecf20Sopenharmony_ci	.csel_reg = RTMV20_REG_LDCTRL1,
1608c2ecf20Sopenharmony_ci	.csel_mask = RTMV20_LDCURR_MASK,
1618c2ecf20Sopenharmony_ci	.enable_reg = RTMV20_REG_ENCTRL,
1628c2ecf20Sopenharmony_ci	.enable_mask = LDENABLE_MASK,
1638c2ecf20Sopenharmony_ci	.enable_time = RTMV20_CSRDY_TIMEUS,
1648c2ecf20Sopenharmony_ci};
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_cistatic irqreturn_t rtmv20_irq_handler(int irq, void *data)
1678c2ecf20Sopenharmony_ci{
1688c2ecf20Sopenharmony_ci	struct rtmv20_priv *priv = data;
1698c2ecf20Sopenharmony_ci	unsigned int val;
1708c2ecf20Sopenharmony_ci	int ret;
1718c2ecf20Sopenharmony_ci
1728c2ecf20Sopenharmony_ci	ret = regmap_read(priv->regmap, RTMV20_REG_LDIRQ, &val);
1738c2ecf20Sopenharmony_ci	if (ret) {
1748c2ecf20Sopenharmony_ci		dev_err(priv->dev, "Failed to get irq flags\n");
1758c2ecf20Sopenharmony_ci		return IRQ_NONE;
1768c2ecf20Sopenharmony_ci	}
1778c2ecf20Sopenharmony_ci
1788c2ecf20Sopenharmony_ci	if (val & OTPEVT_MASK)
1798c2ecf20Sopenharmony_ci		regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_OVER_TEMP, NULL);
1808c2ecf20Sopenharmony_ci
1818c2ecf20Sopenharmony_ci	if (val & OCPEVT_MASK)
1828c2ecf20Sopenharmony_ci		regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_OVER_CURRENT, NULL);
1838c2ecf20Sopenharmony_ci
1848c2ecf20Sopenharmony_ci	if (val & FAILEVT_MASK)
1858c2ecf20Sopenharmony_ci		regulator_notifier_call_chain(priv->rdev, REGULATOR_EVENT_FAIL, NULL);
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ci	return IRQ_HANDLED;
1888c2ecf20Sopenharmony_ci}
1898c2ecf20Sopenharmony_ci
1908c2ecf20Sopenharmony_cistatic u32 clamp_to_selector(u32 val, u32 min, u32 max, u32 step)
1918c2ecf20Sopenharmony_ci{
1928c2ecf20Sopenharmony_ci	u32 retval = clamp_val(val, min, max);
1938c2ecf20Sopenharmony_ci
1948c2ecf20Sopenharmony_ci	return (retval - min) / step;
1958c2ecf20Sopenharmony_ci}
1968c2ecf20Sopenharmony_ci
1978c2ecf20Sopenharmony_cistatic int rtmv20_properties_init(struct rtmv20_priv *priv)
1988c2ecf20Sopenharmony_ci{
1998c2ecf20Sopenharmony_ci	const struct {
2008c2ecf20Sopenharmony_ci		const char *name;
2018c2ecf20Sopenharmony_ci		u32 def;
2028c2ecf20Sopenharmony_ci		u32 min;
2038c2ecf20Sopenharmony_ci		u32 max;
2048c2ecf20Sopenharmony_ci		u32 step;
2058c2ecf20Sopenharmony_ci		u32 addr;
2068c2ecf20Sopenharmony_ci		u32 mask;
2078c2ecf20Sopenharmony_ci	} props[] = {
2088c2ecf20Sopenharmony_ci		{ "richtek,ld-pulse-delay-us", 0, 0, 100000, 100, RTMV20_REG_PULSEDELAY,
2098c2ecf20Sopenharmony_ci			RTMV20_DELAY_MASK },
2108c2ecf20Sopenharmony_ci		{ "richtek,ld-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_PULSEWIDTH,
2118c2ecf20Sopenharmony_ci			RTMV20_WIDTH_MASK },
2128c2ecf20Sopenharmony_ci		{ "richtek,fsin1-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN1CTRL1,
2138c2ecf20Sopenharmony_ci			RTMV20_DELAY_MASK },
2148c2ecf20Sopenharmony_ci		{ "richtek,fsin1-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN1CTRL3,
2158c2ecf20Sopenharmony_ci			RTMV20_WIDTH2_MASK },
2168c2ecf20Sopenharmony_ci		{ "richtek,fsin2-delay-us", 23000, 0, 100000, 100, RTMV20_REG_FSIN2CTRL1,
2178c2ecf20Sopenharmony_ci			RTMV20_DELAY_MASK },
2188c2ecf20Sopenharmony_ci		{ "richtek,fsin2-width-us", 160, 40, 10000, 40, RTMV20_REG_FSIN2CTRL3,
2198c2ecf20Sopenharmony_ci			RTMV20_WIDTH2_MASK },
2208c2ecf20Sopenharmony_ci		{ "richtek,es-pulse-width-us", 1200, 0, 10000, 1, RTMV20_REG_ESPULSEWIDTH,
2218c2ecf20Sopenharmony_ci			RTMV20_WIDTH_MASK },
2228c2ecf20Sopenharmony_ci		{ "richtek,es-ld-current-microamp", 3000000, 0, 6000000, 30000,
2238c2ecf20Sopenharmony_ci			RTMV20_REG_ESLDCTRL1, RTMV20_LDCURR_MASK },
2248c2ecf20Sopenharmony_ci		{ "richtek,lbp-level-microvolt", 2700000, 2400000, 3700000, 100000, RTMV20_REG_LBP,
2258c2ecf20Sopenharmony_ci			RTMV20_LBPLVL_MASK },
2268c2ecf20Sopenharmony_ci		{ "richtek,lbp-enable", 0, 0, 1, 1, RTMV20_REG_LBP, RTMV20_LBPEN_MASK },
2278c2ecf20Sopenharmony_ci		{ "richtek,strobe-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2,
2288c2ecf20Sopenharmony_ci			RTMV20_STROBEPOL_MASK },
2298c2ecf20Sopenharmony_ci		{ "richtek,vsync-polarity-high", 1, 0, 1, 1, RTMV20_REG_LDCTRL2,
2308c2ecf20Sopenharmony_ci			RTMV20_VSYNPOL_MASK },
2318c2ecf20Sopenharmony_ci		{ "richtek,fsin-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINEN_MASK },
2328c2ecf20Sopenharmony_ci		{ "richtek,fsin-output", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_FSINOUT_MASK },
2338c2ecf20Sopenharmony_ci		{ "richtek,es-enable", 0, 0, 1, 1, RTMV20_REG_ENCTRL, RTMV20_ESEN_MASK },
2348c2ecf20Sopenharmony_ci	};
2358c2ecf20Sopenharmony_ci	int i, ret;
2368c2ecf20Sopenharmony_ci
2378c2ecf20Sopenharmony_ci	for (i = 0; i < ARRAY_SIZE(props); i++) {
2388c2ecf20Sopenharmony_ci		__be16 bval16;
2398c2ecf20Sopenharmony_ci		u16 val16;
2408c2ecf20Sopenharmony_ci		u32 temp;
2418c2ecf20Sopenharmony_ci		int significant_bit = fls(props[i].mask);
2428c2ecf20Sopenharmony_ci		int shift = ffs(props[i].mask) - 1;
2438c2ecf20Sopenharmony_ci
2448c2ecf20Sopenharmony_ci		if (props[i].max > 1) {
2458c2ecf20Sopenharmony_ci			ret = device_property_read_u32(priv->dev, props[i].name, &temp);
2468c2ecf20Sopenharmony_ci			if (ret)
2478c2ecf20Sopenharmony_ci				temp = props[i].def;
2488c2ecf20Sopenharmony_ci		} else
2498c2ecf20Sopenharmony_ci			temp = device_property_read_bool(priv->dev, props[i].name);
2508c2ecf20Sopenharmony_ci
2518c2ecf20Sopenharmony_ci		temp = clamp_to_selector(temp, props[i].min, props[i].max, props[i].step);
2528c2ecf20Sopenharmony_ci
2538c2ecf20Sopenharmony_ci		/* If significant bit is over 8, two byte access, others one */
2548c2ecf20Sopenharmony_ci		if (significant_bit > 8) {
2558c2ecf20Sopenharmony_ci			ret = regmap_raw_read(priv->regmap, props[i].addr, &bval16, sizeof(bval16));
2568c2ecf20Sopenharmony_ci			if (ret)
2578c2ecf20Sopenharmony_ci				return ret;
2588c2ecf20Sopenharmony_ci
2598c2ecf20Sopenharmony_ci			val16 = be16_to_cpu(bval16);
2608c2ecf20Sopenharmony_ci			val16 &= ~props[i].mask;
2618c2ecf20Sopenharmony_ci			val16 |= (temp << shift);
2628c2ecf20Sopenharmony_ci			bval16 = cpu_to_be16(val16);
2638c2ecf20Sopenharmony_ci
2648c2ecf20Sopenharmony_ci			ret = regmap_raw_write(priv->regmap, props[i].addr, &bval16,
2658c2ecf20Sopenharmony_ci					       sizeof(bval16));
2668c2ecf20Sopenharmony_ci		} else {
2678c2ecf20Sopenharmony_ci			ret = regmap_update_bits(priv->regmap, props[i].addr, props[i].mask,
2688c2ecf20Sopenharmony_ci						 temp << shift);
2698c2ecf20Sopenharmony_ci		}
2708c2ecf20Sopenharmony_ci
2718c2ecf20Sopenharmony_ci		if (ret)
2728c2ecf20Sopenharmony_ci			return ret;
2738c2ecf20Sopenharmony_ci	}
2748c2ecf20Sopenharmony_ci
2758c2ecf20Sopenharmony_ci	return 0;
2768c2ecf20Sopenharmony_ci}
2778c2ecf20Sopenharmony_ci
2788c2ecf20Sopenharmony_cistatic int rtmv20_check_chip_exist(struct rtmv20_priv *priv)
2798c2ecf20Sopenharmony_ci{
2808c2ecf20Sopenharmony_ci	unsigned int val;
2818c2ecf20Sopenharmony_ci	int ret;
2828c2ecf20Sopenharmony_ci
2838c2ecf20Sopenharmony_ci	ret = regmap_read(priv->regmap, RTMV20_REG_DEVINFO, &val);
2848c2ecf20Sopenharmony_ci	if (ret)
2858c2ecf20Sopenharmony_ci		return ret;
2868c2ecf20Sopenharmony_ci
2878c2ecf20Sopenharmony_ci	if ((val & RTMV20_VID_MASK) != RICHTEK_VID)
2888c2ecf20Sopenharmony_ci		return -ENODEV;
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_ci	return 0;
2918c2ecf20Sopenharmony_ci}
2928c2ecf20Sopenharmony_ci
2938c2ecf20Sopenharmony_cistatic bool rtmv20_is_accessible_reg(struct device *dev, unsigned int reg)
2948c2ecf20Sopenharmony_ci{
2958c2ecf20Sopenharmony_ci	switch (reg) {
2968c2ecf20Sopenharmony_ci	case RTMV20_REG_DEVINFO ... RTMV20_REG_STRBVSYNDLYL:
2978c2ecf20Sopenharmony_ci	case RTMV20_REG_LDIRQ:
2988c2ecf20Sopenharmony_ci	case RTMV20_REG_LDSTAT:
2998c2ecf20Sopenharmony_ci	case RTMV20_REG_LDMASK:
3008c2ecf20Sopenharmony_ci		return true;
3018c2ecf20Sopenharmony_ci	}
3028c2ecf20Sopenharmony_ci	return false;
3038c2ecf20Sopenharmony_ci}
3048c2ecf20Sopenharmony_ci
3058c2ecf20Sopenharmony_cistatic bool rtmv20_is_volatile_reg(struct device *dev, unsigned int reg)
3068c2ecf20Sopenharmony_ci{
3078c2ecf20Sopenharmony_ci	if (reg == RTMV20_REG_LDIRQ || reg == RTMV20_REG_LDSTAT)
3088c2ecf20Sopenharmony_ci		return true;
3098c2ecf20Sopenharmony_ci	return false;
3108c2ecf20Sopenharmony_ci}
3118c2ecf20Sopenharmony_ci
3128c2ecf20Sopenharmony_cistatic const struct regmap_config rtmv20_regmap_config = {
3138c2ecf20Sopenharmony_ci	.reg_bits = 8,
3148c2ecf20Sopenharmony_ci	.val_bits = 8,
3158c2ecf20Sopenharmony_ci	.cache_type = REGCACHE_RBTREE,
3168c2ecf20Sopenharmony_ci	.max_register = RTMV20_REG_LDMASK,
3178c2ecf20Sopenharmony_ci	.num_reg_defaults_raw = RTMV20_MAX_REGS,
3188c2ecf20Sopenharmony_ci
3198c2ecf20Sopenharmony_ci	.writeable_reg = rtmv20_is_accessible_reg,
3208c2ecf20Sopenharmony_ci	.readable_reg = rtmv20_is_accessible_reg,
3218c2ecf20Sopenharmony_ci	.volatile_reg = rtmv20_is_volatile_reg,
3228c2ecf20Sopenharmony_ci};
3238c2ecf20Sopenharmony_ci
3248c2ecf20Sopenharmony_cistatic int rtmv20_probe(struct i2c_client *i2c)
3258c2ecf20Sopenharmony_ci{
3268c2ecf20Sopenharmony_ci	struct rtmv20_priv *priv;
3278c2ecf20Sopenharmony_ci	struct regulator_config config = {};
3288c2ecf20Sopenharmony_ci	int ret;
3298c2ecf20Sopenharmony_ci
3308c2ecf20Sopenharmony_ci	priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
3318c2ecf20Sopenharmony_ci	if (!priv)
3328c2ecf20Sopenharmony_ci		return -ENOMEM;
3338c2ecf20Sopenharmony_ci
3348c2ecf20Sopenharmony_ci	priv->dev = &i2c->dev;
3358c2ecf20Sopenharmony_ci
3368c2ecf20Sopenharmony_ci	/* Before regmap register, configure HW enable to make I2C accessible */
3378c2ecf20Sopenharmony_ci	priv->enable_gpio = devm_gpiod_get(&i2c->dev, "enable", GPIOD_OUT_HIGH);
3388c2ecf20Sopenharmony_ci	if (IS_ERR(priv->enable_gpio)) {
3398c2ecf20Sopenharmony_ci		dev_err(&i2c->dev, "Failed to get enable gpio\n");
3408c2ecf20Sopenharmony_ci		return PTR_ERR(priv->enable_gpio);
3418c2ecf20Sopenharmony_ci	}
3428c2ecf20Sopenharmony_ci
3438c2ecf20Sopenharmony_ci	/* Wait for I2C can be accessed */
3448c2ecf20Sopenharmony_ci	usleep_range(RTMV20_I2CRDY_TIMEUS, RTMV20_I2CRDY_TIMEUS + 100);
3458c2ecf20Sopenharmony_ci
3468c2ecf20Sopenharmony_ci	priv->regmap = devm_regmap_init_i2c(i2c, &rtmv20_regmap_config);
3478c2ecf20Sopenharmony_ci	if (IS_ERR(priv->regmap)) {
3488c2ecf20Sopenharmony_ci		dev_err(&i2c->dev, "Failed to allocate register map\n");
3498c2ecf20Sopenharmony_ci		return PTR_ERR(priv->regmap);
3508c2ecf20Sopenharmony_ci	}
3518c2ecf20Sopenharmony_ci
3528c2ecf20Sopenharmony_ci	ret = rtmv20_check_chip_exist(priv);
3538c2ecf20Sopenharmony_ci	if (ret) {
3548c2ecf20Sopenharmony_ci		dev_err(&i2c->dev, "Chip vendor info is not matched\n");
3558c2ecf20Sopenharmony_ci		return ret;
3568c2ecf20Sopenharmony_ci	}
3578c2ecf20Sopenharmony_ci
3588c2ecf20Sopenharmony_ci	ret = rtmv20_properties_init(priv);
3598c2ecf20Sopenharmony_ci	if (ret) {
3608c2ecf20Sopenharmony_ci		dev_err(&i2c->dev, "Failed to init properties\n");
3618c2ecf20Sopenharmony_ci		return ret;
3628c2ecf20Sopenharmony_ci	}
3638c2ecf20Sopenharmony_ci
3648c2ecf20Sopenharmony_ci	/*
3658c2ecf20Sopenharmony_ci	 * keep in shutdown mode to minimize the current consumption
3668c2ecf20Sopenharmony_ci	 * and also mark regcache as dirty
3678c2ecf20Sopenharmony_ci	 */
3688c2ecf20Sopenharmony_ci	regcache_cache_only(priv->regmap, true);
3698c2ecf20Sopenharmony_ci	regcache_mark_dirty(priv->regmap);
3708c2ecf20Sopenharmony_ci	gpiod_set_value(priv->enable_gpio, 0);
3718c2ecf20Sopenharmony_ci
3728c2ecf20Sopenharmony_ci	config.dev = &i2c->dev;
3738c2ecf20Sopenharmony_ci	config.regmap = priv->regmap;
3748c2ecf20Sopenharmony_ci	config.driver_data = priv;
3758c2ecf20Sopenharmony_ci	priv->rdev = devm_regulator_register(&i2c->dev, &rtmv20_lsw_desc, &config);
3768c2ecf20Sopenharmony_ci	if (IS_ERR(priv->rdev)) {
3778c2ecf20Sopenharmony_ci		dev_err(&i2c->dev, "Failed to register regulator\n");
3788c2ecf20Sopenharmony_ci		return PTR_ERR(priv->rdev);
3798c2ecf20Sopenharmony_ci	}
3808c2ecf20Sopenharmony_ci
3818c2ecf20Sopenharmony_ci	/* Unmask all events before IRQ registered */
3828c2ecf20Sopenharmony_ci	ret = regmap_write(priv->regmap, RTMV20_REG_LDMASK, 0);
3838c2ecf20Sopenharmony_ci	if (ret)
3848c2ecf20Sopenharmony_ci		return ret;
3858c2ecf20Sopenharmony_ci
3868c2ecf20Sopenharmony_ci	return devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, rtmv20_irq_handler,
3878c2ecf20Sopenharmony_ci					 IRQF_ONESHOT, dev_name(&i2c->dev), priv);
3888c2ecf20Sopenharmony_ci}
3898c2ecf20Sopenharmony_ci
3908c2ecf20Sopenharmony_cistatic int __maybe_unused rtmv20_suspend(struct device *dev)
3918c2ecf20Sopenharmony_ci{
3928c2ecf20Sopenharmony_ci	struct i2c_client *i2c = to_i2c_client(dev);
3938c2ecf20Sopenharmony_ci
3948c2ecf20Sopenharmony_ci	/*
3958c2ecf20Sopenharmony_ci	 * When system suspend, disable irq to prevent interrupt trigger
3968c2ecf20Sopenharmony_ci	 * during I2C bus suspend
3978c2ecf20Sopenharmony_ci	 */
3988c2ecf20Sopenharmony_ci	disable_irq(i2c->irq);
3998c2ecf20Sopenharmony_ci	if (device_may_wakeup(dev))
4008c2ecf20Sopenharmony_ci		enable_irq_wake(i2c->irq);
4018c2ecf20Sopenharmony_ci
4028c2ecf20Sopenharmony_ci	return 0;
4038c2ecf20Sopenharmony_ci}
4048c2ecf20Sopenharmony_ci
4058c2ecf20Sopenharmony_cistatic int __maybe_unused rtmv20_resume(struct device *dev)
4068c2ecf20Sopenharmony_ci{
4078c2ecf20Sopenharmony_ci	struct i2c_client *i2c = to_i2c_client(dev);
4088c2ecf20Sopenharmony_ci
4098c2ecf20Sopenharmony_ci	/* Enable irq after I2C bus already resume */
4108c2ecf20Sopenharmony_ci	enable_irq(i2c->irq);
4118c2ecf20Sopenharmony_ci	if (device_may_wakeup(dev))
4128c2ecf20Sopenharmony_ci		disable_irq_wake(i2c->irq);
4138c2ecf20Sopenharmony_ci
4148c2ecf20Sopenharmony_ci	return 0;
4158c2ecf20Sopenharmony_ci}
4168c2ecf20Sopenharmony_ci
4178c2ecf20Sopenharmony_cistatic SIMPLE_DEV_PM_OPS(rtmv20_pm, rtmv20_suspend, rtmv20_resume);
4188c2ecf20Sopenharmony_ci
4198c2ecf20Sopenharmony_cistatic const struct of_device_id __maybe_unused rtmv20_of_id[] = {
4208c2ecf20Sopenharmony_ci	{ .compatible = "richtek,rtmv20", },
4218c2ecf20Sopenharmony_ci	{}
4228c2ecf20Sopenharmony_ci};
4238c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, rtmv20_of_id);
4248c2ecf20Sopenharmony_ci
4258c2ecf20Sopenharmony_cistatic struct i2c_driver rtmv20_driver = {
4268c2ecf20Sopenharmony_ci	.driver = {
4278c2ecf20Sopenharmony_ci		.name = "rtmv20",
4288c2ecf20Sopenharmony_ci		.of_match_table = of_match_ptr(rtmv20_of_id),
4298c2ecf20Sopenharmony_ci		.pm = &rtmv20_pm,
4308c2ecf20Sopenharmony_ci	},
4318c2ecf20Sopenharmony_ci	.probe_new = rtmv20_probe,
4328c2ecf20Sopenharmony_ci};
4338c2ecf20Sopenharmony_cimodule_i2c_driver(rtmv20_driver);
4348c2ecf20Sopenharmony_ci
4358c2ecf20Sopenharmony_ciMODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
4368c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Richtek RTMV20 Regulator Driver");
4378c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
438