18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * simple driver for PWM (Pulse Width Modulator) controller
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#include <linux/bitfield.h>
98c2ecf20Sopenharmony_ci#include <linux/bitops.h>
108c2ecf20Sopenharmony_ci#include <linux/clk.h>
118c2ecf20Sopenharmony_ci#include <linux/delay.h>
128c2ecf20Sopenharmony_ci#include <linux/err.h>
138c2ecf20Sopenharmony_ci#include <linux/io.h>
148c2ecf20Sopenharmony_ci#include <linux/kernel.h>
158c2ecf20Sopenharmony_ci#include <linux/module.h>
168c2ecf20Sopenharmony_ci#include <linux/of.h>
178c2ecf20Sopenharmony_ci#include <linux/of_device.h>
188c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
198c2ecf20Sopenharmony_ci#include <linux/pwm.h>
208c2ecf20Sopenharmony_ci#include <linux/slab.h>
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci#define MX1_PWMC			0x00   /* PWM Control Register */
238c2ecf20Sopenharmony_ci#define MX1_PWMS			0x04   /* PWM Sample Register */
248c2ecf20Sopenharmony_ci#define MX1_PWMP			0x08   /* PWM Period Register */
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#define MX1_PWMC_EN			BIT(4)
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_cistruct pwm_imx1_chip {
298c2ecf20Sopenharmony_ci	struct clk *clk_ipg;
308c2ecf20Sopenharmony_ci	struct clk *clk_per;
318c2ecf20Sopenharmony_ci	void __iomem *mmio_base;
328c2ecf20Sopenharmony_ci	struct pwm_chip chip;
338c2ecf20Sopenharmony_ci};
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci#define to_pwm_imx1_chip(chip)	container_of(chip, struct pwm_imx1_chip, chip)
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_cistatic int pwm_imx1_clk_prepare_enable(struct pwm_chip *chip)
388c2ecf20Sopenharmony_ci{
398c2ecf20Sopenharmony_ci	struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
408c2ecf20Sopenharmony_ci	int ret;
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci	ret = clk_prepare_enable(imx->clk_ipg);
438c2ecf20Sopenharmony_ci	if (ret)
448c2ecf20Sopenharmony_ci		return ret;
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci	ret = clk_prepare_enable(imx->clk_per);
478c2ecf20Sopenharmony_ci	if (ret) {
488c2ecf20Sopenharmony_ci		clk_disable_unprepare(imx->clk_ipg);
498c2ecf20Sopenharmony_ci		return ret;
508c2ecf20Sopenharmony_ci	}
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci	return 0;
538c2ecf20Sopenharmony_ci}
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_cistatic void pwm_imx1_clk_disable_unprepare(struct pwm_chip *chip)
568c2ecf20Sopenharmony_ci{
578c2ecf20Sopenharmony_ci	struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci	clk_disable_unprepare(imx->clk_per);
608c2ecf20Sopenharmony_ci	clk_disable_unprepare(imx->clk_ipg);
618c2ecf20Sopenharmony_ci}
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_cistatic int pwm_imx1_config(struct pwm_chip *chip,
648c2ecf20Sopenharmony_ci			   struct pwm_device *pwm, int duty_ns, int period_ns)
658c2ecf20Sopenharmony_ci{
668c2ecf20Sopenharmony_ci	struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
678c2ecf20Sopenharmony_ci	u32 max, p;
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci	/*
708c2ecf20Sopenharmony_ci	 * The PWM subsystem allows for exact frequencies. However,
718c2ecf20Sopenharmony_ci	 * I cannot connect a scope on my device to the PWM line and
728c2ecf20Sopenharmony_ci	 * thus cannot provide the program the PWM controller
738c2ecf20Sopenharmony_ci	 * exactly. Instead, I'm relying on the fact that the
748c2ecf20Sopenharmony_ci	 * Bootloader (u-boot or WinCE+haret) has programmed the PWM
758c2ecf20Sopenharmony_ci	 * function group already. So I'll just modify the PWM sample
768c2ecf20Sopenharmony_ci	 * register to follow the ratio of duty_ns vs. period_ns
778c2ecf20Sopenharmony_ci	 * accordingly.
788c2ecf20Sopenharmony_ci	 *
798c2ecf20Sopenharmony_ci	 * This is good enough for programming the brightness of
808c2ecf20Sopenharmony_ci	 * the LCD backlight.
818c2ecf20Sopenharmony_ci	 *
828c2ecf20Sopenharmony_ci	 * The real implementation would divide PERCLK[0] first by
838c2ecf20Sopenharmony_ci	 * both the prescaler (/1 .. /128) and then by CLKSEL
848c2ecf20Sopenharmony_ci	 * (/2 .. /16).
858c2ecf20Sopenharmony_ci	 */
868c2ecf20Sopenharmony_ci	max = readl(imx->mmio_base + MX1_PWMP);
878c2ecf20Sopenharmony_ci	p = max * duty_ns / period_ns;
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci	writel(max - p, imx->mmio_base + MX1_PWMS);
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci	return 0;
928c2ecf20Sopenharmony_ci}
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_cistatic int pwm_imx1_enable(struct pwm_chip *chip, struct pwm_device *pwm)
958c2ecf20Sopenharmony_ci{
968c2ecf20Sopenharmony_ci	struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
978c2ecf20Sopenharmony_ci	u32 value;
988c2ecf20Sopenharmony_ci	int ret;
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_ci	ret = pwm_imx1_clk_prepare_enable(chip);
1018c2ecf20Sopenharmony_ci	if (ret < 0)
1028c2ecf20Sopenharmony_ci		return ret;
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci	value = readl(imx->mmio_base + MX1_PWMC);
1058c2ecf20Sopenharmony_ci	value |= MX1_PWMC_EN;
1068c2ecf20Sopenharmony_ci	writel(value, imx->mmio_base + MX1_PWMC);
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci	return 0;
1098c2ecf20Sopenharmony_ci}
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_cistatic void pwm_imx1_disable(struct pwm_chip *chip, struct pwm_device *pwm)
1128c2ecf20Sopenharmony_ci{
1138c2ecf20Sopenharmony_ci	struct pwm_imx1_chip *imx = to_pwm_imx1_chip(chip);
1148c2ecf20Sopenharmony_ci	u32 value;
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_ci	value = readl(imx->mmio_base + MX1_PWMC);
1178c2ecf20Sopenharmony_ci	value &= ~MX1_PWMC_EN;
1188c2ecf20Sopenharmony_ci	writel(value, imx->mmio_base + MX1_PWMC);
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_ci	pwm_imx1_clk_disable_unprepare(chip);
1218c2ecf20Sopenharmony_ci}
1228c2ecf20Sopenharmony_ci
1238c2ecf20Sopenharmony_cistatic const struct pwm_ops pwm_imx1_ops = {
1248c2ecf20Sopenharmony_ci	.enable = pwm_imx1_enable,
1258c2ecf20Sopenharmony_ci	.disable = pwm_imx1_disable,
1268c2ecf20Sopenharmony_ci	.config = pwm_imx1_config,
1278c2ecf20Sopenharmony_ci	.owner = THIS_MODULE,
1288c2ecf20Sopenharmony_ci};
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_cistatic const struct of_device_id pwm_imx1_dt_ids[] = {
1318c2ecf20Sopenharmony_ci	{ .compatible = "fsl,imx1-pwm", },
1328c2ecf20Sopenharmony_ci	{ /* sentinel */ }
1338c2ecf20Sopenharmony_ci};
1348c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, pwm_imx1_dt_ids);
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_cistatic int pwm_imx1_probe(struct platform_device *pdev)
1378c2ecf20Sopenharmony_ci{
1388c2ecf20Sopenharmony_ci	struct pwm_imx1_chip *imx;
1398c2ecf20Sopenharmony_ci	struct resource *r;
1408c2ecf20Sopenharmony_ci
1418c2ecf20Sopenharmony_ci	imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
1428c2ecf20Sopenharmony_ci	if (!imx)
1438c2ecf20Sopenharmony_ci		return -ENOMEM;
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ci	platform_set_drvdata(pdev, imx);
1468c2ecf20Sopenharmony_ci
1478c2ecf20Sopenharmony_ci	imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
1488c2ecf20Sopenharmony_ci	if (IS_ERR(imx->clk_ipg)) {
1498c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "getting ipg clock failed with %ld\n",
1508c2ecf20Sopenharmony_ci				PTR_ERR(imx->clk_ipg));
1518c2ecf20Sopenharmony_ci		return PTR_ERR(imx->clk_ipg);
1528c2ecf20Sopenharmony_ci	}
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_ci	imx->clk_per = devm_clk_get(&pdev->dev, "per");
1558c2ecf20Sopenharmony_ci	if (IS_ERR(imx->clk_per)) {
1568c2ecf20Sopenharmony_ci		int ret = PTR_ERR(imx->clk_per);
1578c2ecf20Sopenharmony_ci
1588c2ecf20Sopenharmony_ci		if (ret != -EPROBE_DEFER)
1598c2ecf20Sopenharmony_ci			dev_err(&pdev->dev,
1608c2ecf20Sopenharmony_ci				"failed to get peripheral clock: %d\n",
1618c2ecf20Sopenharmony_ci				ret);
1628c2ecf20Sopenharmony_ci
1638c2ecf20Sopenharmony_ci		return ret;
1648c2ecf20Sopenharmony_ci	}
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci	imx->chip.ops = &pwm_imx1_ops;
1678c2ecf20Sopenharmony_ci	imx->chip.dev = &pdev->dev;
1688c2ecf20Sopenharmony_ci	imx->chip.base = -1;
1698c2ecf20Sopenharmony_ci	imx->chip.npwm = 1;
1708c2ecf20Sopenharmony_ci
1718c2ecf20Sopenharmony_ci	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1728c2ecf20Sopenharmony_ci	imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);
1738c2ecf20Sopenharmony_ci	if (IS_ERR(imx->mmio_base))
1748c2ecf20Sopenharmony_ci		return PTR_ERR(imx->mmio_base);
1758c2ecf20Sopenharmony_ci
1768c2ecf20Sopenharmony_ci	return pwmchip_add(&imx->chip);
1778c2ecf20Sopenharmony_ci}
1788c2ecf20Sopenharmony_ci
1798c2ecf20Sopenharmony_cistatic int pwm_imx1_remove(struct platform_device *pdev)
1808c2ecf20Sopenharmony_ci{
1818c2ecf20Sopenharmony_ci	struct pwm_imx1_chip *imx = platform_get_drvdata(pdev);
1828c2ecf20Sopenharmony_ci
1838c2ecf20Sopenharmony_ci	return pwmchip_remove(&imx->chip);
1848c2ecf20Sopenharmony_ci}
1858c2ecf20Sopenharmony_ci
1868c2ecf20Sopenharmony_cistatic struct platform_driver pwm_imx1_driver = {
1878c2ecf20Sopenharmony_ci	.driver = {
1888c2ecf20Sopenharmony_ci		.name = "pwm-imx1",
1898c2ecf20Sopenharmony_ci		.of_match_table = pwm_imx1_dt_ids,
1908c2ecf20Sopenharmony_ci	},
1918c2ecf20Sopenharmony_ci	.probe = pwm_imx1_probe,
1928c2ecf20Sopenharmony_ci	.remove = pwm_imx1_remove,
1938c2ecf20Sopenharmony_ci};
1948c2ecf20Sopenharmony_cimodule_platform_driver(pwm_imx1_driver);
1958c2ecf20Sopenharmony_ci
1968c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
1978c2ecf20Sopenharmony_ciMODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
198