18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright 2014 Bart Tanghe <bart.tanghe@thomasmore.be>
48c2ecf20Sopenharmony_ci */
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci#include <linux/clk.h>
78c2ecf20Sopenharmony_ci#include <linux/err.h>
88c2ecf20Sopenharmony_ci#include <linux/io.h>
98c2ecf20Sopenharmony_ci#include <linux/module.h>
108c2ecf20Sopenharmony_ci#include <linux/of.h>
118c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
128c2ecf20Sopenharmony_ci#include <linux/pwm.h>
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#define PWM_CONTROL		0x000
158c2ecf20Sopenharmony_ci#define PWM_CONTROL_SHIFT(x)	((x) * 8)
168c2ecf20Sopenharmony_ci#define PWM_CONTROL_MASK	0xff
178c2ecf20Sopenharmony_ci#define PWM_MODE		0x80		/* set timer in PWM mode */
188c2ecf20Sopenharmony_ci#define PWM_ENABLE		(1 << 0)
198c2ecf20Sopenharmony_ci#define PWM_POLARITY		(1 << 4)
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci#define PERIOD(x)		(((x) * 0x10) + 0x10)
228c2ecf20Sopenharmony_ci#define DUTY(x)			(((x) * 0x10) + 0x14)
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci#define PERIOD_MIN		0x2
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_cistruct bcm2835_pwm {
278c2ecf20Sopenharmony_ci	struct pwm_chip chip;
288c2ecf20Sopenharmony_ci	struct device *dev;
298c2ecf20Sopenharmony_ci	void __iomem *base;
308c2ecf20Sopenharmony_ci	struct clk *clk;
318c2ecf20Sopenharmony_ci};
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_cistatic inline struct bcm2835_pwm *to_bcm2835_pwm(struct pwm_chip *chip)
348c2ecf20Sopenharmony_ci{
358c2ecf20Sopenharmony_ci	return container_of(chip, struct bcm2835_pwm, chip);
368c2ecf20Sopenharmony_ci}
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_cistatic int bcm2835_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
398c2ecf20Sopenharmony_ci{
408c2ecf20Sopenharmony_ci	struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
418c2ecf20Sopenharmony_ci	u32 value;
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci	value = readl(pc->base + PWM_CONTROL);
448c2ecf20Sopenharmony_ci	value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));
458c2ecf20Sopenharmony_ci	value |= (PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm));
468c2ecf20Sopenharmony_ci	writel(value, pc->base + PWM_CONTROL);
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci	return 0;
498c2ecf20Sopenharmony_ci}
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_cistatic void bcm2835_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
528c2ecf20Sopenharmony_ci{
538c2ecf20Sopenharmony_ci	struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
548c2ecf20Sopenharmony_ci	u32 value;
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci	value = readl(pc->base + PWM_CONTROL);
578c2ecf20Sopenharmony_ci	value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm));
588c2ecf20Sopenharmony_ci	writel(value, pc->base + PWM_CONTROL);
598c2ecf20Sopenharmony_ci}
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_cistatic int bcm2835_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
628c2ecf20Sopenharmony_ci			      int duty_ns, int period_ns)
638c2ecf20Sopenharmony_ci{
648c2ecf20Sopenharmony_ci	struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
658c2ecf20Sopenharmony_ci	unsigned long rate = clk_get_rate(pc->clk);
668c2ecf20Sopenharmony_ci	unsigned long scaler;
678c2ecf20Sopenharmony_ci	u32 period;
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci	if (!rate) {
708c2ecf20Sopenharmony_ci		dev_err(pc->dev, "failed to get clock rate\n");
718c2ecf20Sopenharmony_ci		return -EINVAL;
728c2ecf20Sopenharmony_ci	}
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci	scaler = DIV_ROUND_CLOSEST(NSEC_PER_SEC, rate);
758c2ecf20Sopenharmony_ci	period = DIV_ROUND_CLOSEST(period_ns, scaler);
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci	if (period < PERIOD_MIN)
788c2ecf20Sopenharmony_ci		return -EINVAL;
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci	writel(DIV_ROUND_CLOSEST(duty_ns, scaler),
818c2ecf20Sopenharmony_ci	       pc->base + DUTY(pwm->hwpwm));
828c2ecf20Sopenharmony_ci	writel(period, pc->base + PERIOD(pwm->hwpwm));
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci	return 0;
858c2ecf20Sopenharmony_ci}
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_cistatic int bcm2835_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
888c2ecf20Sopenharmony_ci{
898c2ecf20Sopenharmony_ci	struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
908c2ecf20Sopenharmony_ci	u32 value;
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ci	value = readl(pc->base + PWM_CONTROL);
938c2ecf20Sopenharmony_ci	value |= PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm);
948c2ecf20Sopenharmony_ci	writel(value, pc->base + PWM_CONTROL);
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci	return 0;
978c2ecf20Sopenharmony_ci}
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_cistatic void bcm2835_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
1008c2ecf20Sopenharmony_ci{
1018c2ecf20Sopenharmony_ci	struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
1028c2ecf20Sopenharmony_ci	u32 value;
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci	value = readl(pc->base + PWM_CONTROL);
1058c2ecf20Sopenharmony_ci	value &= ~(PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm));
1068c2ecf20Sopenharmony_ci	writel(value, pc->base + PWM_CONTROL);
1078c2ecf20Sopenharmony_ci}
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_cistatic int bcm2835_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
1108c2ecf20Sopenharmony_ci				enum pwm_polarity polarity)
1118c2ecf20Sopenharmony_ci{
1128c2ecf20Sopenharmony_ci	struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
1138c2ecf20Sopenharmony_ci	u32 value;
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci	value = readl(pc->base + PWM_CONTROL);
1168c2ecf20Sopenharmony_ci
1178c2ecf20Sopenharmony_ci	if (polarity == PWM_POLARITY_NORMAL)
1188c2ecf20Sopenharmony_ci		value &= ~(PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm));
1198c2ecf20Sopenharmony_ci	else
1208c2ecf20Sopenharmony_ci		value |= PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm);
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci	writel(value, pc->base + PWM_CONTROL);
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_ci	return 0;
1258c2ecf20Sopenharmony_ci}
1268c2ecf20Sopenharmony_ci
1278c2ecf20Sopenharmony_cistatic const struct pwm_ops bcm2835_pwm_ops = {
1288c2ecf20Sopenharmony_ci	.request = bcm2835_pwm_request,
1298c2ecf20Sopenharmony_ci	.free = bcm2835_pwm_free,
1308c2ecf20Sopenharmony_ci	.config = bcm2835_pwm_config,
1318c2ecf20Sopenharmony_ci	.enable = bcm2835_pwm_enable,
1328c2ecf20Sopenharmony_ci	.disable = bcm2835_pwm_disable,
1338c2ecf20Sopenharmony_ci	.set_polarity = bcm2835_set_polarity,
1348c2ecf20Sopenharmony_ci	.owner = THIS_MODULE,
1358c2ecf20Sopenharmony_ci};
1368c2ecf20Sopenharmony_ci
1378c2ecf20Sopenharmony_cistatic int bcm2835_pwm_probe(struct platform_device *pdev)
1388c2ecf20Sopenharmony_ci{
1398c2ecf20Sopenharmony_ci	struct bcm2835_pwm *pc;
1408c2ecf20Sopenharmony_ci	struct resource *res;
1418c2ecf20Sopenharmony_ci	int ret;
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_ci	pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
1448c2ecf20Sopenharmony_ci	if (!pc)
1458c2ecf20Sopenharmony_ci		return -ENOMEM;
1468c2ecf20Sopenharmony_ci
1478c2ecf20Sopenharmony_ci	pc->dev = &pdev->dev;
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ci	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1508c2ecf20Sopenharmony_ci	pc->base = devm_ioremap_resource(&pdev->dev, res);
1518c2ecf20Sopenharmony_ci	if (IS_ERR(pc->base))
1528c2ecf20Sopenharmony_ci		return PTR_ERR(pc->base);
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_ci	pc->clk = devm_clk_get(&pdev->dev, NULL);
1558c2ecf20Sopenharmony_ci	if (IS_ERR(pc->clk))
1568c2ecf20Sopenharmony_ci		return dev_err_probe(&pdev->dev, PTR_ERR(pc->clk),
1578c2ecf20Sopenharmony_ci				     "clock not found\n");
1588c2ecf20Sopenharmony_ci
1598c2ecf20Sopenharmony_ci	ret = clk_prepare_enable(pc->clk);
1608c2ecf20Sopenharmony_ci	if (ret)
1618c2ecf20Sopenharmony_ci		return ret;
1628c2ecf20Sopenharmony_ci
1638c2ecf20Sopenharmony_ci	pc->chip.dev = &pdev->dev;
1648c2ecf20Sopenharmony_ci	pc->chip.ops = &bcm2835_pwm_ops;
1658c2ecf20Sopenharmony_ci	pc->chip.base = -1;
1668c2ecf20Sopenharmony_ci	pc->chip.npwm = 2;
1678c2ecf20Sopenharmony_ci	pc->chip.of_xlate = of_pwm_xlate_with_flags;
1688c2ecf20Sopenharmony_ci	pc->chip.of_pwm_n_cells = 3;
1698c2ecf20Sopenharmony_ci
1708c2ecf20Sopenharmony_ci	platform_set_drvdata(pdev, pc);
1718c2ecf20Sopenharmony_ci
1728c2ecf20Sopenharmony_ci	ret = pwmchip_add(&pc->chip);
1738c2ecf20Sopenharmony_ci	if (ret < 0)
1748c2ecf20Sopenharmony_ci		goto add_fail;
1758c2ecf20Sopenharmony_ci
1768c2ecf20Sopenharmony_ci	return 0;
1778c2ecf20Sopenharmony_ci
1788c2ecf20Sopenharmony_ciadd_fail:
1798c2ecf20Sopenharmony_ci	clk_disable_unprepare(pc->clk);
1808c2ecf20Sopenharmony_ci	return ret;
1818c2ecf20Sopenharmony_ci}
1828c2ecf20Sopenharmony_ci
1838c2ecf20Sopenharmony_cistatic int bcm2835_pwm_remove(struct platform_device *pdev)
1848c2ecf20Sopenharmony_ci{
1858c2ecf20Sopenharmony_ci	struct bcm2835_pwm *pc = platform_get_drvdata(pdev);
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ci	clk_disable_unprepare(pc->clk);
1888c2ecf20Sopenharmony_ci
1898c2ecf20Sopenharmony_ci	return pwmchip_remove(&pc->chip);
1908c2ecf20Sopenharmony_ci}
1918c2ecf20Sopenharmony_ci
1928c2ecf20Sopenharmony_cistatic const struct of_device_id bcm2835_pwm_of_match[] = {
1938c2ecf20Sopenharmony_ci	{ .compatible = "brcm,bcm2835-pwm", },
1948c2ecf20Sopenharmony_ci	{ /* sentinel */ }
1958c2ecf20Sopenharmony_ci};
1968c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, bcm2835_pwm_of_match);
1978c2ecf20Sopenharmony_ci
1988c2ecf20Sopenharmony_cistatic struct platform_driver bcm2835_pwm_driver = {
1998c2ecf20Sopenharmony_ci	.driver = {
2008c2ecf20Sopenharmony_ci		.name = "bcm2835-pwm",
2018c2ecf20Sopenharmony_ci		.of_match_table = bcm2835_pwm_of_match,
2028c2ecf20Sopenharmony_ci	},
2038c2ecf20Sopenharmony_ci	.probe = bcm2835_pwm_probe,
2048c2ecf20Sopenharmony_ci	.remove = bcm2835_pwm_remove,
2058c2ecf20Sopenharmony_ci};
2068c2ecf20Sopenharmony_cimodule_platform_driver(bcm2835_pwm_driver);
2078c2ecf20Sopenharmony_ci
2088c2ecf20Sopenharmony_ciMODULE_AUTHOR("Bart Tanghe <bart.tanghe@thomasmore.be>");
2098c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Broadcom BCM2835 PWM driver");
2108c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
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