1/*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/err.h>
17#include <linux/io.h>
18#include <linux/math64.h>
19#include <linux/module.h>
20#include <linux/of.h>
21#include <linux/platform_device.h>
22#include <linux/pwm.h>
23
24#define IPROC_PWM_CTRL_OFFSET			0x00
25#define IPROC_PWM_CTRL_TYPE_SHIFT(ch)		(15 + (ch))
26#define IPROC_PWM_CTRL_POLARITY_SHIFT(ch)	(8 + (ch))
27#define IPROC_PWM_CTRL_EN_SHIFT(ch)		(ch)
28
29#define IPROC_PWM_PERIOD_OFFSET(ch)		(0x04 + ((ch) << 3))
30#define IPROC_PWM_PERIOD_MIN			0x02
31#define IPROC_PWM_PERIOD_MAX			0xffff
32
33#define IPROC_PWM_DUTY_CYCLE_OFFSET(ch)		(0x08 + ((ch) << 3))
34#define IPROC_PWM_DUTY_CYCLE_MIN		0x00
35#define IPROC_PWM_DUTY_CYCLE_MAX		0xffff
36
37#define IPROC_PWM_PRESCALE_OFFSET		0x24
38#define IPROC_PWM_PRESCALE_BITS			0x06
39#define IPROC_PWM_PRESCALE_SHIFT(ch)		((3 - (ch)) * \
40						 IPROC_PWM_PRESCALE_BITS)
41#define IPROC_PWM_PRESCALE_MASK(ch)		(IPROC_PWM_PRESCALE_MAX << \
42						 IPROC_PWM_PRESCALE_SHIFT(ch))
43#define IPROC_PWM_PRESCALE_MIN			0x00
44#define IPROC_PWM_PRESCALE_MAX			0x3f
45
46struct iproc_pwmc {
47	struct pwm_chip chip;
48	void __iomem *base;
49	struct clk *clk;
50};
51
52static inline struct iproc_pwmc *to_iproc_pwmc(struct pwm_chip *chip)
53{
54	return container_of(chip, struct iproc_pwmc, chip);
55}
56
57static void iproc_pwmc_enable(struct iproc_pwmc *ip, unsigned int channel)
58{
59	u32 value;
60
61	value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
62	value |= 1 << IPROC_PWM_CTRL_EN_SHIFT(channel);
63	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
64
65	/* must be a 400 ns delay between clearing and setting enable bit */
66	ndelay(400);
67}
68
69static void iproc_pwmc_disable(struct iproc_pwmc *ip, unsigned int channel)
70{
71	u32 value;
72
73	value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
74	value &= ~(1 << IPROC_PWM_CTRL_EN_SHIFT(channel));
75	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
76
77	/* must be a 400 ns delay between clearing and setting enable bit */
78	ndelay(400);
79}
80
81static void iproc_pwmc_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
82				 struct pwm_state *state)
83{
84	struct iproc_pwmc *ip = to_iproc_pwmc(chip);
85	u64 tmp, multi, rate;
86	u32 value, prescale;
87
88	value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
89
90	if (value & BIT(IPROC_PWM_CTRL_EN_SHIFT(pwm->hwpwm)))
91		state->enabled = true;
92	else
93		state->enabled = false;
94
95	if (value & BIT(IPROC_PWM_CTRL_POLARITY_SHIFT(pwm->hwpwm)))
96		state->polarity = PWM_POLARITY_NORMAL;
97	else
98		state->polarity = PWM_POLARITY_INVERSED;
99
100	rate = clk_get_rate(ip->clk);
101	if (rate == 0) {
102		state->period = 0;
103		state->duty_cycle = 0;
104		return;
105	}
106
107	value = readl(ip->base + IPROC_PWM_PRESCALE_OFFSET);
108	prescale = value >> IPROC_PWM_PRESCALE_SHIFT(pwm->hwpwm);
109	prescale &= IPROC_PWM_PRESCALE_MAX;
110
111	multi = NSEC_PER_SEC * (prescale + 1);
112
113	value = readl(ip->base + IPROC_PWM_PERIOD_OFFSET(pwm->hwpwm));
114	tmp = (value & IPROC_PWM_PERIOD_MAX) * multi;
115	state->period = div64_u64(tmp, rate);
116
117	value = readl(ip->base + IPROC_PWM_DUTY_CYCLE_OFFSET(pwm->hwpwm));
118	tmp = (value & IPROC_PWM_PERIOD_MAX) * multi;
119	state->duty_cycle = div64_u64(tmp, rate);
120}
121
122static int iproc_pwmc_apply(struct pwm_chip *chip, struct pwm_device *pwm,
123			    const struct pwm_state *state)
124{
125	unsigned long prescale = IPROC_PWM_PRESCALE_MIN;
126	struct iproc_pwmc *ip = to_iproc_pwmc(chip);
127	u32 value, period, duty;
128	u64 rate;
129
130	rate = clk_get_rate(ip->clk);
131
132	/*
133	 * Find period count, duty count and prescale to suit duty_cycle and
134	 * period. This is done according to formulas described below:
135	 *
136	 * period_ns = 10^9 * (PRESCALE + 1) * PC / PWM_CLK_RATE
137	 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
138	 *
139	 * PC = (PWM_CLK_RATE * period_ns) / (10^9 * (PRESCALE + 1))
140	 * DC = (PWM_CLK_RATE * duty_ns) / (10^9 * (PRESCALE + 1))
141	 */
142	while (1) {
143		u64 value, div;
144
145		div = NSEC_PER_SEC * (prescale + 1);
146		value = rate * state->period;
147		period = div64_u64(value, div);
148		value = rate * state->duty_cycle;
149		duty = div64_u64(value, div);
150
151		if (period < IPROC_PWM_PERIOD_MIN)
152			return -EINVAL;
153
154		if (period <= IPROC_PWM_PERIOD_MAX &&
155		     duty <= IPROC_PWM_DUTY_CYCLE_MAX)
156			break;
157
158		/* Otherwise, increase prescale and recalculate counts */
159		if (++prescale > IPROC_PWM_PRESCALE_MAX)
160			return -EINVAL;
161	}
162
163	iproc_pwmc_disable(ip, pwm->hwpwm);
164
165	/* Set prescale */
166	value = readl(ip->base + IPROC_PWM_PRESCALE_OFFSET);
167	value &= ~IPROC_PWM_PRESCALE_MASK(pwm->hwpwm);
168	value |= prescale << IPROC_PWM_PRESCALE_SHIFT(pwm->hwpwm);
169	writel(value, ip->base + IPROC_PWM_PRESCALE_OFFSET);
170
171	/* set period and duty cycle */
172	writel(period, ip->base + IPROC_PWM_PERIOD_OFFSET(pwm->hwpwm));
173	writel(duty, ip->base + IPROC_PWM_DUTY_CYCLE_OFFSET(pwm->hwpwm));
174
175	/* set polarity */
176	value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
177
178	if (state->polarity == PWM_POLARITY_NORMAL)
179		value |= 1 << IPROC_PWM_CTRL_POLARITY_SHIFT(pwm->hwpwm);
180	else
181		value &= ~(1 << IPROC_PWM_CTRL_POLARITY_SHIFT(pwm->hwpwm));
182
183	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
184
185	if (state->enabled)
186		iproc_pwmc_enable(ip, pwm->hwpwm);
187
188	return 0;
189}
190
191static const struct pwm_ops iproc_pwm_ops = {
192	.apply = iproc_pwmc_apply,
193	.get_state = iproc_pwmc_get_state,
194	.owner = THIS_MODULE,
195};
196
197static int iproc_pwmc_probe(struct platform_device *pdev)
198{
199	struct iproc_pwmc *ip;
200	struct resource *res;
201	unsigned int i;
202	u32 value;
203	int ret;
204
205	ip = devm_kzalloc(&pdev->dev, sizeof(*ip), GFP_KERNEL);
206	if (!ip)
207		return -ENOMEM;
208
209	platform_set_drvdata(pdev, ip);
210
211	ip->chip.dev = &pdev->dev;
212	ip->chip.ops = &iproc_pwm_ops;
213	ip->chip.base = -1;
214	ip->chip.npwm = 4;
215	ip->chip.of_xlate = of_pwm_xlate_with_flags;
216	ip->chip.of_pwm_n_cells = 3;
217
218	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
219	ip->base = devm_ioremap_resource(&pdev->dev, res);
220	if (IS_ERR(ip->base))
221		return PTR_ERR(ip->base);
222
223	ip->clk = devm_clk_get(&pdev->dev, NULL);
224	if (IS_ERR(ip->clk)) {
225		dev_err(&pdev->dev, "failed to get clock: %ld\n",
226			PTR_ERR(ip->clk));
227		return PTR_ERR(ip->clk);
228	}
229
230	ret = clk_prepare_enable(ip->clk);
231	if (ret < 0) {
232		dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
233		return ret;
234	}
235
236	/* Set full drive and normal polarity for all channels */
237	value = readl(ip->base + IPROC_PWM_CTRL_OFFSET);
238
239	for (i = 0; i < ip->chip.npwm; i++) {
240		value &= ~(1 << IPROC_PWM_CTRL_TYPE_SHIFT(i));
241		value |= 1 << IPROC_PWM_CTRL_POLARITY_SHIFT(i);
242	}
243
244	writel(value, ip->base + IPROC_PWM_CTRL_OFFSET);
245
246	ret = pwmchip_add(&ip->chip);
247	if (ret < 0) {
248		dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
249		clk_disable_unprepare(ip->clk);
250	}
251
252	return ret;
253}
254
255static int iproc_pwmc_remove(struct platform_device *pdev)
256{
257	struct iproc_pwmc *ip = platform_get_drvdata(pdev);
258
259	clk_disable_unprepare(ip->clk);
260
261	return pwmchip_remove(&ip->chip);
262}
263
264static const struct of_device_id bcm_iproc_pwmc_dt[] = {
265	{ .compatible = "brcm,iproc-pwm" },
266	{ },
267};
268MODULE_DEVICE_TABLE(of, bcm_iproc_pwmc_dt);
269
270static struct platform_driver iproc_pwmc_driver = {
271	.driver = {
272		.name = "bcm-iproc-pwm",
273		.of_match_table = bcm_iproc_pwmc_dt,
274	},
275	.probe = iproc_pwmc_probe,
276	.remove = iproc_pwmc_remove,
277};
278module_platform_driver(iproc_pwmc_driver);
279
280MODULE_AUTHOR("Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>");
281MODULE_DESCRIPTION("Broadcom iProc PWM driver");
282MODULE_LICENSE("GPL v2");
283