18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Intel BXT Whiskey Cove PMIC TMU driver
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2016 Intel Corporation. All rights reserved.
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * This driver adds TMU (Time Management Unit) support for Intel BXT platform.
88c2ecf20Sopenharmony_ci * It enables the alarm wake-up functionality in the TMU unit of Whiskey Cove
98c2ecf20Sopenharmony_ci * PMIC.
108c2ecf20Sopenharmony_ci */
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci#include <linux/module.h>
138c2ecf20Sopenharmony_ci#include <linux/mod_devicetable.h>
148c2ecf20Sopenharmony_ci#include <linux/interrupt.h>
158c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
168c2ecf20Sopenharmony_ci#include <linux/mfd/intel_soc_pmic.h>
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#define BXTWC_TMUIRQ		0x4fb6
198c2ecf20Sopenharmony_ci#define BXTWC_MIRQLVL1		0x4e0e
208c2ecf20Sopenharmony_ci#define BXTWC_MTMUIRQ_REG	0x4fb7
218c2ecf20Sopenharmony_ci#define BXTWC_MIRQLVL1_MTMU	BIT(1)
228c2ecf20Sopenharmony_ci#define BXTWC_TMU_WK_ALRM	BIT(1)
238c2ecf20Sopenharmony_ci#define BXTWC_TMU_SYS_ALRM	BIT(2)
248c2ecf20Sopenharmony_ci#define BXTWC_TMU_ALRM_MASK	(BXTWC_TMU_WK_ALRM | BXTWC_TMU_SYS_ALRM)
258c2ecf20Sopenharmony_ci#define BXTWC_TMU_ALRM_IRQ	(BXTWC_TMU_WK_ALRM | BXTWC_TMU_SYS_ALRM)
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_cistruct wcove_tmu {
288c2ecf20Sopenharmony_ci	int irq;
298c2ecf20Sopenharmony_ci	struct device *dev;
308c2ecf20Sopenharmony_ci	struct regmap *regmap;
318c2ecf20Sopenharmony_ci};
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_cistatic irqreturn_t bxt_wcove_tmu_irq_handler(int irq, void *data)
348c2ecf20Sopenharmony_ci{
358c2ecf20Sopenharmony_ci	struct wcove_tmu *wctmu = data;
368c2ecf20Sopenharmony_ci	unsigned int tmu_irq;
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	/* Read TMU interrupt reg */
398c2ecf20Sopenharmony_ci	regmap_read(wctmu->regmap, BXTWC_TMUIRQ, &tmu_irq);
408c2ecf20Sopenharmony_ci	if (tmu_irq & BXTWC_TMU_ALRM_IRQ) {
418c2ecf20Sopenharmony_ci		/* clear TMU irq */
428c2ecf20Sopenharmony_ci		regmap_write(wctmu->regmap, BXTWC_TMUIRQ, tmu_irq);
438c2ecf20Sopenharmony_ci		return IRQ_HANDLED;
448c2ecf20Sopenharmony_ci	}
458c2ecf20Sopenharmony_ci	return IRQ_NONE;
468c2ecf20Sopenharmony_ci}
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_cistatic int bxt_wcove_tmu_probe(struct platform_device *pdev)
498c2ecf20Sopenharmony_ci{
508c2ecf20Sopenharmony_ci	struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
518c2ecf20Sopenharmony_ci	struct regmap_irq_chip_data *regmap_irq_chip;
528c2ecf20Sopenharmony_ci	struct wcove_tmu *wctmu;
538c2ecf20Sopenharmony_ci	int ret, virq, irq;
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	wctmu = devm_kzalloc(&pdev->dev, sizeof(*wctmu), GFP_KERNEL);
568c2ecf20Sopenharmony_ci	if (!wctmu)
578c2ecf20Sopenharmony_ci		return -ENOMEM;
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci	wctmu->dev = &pdev->dev;
608c2ecf20Sopenharmony_ci	wctmu->regmap = pmic->regmap;
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci	irq = platform_get_irq(pdev, 0);
638c2ecf20Sopenharmony_ci	if (irq < 0)
648c2ecf20Sopenharmony_ci		return irq;
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci	regmap_irq_chip = pmic->irq_chip_data_tmu;
678c2ecf20Sopenharmony_ci	virq = regmap_irq_get_virq(regmap_irq_chip, irq);
688c2ecf20Sopenharmony_ci	if (virq < 0) {
698c2ecf20Sopenharmony_ci		dev_err(&pdev->dev,
708c2ecf20Sopenharmony_ci			"failed to get virtual interrupt=%d\n", irq);
718c2ecf20Sopenharmony_ci		return virq;
728c2ecf20Sopenharmony_ci	}
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci	ret = devm_request_threaded_irq(&pdev->dev, virq,
758c2ecf20Sopenharmony_ci					NULL, bxt_wcove_tmu_irq_handler,
768c2ecf20Sopenharmony_ci					IRQF_ONESHOT, "bxt_wcove_tmu", wctmu);
778c2ecf20Sopenharmony_ci	if (ret) {
788c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "request irq failed: %d,virq: %d\n",
798c2ecf20Sopenharmony_ci							ret, virq);
808c2ecf20Sopenharmony_ci		return ret;
818c2ecf20Sopenharmony_ci	}
828c2ecf20Sopenharmony_ci	wctmu->irq = virq;
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci	/* Unmask TMU second level Wake & System alarm */
858c2ecf20Sopenharmony_ci	regmap_update_bits(wctmu->regmap, BXTWC_MTMUIRQ_REG,
868c2ecf20Sopenharmony_ci				  BXTWC_TMU_ALRM_MASK, 0);
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_ci	platform_set_drvdata(pdev, wctmu);
898c2ecf20Sopenharmony_ci	return 0;
908c2ecf20Sopenharmony_ci}
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_cistatic int bxt_wcove_tmu_remove(struct platform_device *pdev)
938c2ecf20Sopenharmony_ci{
948c2ecf20Sopenharmony_ci	struct wcove_tmu *wctmu = platform_get_drvdata(pdev);
958c2ecf20Sopenharmony_ci	unsigned int val;
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_ci	/* Mask TMU interrupts */
988c2ecf20Sopenharmony_ci	regmap_read(wctmu->regmap, BXTWC_MIRQLVL1, &val);
998c2ecf20Sopenharmony_ci	regmap_write(wctmu->regmap, BXTWC_MIRQLVL1,
1008c2ecf20Sopenharmony_ci			val | BXTWC_MIRQLVL1_MTMU);
1018c2ecf20Sopenharmony_ci	regmap_read(wctmu->regmap, BXTWC_MTMUIRQ_REG, &val);
1028c2ecf20Sopenharmony_ci	regmap_write(wctmu->regmap, BXTWC_MTMUIRQ_REG,
1038c2ecf20Sopenharmony_ci			val | BXTWC_TMU_ALRM_MASK);
1048c2ecf20Sopenharmony_ci	return 0;
1058c2ecf20Sopenharmony_ci}
1068c2ecf20Sopenharmony_ci
1078c2ecf20Sopenharmony_ci#ifdef CONFIG_PM_SLEEP
1088c2ecf20Sopenharmony_cistatic int bxtwc_tmu_suspend(struct device *dev)
1098c2ecf20Sopenharmony_ci{
1108c2ecf20Sopenharmony_ci	struct wcove_tmu *wctmu = dev_get_drvdata(dev);
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci	enable_irq_wake(wctmu->irq);
1138c2ecf20Sopenharmony_ci	return 0;
1148c2ecf20Sopenharmony_ci}
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_cistatic int bxtwc_tmu_resume(struct device *dev)
1178c2ecf20Sopenharmony_ci{
1188c2ecf20Sopenharmony_ci	struct wcove_tmu *wctmu = dev_get_drvdata(dev);
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_ci	disable_irq_wake(wctmu->irq);
1218c2ecf20Sopenharmony_ci	return 0;
1228c2ecf20Sopenharmony_ci}
1238c2ecf20Sopenharmony_ci#endif
1248c2ecf20Sopenharmony_ci
1258c2ecf20Sopenharmony_cistatic SIMPLE_DEV_PM_OPS(bxtwc_tmu_pm_ops, bxtwc_tmu_suspend, bxtwc_tmu_resume);
1268c2ecf20Sopenharmony_ci
1278c2ecf20Sopenharmony_cistatic const struct platform_device_id bxt_wcove_tmu_id_table[] = {
1288c2ecf20Sopenharmony_ci	{ .name = "bxt_wcove_tmu" },
1298c2ecf20Sopenharmony_ci	{},
1308c2ecf20Sopenharmony_ci};
1318c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(platform, bxt_wcove_tmu_id_table);
1328c2ecf20Sopenharmony_ci
1338c2ecf20Sopenharmony_cistatic struct platform_driver bxt_wcove_tmu_driver = {
1348c2ecf20Sopenharmony_ci	.probe = bxt_wcove_tmu_probe,
1358c2ecf20Sopenharmony_ci	.remove = bxt_wcove_tmu_remove,
1368c2ecf20Sopenharmony_ci	.driver = {
1378c2ecf20Sopenharmony_ci		.name = "bxt_wcove_tmu",
1388c2ecf20Sopenharmony_ci		.pm     = &bxtwc_tmu_pm_ops,
1398c2ecf20Sopenharmony_ci	},
1408c2ecf20Sopenharmony_ci	.id_table = bxt_wcove_tmu_id_table,
1418c2ecf20Sopenharmony_ci};
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_cimodule_platform_driver(bxt_wcove_tmu_driver);
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
1468c2ecf20Sopenharmony_ciMODULE_AUTHOR("Nilesh Bacchewar <nilesh.bacchewar@intel.com>");
1478c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("BXT Whiskey Cove TMU Driver");
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