18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Driver header file for pin controller driver 48c2ecf20Sopenharmony_ci * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com 58c2ecf20Sopenharmony_ci */ 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#ifndef __PINCTRL_SPRD_H__ 88c2ecf20Sopenharmony_ci#define __PINCTRL_SPRD_H__ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_cistruct platform_device; 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#define NUM_OFFSET (20) 138c2ecf20Sopenharmony_ci#define TYPE_OFFSET (16) 148c2ecf20Sopenharmony_ci#define BIT_OFFSET (8) 158c2ecf20Sopenharmony_ci#define WIDTH_OFFSET (4) 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci#define SPRD_PIN_INFO(num, type, offset, width, reg) \ 188c2ecf20Sopenharmony_ci (((num) & 0xFFF) << NUM_OFFSET | \ 198c2ecf20Sopenharmony_ci ((type) & 0xF) << TYPE_OFFSET | \ 208c2ecf20Sopenharmony_ci ((offset) & 0xFF) << BIT_OFFSET | \ 218c2ecf20Sopenharmony_ci ((width) & 0xF) << WIDTH_OFFSET | \ 228c2ecf20Sopenharmony_ci ((reg) & 0xF)) 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci#define SPRD_PINCTRL_PIN(pin) SPRD_PINCTRL_PIN_DATA(pin, #pin) 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci#define SPRD_PINCTRL_PIN_DATA(a, b) \ 278c2ecf20Sopenharmony_ci { \ 288c2ecf20Sopenharmony_ci .name = b, \ 298c2ecf20Sopenharmony_ci .num = (((a) >> NUM_OFFSET) & 0xfff), \ 308c2ecf20Sopenharmony_ci .type = (((a) >> TYPE_OFFSET) & 0xf), \ 318c2ecf20Sopenharmony_ci .bit_offset = (((a) >> BIT_OFFSET) & 0xff), \ 328c2ecf20Sopenharmony_ci .bit_width = ((a) >> WIDTH_OFFSET & 0xf), \ 338c2ecf20Sopenharmony_ci .reg = ((a) & 0xf) \ 348c2ecf20Sopenharmony_ci } 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_cienum pin_type { 378c2ecf20Sopenharmony_ci GLOBAL_CTRL_PIN, 388c2ecf20Sopenharmony_ci COMMON_PIN, 398c2ecf20Sopenharmony_ci MISC_PIN, 408c2ecf20Sopenharmony_ci}; 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_cistruct sprd_pins_info { 438c2ecf20Sopenharmony_ci const char *name; 448c2ecf20Sopenharmony_ci unsigned int num; 458c2ecf20Sopenharmony_ci enum pin_type type; 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci /* for global control pins configuration */ 488c2ecf20Sopenharmony_ci unsigned long bit_offset; 498c2ecf20Sopenharmony_ci unsigned long bit_width; 508c2ecf20Sopenharmony_ci unsigned int reg; 518c2ecf20Sopenharmony_ci}; 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ciint sprd_pinctrl_core_probe(struct platform_device *pdev, 548c2ecf20Sopenharmony_ci struct sprd_pins_info *sprd_soc_pin_info, 558c2ecf20Sopenharmony_ci int pins_cnt); 568c2ecf20Sopenharmony_ciint sprd_pinctrl_remove(struct platform_device *pdev); 578c2ecf20Sopenharmony_civoid sprd_pinctrl_shutdown(struct platform_device *pdev); 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci#endif /* __PINCTRL_SPRD_H__ */ 60