18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Driver for the ST Microelectronics SPEAr300 pinmux 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Copyright (C) 2012 ST Microelectronics 58c2ecf20Sopenharmony_ci * Viresh Kumar <vireshk@kernel.org> 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 88c2ecf20Sopenharmony_ci * License version 2. This program is licensed "as is" without any 98c2ecf20Sopenharmony_ci * warranty of any kind, whether express or implied. 108c2ecf20Sopenharmony_ci */ 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#include <linux/err.h> 138c2ecf20Sopenharmony_ci#include <linux/init.h> 148c2ecf20Sopenharmony_ci#include <linux/of_device.h> 158c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 168c2ecf20Sopenharmony_ci#include "pinctrl-spear3xx.h" 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci#define DRIVER_NAME "spear300-pinmux" 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci/* addresses */ 218c2ecf20Sopenharmony_ci#define PMX_CONFIG_REG 0x00 228c2ecf20Sopenharmony_ci#define MODE_CONFIG_REG 0x04 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci/* modes */ 258c2ecf20Sopenharmony_ci#define NAND_MODE (1 << 0) 268c2ecf20Sopenharmony_ci#define NOR_MODE (1 << 1) 278c2ecf20Sopenharmony_ci#define PHOTO_FRAME_MODE (1 << 2) 288c2ecf20Sopenharmony_ci#define LEND_IP_PHONE_MODE (1 << 3) 298c2ecf20Sopenharmony_ci#define HEND_IP_PHONE_MODE (1 << 4) 308c2ecf20Sopenharmony_ci#define LEND_WIFI_PHONE_MODE (1 << 5) 318c2ecf20Sopenharmony_ci#define HEND_WIFI_PHONE_MODE (1 << 6) 328c2ecf20Sopenharmony_ci#define ATA_PABX_WI2S_MODE (1 << 7) 338c2ecf20Sopenharmony_ci#define ATA_PABX_I2S_MODE (1 << 8) 348c2ecf20Sopenharmony_ci#define CAML_LCDW_MODE (1 << 9) 358c2ecf20Sopenharmony_ci#define CAMU_LCD_MODE (1 << 10) 368c2ecf20Sopenharmony_ci#define CAMU_WLCD_MODE (1 << 11) 378c2ecf20Sopenharmony_ci#define CAML_LCD_MODE (1 << 12) 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_nand = { 408c2ecf20Sopenharmony_ci .name = "nand", 418c2ecf20Sopenharmony_ci .mode = NAND_MODE, 428c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 438c2ecf20Sopenharmony_ci .mask = 0x0000000F, 448c2ecf20Sopenharmony_ci .val = 0x00, 458c2ecf20Sopenharmony_ci}; 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_nor = { 488c2ecf20Sopenharmony_ci .name = "nor", 498c2ecf20Sopenharmony_ci .mode = NOR_MODE, 508c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 518c2ecf20Sopenharmony_ci .mask = 0x0000000F, 528c2ecf20Sopenharmony_ci .val = 0x01, 538c2ecf20Sopenharmony_ci}; 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_photo_frame = { 568c2ecf20Sopenharmony_ci .name = "photo frame mode", 578c2ecf20Sopenharmony_ci .mode = PHOTO_FRAME_MODE, 588c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 598c2ecf20Sopenharmony_ci .mask = 0x0000000F, 608c2ecf20Sopenharmony_ci .val = 0x02, 618c2ecf20Sopenharmony_ci}; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_lend_ip_phone = { 648c2ecf20Sopenharmony_ci .name = "lend ip phone mode", 658c2ecf20Sopenharmony_ci .mode = LEND_IP_PHONE_MODE, 668c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 678c2ecf20Sopenharmony_ci .mask = 0x0000000F, 688c2ecf20Sopenharmony_ci .val = 0x03, 698c2ecf20Sopenharmony_ci}; 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_hend_ip_phone = { 728c2ecf20Sopenharmony_ci .name = "hend ip phone mode", 738c2ecf20Sopenharmony_ci .mode = HEND_IP_PHONE_MODE, 748c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 758c2ecf20Sopenharmony_ci .mask = 0x0000000F, 768c2ecf20Sopenharmony_ci .val = 0x04, 778c2ecf20Sopenharmony_ci}; 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_lend_wifi_phone = { 808c2ecf20Sopenharmony_ci .name = "lend wifi phone mode", 818c2ecf20Sopenharmony_ci .mode = LEND_WIFI_PHONE_MODE, 828c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 838c2ecf20Sopenharmony_ci .mask = 0x0000000F, 848c2ecf20Sopenharmony_ci .val = 0x05, 858c2ecf20Sopenharmony_ci}; 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_hend_wifi_phone = { 888c2ecf20Sopenharmony_ci .name = "hend wifi phone mode", 898c2ecf20Sopenharmony_ci .mode = HEND_WIFI_PHONE_MODE, 908c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 918c2ecf20Sopenharmony_ci .mask = 0x0000000F, 928c2ecf20Sopenharmony_ci .val = 0x06, 938c2ecf20Sopenharmony_ci}; 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_ata_pabx_wi2s = { 968c2ecf20Sopenharmony_ci .name = "ata pabx wi2s mode", 978c2ecf20Sopenharmony_ci .mode = ATA_PABX_WI2S_MODE, 988c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 998c2ecf20Sopenharmony_ci .mask = 0x0000000F, 1008c2ecf20Sopenharmony_ci .val = 0x07, 1018c2ecf20Sopenharmony_ci}; 1028c2ecf20Sopenharmony_ci 1038c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_ata_pabx_i2s = { 1048c2ecf20Sopenharmony_ci .name = "ata pabx i2s mode", 1058c2ecf20Sopenharmony_ci .mode = ATA_PABX_I2S_MODE, 1068c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 1078c2ecf20Sopenharmony_ci .mask = 0x0000000F, 1088c2ecf20Sopenharmony_ci .val = 0x08, 1098c2ecf20Sopenharmony_ci}; 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_caml_lcdw = { 1128c2ecf20Sopenharmony_ci .name = "caml lcdw mode", 1138c2ecf20Sopenharmony_ci .mode = CAML_LCDW_MODE, 1148c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 1158c2ecf20Sopenharmony_ci .mask = 0x0000000F, 1168c2ecf20Sopenharmony_ci .val = 0x0C, 1178c2ecf20Sopenharmony_ci}; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_camu_lcd = { 1208c2ecf20Sopenharmony_ci .name = "camu lcd mode", 1218c2ecf20Sopenharmony_ci .mode = CAMU_LCD_MODE, 1228c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 1238c2ecf20Sopenharmony_ci .mask = 0x0000000F, 1248c2ecf20Sopenharmony_ci .val = 0x0D, 1258c2ecf20Sopenharmony_ci}; 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_camu_wlcd = { 1288c2ecf20Sopenharmony_ci .name = "camu wlcd mode", 1298c2ecf20Sopenharmony_ci .mode = CAMU_WLCD_MODE, 1308c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 1318c2ecf20Sopenharmony_ci .mask = 0x0000000F, 1328c2ecf20Sopenharmony_ci .val = 0xE, 1338c2ecf20Sopenharmony_ci}; 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_cistatic struct spear_pmx_mode pmx_mode_caml_lcd = { 1368c2ecf20Sopenharmony_ci .name = "caml lcd mode", 1378c2ecf20Sopenharmony_ci .mode = CAML_LCD_MODE, 1388c2ecf20Sopenharmony_ci .reg = MODE_CONFIG_REG, 1398c2ecf20Sopenharmony_ci .mask = 0x0000000F, 1408c2ecf20Sopenharmony_ci .val = 0x0F, 1418c2ecf20Sopenharmony_ci}; 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_cistatic struct spear_pmx_mode *spear300_pmx_modes[] = { 1448c2ecf20Sopenharmony_ci &pmx_mode_nand, 1458c2ecf20Sopenharmony_ci &pmx_mode_nor, 1468c2ecf20Sopenharmony_ci &pmx_mode_photo_frame, 1478c2ecf20Sopenharmony_ci &pmx_mode_lend_ip_phone, 1488c2ecf20Sopenharmony_ci &pmx_mode_hend_ip_phone, 1498c2ecf20Sopenharmony_ci &pmx_mode_lend_wifi_phone, 1508c2ecf20Sopenharmony_ci &pmx_mode_hend_wifi_phone, 1518c2ecf20Sopenharmony_ci &pmx_mode_ata_pabx_wi2s, 1528c2ecf20Sopenharmony_ci &pmx_mode_ata_pabx_i2s, 1538c2ecf20Sopenharmony_ci &pmx_mode_caml_lcdw, 1548c2ecf20Sopenharmony_ci &pmx_mode_camu_lcd, 1558c2ecf20Sopenharmony_ci &pmx_mode_camu_wlcd, 1568c2ecf20Sopenharmony_ci &pmx_mode_caml_lcd, 1578c2ecf20Sopenharmony_ci}; 1588c2ecf20Sopenharmony_ci 1598c2ecf20Sopenharmony_ci/* fsmc_2chips_pins */ 1608c2ecf20Sopenharmony_cistatic const unsigned fsmc_2chips_pins[] = { 1, 97 }; 1618c2ecf20Sopenharmony_cistatic struct spear_muxreg fsmc_2chips_muxreg[] = { 1628c2ecf20Sopenharmony_ci { 1638c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 1648c2ecf20Sopenharmony_ci .mask = PMX_FIRDA_MASK, 1658c2ecf20Sopenharmony_ci .val = 0, 1668c2ecf20Sopenharmony_ci }, 1678c2ecf20Sopenharmony_ci}; 1688c2ecf20Sopenharmony_ci 1698c2ecf20Sopenharmony_cistatic struct spear_modemux fsmc_2chips_modemux[] = { 1708c2ecf20Sopenharmony_ci { 1718c2ecf20Sopenharmony_ci .modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE | 1728c2ecf20Sopenharmony_ci ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE, 1738c2ecf20Sopenharmony_ci .muxregs = fsmc_2chips_muxreg, 1748c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(fsmc_2chips_muxreg), 1758c2ecf20Sopenharmony_ci }, 1768c2ecf20Sopenharmony_ci}; 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_cistatic struct spear_pingroup fsmc_2chips_pingroup = { 1798c2ecf20Sopenharmony_ci .name = "fsmc_2chips_grp", 1808c2ecf20Sopenharmony_ci .pins = fsmc_2chips_pins, 1818c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(fsmc_2chips_pins), 1828c2ecf20Sopenharmony_ci .modemuxs = fsmc_2chips_modemux, 1838c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(fsmc_2chips_modemux), 1848c2ecf20Sopenharmony_ci}; 1858c2ecf20Sopenharmony_ci 1868c2ecf20Sopenharmony_ci/* fsmc_4chips_pins */ 1878c2ecf20Sopenharmony_cistatic const unsigned fsmc_4chips_pins[] = { 1, 2, 3, 97 }; 1888c2ecf20Sopenharmony_cistatic struct spear_muxreg fsmc_4chips_muxreg[] = { 1898c2ecf20Sopenharmony_ci { 1908c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 1918c2ecf20Sopenharmony_ci .mask = PMX_FIRDA_MASK | PMX_UART0_MASK, 1928c2ecf20Sopenharmony_ci .val = 0, 1938c2ecf20Sopenharmony_ci }, 1948c2ecf20Sopenharmony_ci}; 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_cistatic struct spear_modemux fsmc_4chips_modemux[] = { 1978c2ecf20Sopenharmony_ci { 1988c2ecf20Sopenharmony_ci .modes = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE | 1998c2ecf20Sopenharmony_ci ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE, 2008c2ecf20Sopenharmony_ci .muxregs = fsmc_4chips_muxreg, 2018c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(fsmc_4chips_muxreg), 2028c2ecf20Sopenharmony_ci }, 2038c2ecf20Sopenharmony_ci}; 2048c2ecf20Sopenharmony_ci 2058c2ecf20Sopenharmony_cistatic struct spear_pingroup fsmc_4chips_pingroup = { 2068c2ecf20Sopenharmony_ci .name = "fsmc_4chips_grp", 2078c2ecf20Sopenharmony_ci .pins = fsmc_4chips_pins, 2088c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(fsmc_4chips_pins), 2098c2ecf20Sopenharmony_ci .modemuxs = fsmc_4chips_modemux, 2108c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(fsmc_4chips_modemux), 2118c2ecf20Sopenharmony_ci}; 2128c2ecf20Sopenharmony_ci 2138c2ecf20Sopenharmony_cistatic const char *const fsmc_grps[] = { "fsmc_2chips_grp", "fsmc_4chips_grp" 2148c2ecf20Sopenharmony_ci}; 2158c2ecf20Sopenharmony_cistatic struct spear_function fsmc_function = { 2168c2ecf20Sopenharmony_ci .name = "fsmc", 2178c2ecf20Sopenharmony_ci .groups = fsmc_grps, 2188c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(fsmc_grps), 2198c2ecf20Sopenharmony_ci}; 2208c2ecf20Sopenharmony_ci 2218c2ecf20Sopenharmony_ci/* clcd_lcdmode_pins */ 2228c2ecf20Sopenharmony_cistatic const unsigned clcd_lcdmode_pins[] = { 49, 50 }; 2238c2ecf20Sopenharmony_cistatic struct spear_muxreg clcd_lcdmode_muxreg[] = { 2248c2ecf20Sopenharmony_ci { 2258c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 2268c2ecf20Sopenharmony_ci .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK, 2278c2ecf20Sopenharmony_ci .val = 0, 2288c2ecf20Sopenharmony_ci }, 2298c2ecf20Sopenharmony_ci}; 2308c2ecf20Sopenharmony_ci 2318c2ecf20Sopenharmony_cistatic struct spear_modemux clcd_lcdmode_modemux[] = { 2328c2ecf20Sopenharmony_ci { 2338c2ecf20Sopenharmony_ci .modes = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE | 2348c2ecf20Sopenharmony_ci CAMU_LCD_MODE | CAML_LCD_MODE, 2358c2ecf20Sopenharmony_ci .muxregs = clcd_lcdmode_muxreg, 2368c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(clcd_lcdmode_muxreg), 2378c2ecf20Sopenharmony_ci }, 2388c2ecf20Sopenharmony_ci}; 2398c2ecf20Sopenharmony_ci 2408c2ecf20Sopenharmony_cistatic struct spear_pingroup clcd_lcdmode_pingroup = { 2418c2ecf20Sopenharmony_ci .name = "clcd_lcdmode_grp", 2428c2ecf20Sopenharmony_ci .pins = clcd_lcdmode_pins, 2438c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(clcd_lcdmode_pins), 2448c2ecf20Sopenharmony_ci .modemuxs = clcd_lcdmode_modemux, 2458c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(clcd_lcdmode_modemux), 2468c2ecf20Sopenharmony_ci}; 2478c2ecf20Sopenharmony_ci 2488c2ecf20Sopenharmony_ci/* clcd_pfmode_pins */ 2498c2ecf20Sopenharmony_cistatic const unsigned clcd_pfmode_pins[] = { 47, 48, 49, 50 }; 2508c2ecf20Sopenharmony_cistatic struct spear_muxreg clcd_pfmode_muxreg[] = { 2518c2ecf20Sopenharmony_ci { 2528c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 2538c2ecf20Sopenharmony_ci .mask = PMX_TIMER_2_3_MASK, 2548c2ecf20Sopenharmony_ci .val = 0, 2558c2ecf20Sopenharmony_ci }, 2568c2ecf20Sopenharmony_ci}; 2578c2ecf20Sopenharmony_ci 2588c2ecf20Sopenharmony_cistatic struct spear_modemux clcd_pfmode_modemux[] = { 2598c2ecf20Sopenharmony_ci { 2608c2ecf20Sopenharmony_ci .modes = PHOTO_FRAME_MODE, 2618c2ecf20Sopenharmony_ci .muxregs = clcd_pfmode_muxreg, 2628c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(clcd_pfmode_muxreg), 2638c2ecf20Sopenharmony_ci }, 2648c2ecf20Sopenharmony_ci}; 2658c2ecf20Sopenharmony_ci 2668c2ecf20Sopenharmony_cistatic struct spear_pingroup clcd_pfmode_pingroup = { 2678c2ecf20Sopenharmony_ci .name = "clcd_pfmode_grp", 2688c2ecf20Sopenharmony_ci .pins = clcd_pfmode_pins, 2698c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(clcd_pfmode_pins), 2708c2ecf20Sopenharmony_ci .modemuxs = clcd_pfmode_modemux, 2718c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(clcd_pfmode_modemux), 2728c2ecf20Sopenharmony_ci}; 2738c2ecf20Sopenharmony_ci 2748c2ecf20Sopenharmony_cistatic const char *const clcd_grps[] = { "clcd_lcdmode_grp", "clcd_pfmode_grp" 2758c2ecf20Sopenharmony_ci}; 2768c2ecf20Sopenharmony_cistatic struct spear_function clcd_function = { 2778c2ecf20Sopenharmony_ci .name = "clcd", 2788c2ecf20Sopenharmony_ci .groups = clcd_grps, 2798c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(clcd_grps), 2808c2ecf20Sopenharmony_ci}; 2818c2ecf20Sopenharmony_ci 2828c2ecf20Sopenharmony_ci/* tdm_pins */ 2838c2ecf20Sopenharmony_cistatic const unsigned tdm_pins[] = { 34, 35, 36, 37, 38 }; 2848c2ecf20Sopenharmony_cistatic struct spear_muxreg tdm_muxreg[] = { 2858c2ecf20Sopenharmony_ci { 2868c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 2878c2ecf20Sopenharmony_ci .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK, 2888c2ecf20Sopenharmony_ci .val = 0, 2898c2ecf20Sopenharmony_ci }, 2908c2ecf20Sopenharmony_ci}; 2918c2ecf20Sopenharmony_ci 2928c2ecf20Sopenharmony_cistatic struct spear_modemux tdm_modemux[] = { 2938c2ecf20Sopenharmony_ci { 2948c2ecf20Sopenharmony_ci .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | 2958c2ecf20Sopenharmony_ci HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE 2968c2ecf20Sopenharmony_ci | HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE 2978c2ecf20Sopenharmony_ci | ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE 2988c2ecf20Sopenharmony_ci | CAMU_WLCD_MODE | CAML_LCD_MODE, 2998c2ecf20Sopenharmony_ci .muxregs = tdm_muxreg, 3008c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(tdm_muxreg), 3018c2ecf20Sopenharmony_ci }, 3028c2ecf20Sopenharmony_ci}; 3038c2ecf20Sopenharmony_ci 3048c2ecf20Sopenharmony_cistatic struct spear_pingroup tdm_pingroup = { 3058c2ecf20Sopenharmony_ci .name = "tdm_grp", 3068c2ecf20Sopenharmony_ci .pins = tdm_pins, 3078c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(tdm_pins), 3088c2ecf20Sopenharmony_ci .modemuxs = tdm_modemux, 3098c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(tdm_modemux), 3108c2ecf20Sopenharmony_ci}; 3118c2ecf20Sopenharmony_ci 3128c2ecf20Sopenharmony_cistatic const char *const tdm_grps[] = { "tdm_grp" }; 3138c2ecf20Sopenharmony_cistatic struct spear_function tdm_function = { 3148c2ecf20Sopenharmony_ci .name = "tdm", 3158c2ecf20Sopenharmony_ci .groups = tdm_grps, 3168c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(tdm_grps), 3178c2ecf20Sopenharmony_ci}; 3188c2ecf20Sopenharmony_ci 3198c2ecf20Sopenharmony_ci/* i2c_clk_pins */ 3208c2ecf20Sopenharmony_cistatic const unsigned i2c_clk_pins[] = { 45, 46, 47, 48 }; 3218c2ecf20Sopenharmony_cistatic struct spear_muxreg i2c_clk_muxreg[] = { 3228c2ecf20Sopenharmony_ci { 3238c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 3248c2ecf20Sopenharmony_ci .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK, 3258c2ecf20Sopenharmony_ci .val = 0, 3268c2ecf20Sopenharmony_ci }, 3278c2ecf20Sopenharmony_ci}; 3288c2ecf20Sopenharmony_ci 3298c2ecf20Sopenharmony_cistatic struct spear_modemux i2c_clk_modemux[] = { 3308c2ecf20Sopenharmony_ci { 3318c2ecf20Sopenharmony_ci .modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE | 3328c2ecf20Sopenharmony_ci LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE | 3338c2ecf20Sopenharmony_ci ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE | CAML_LCDW_MODE 3348c2ecf20Sopenharmony_ci | CAML_LCD_MODE, 3358c2ecf20Sopenharmony_ci .muxregs = i2c_clk_muxreg, 3368c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(i2c_clk_muxreg), 3378c2ecf20Sopenharmony_ci }, 3388c2ecf20Sopenharmony_ci}; 3398c2ecf20Sopenharmony_ci 3408c2ecf20Sopenharmony_cistatic struct spear_pingroup i2c_clk_pingroup = { 3418c2ecf20Sopenharmony_ci .name = "i2c_clk_grp_grp", 3428c2ecf20Sopenharmony_ci .pins = i2c_clk_pins, 3438c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(i2c_clk_pins), 3448c2ecf20Sopenharmony_ci .modemuxs = i2c_clk_modemux, 3458c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(i2c_clk_modemux), 3468c2ecf20Sopenharmony_ci}; 3478c2ecf20Sopenharmony_ci 3488c2ecf20Sopenharmony_cistatic const char *const i2c_grps[] = { "i2c_clk_grp" }; 3498c2ecf20Sopenharmony_cistatic struct spear_function i2c_function = { 3508c2ecf20Sopenharmony_ci .name = "i2c1", 3518c2ecf20Sopenharmony_ci .groups = i2c_grps, 3528c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(i2c_grps), 3538c2ecf20Sopenharmony_ci}; 3548c2ecf20Sopenharmony_ci 3558c2ecf20Sopenharmony_ci/* caml_pins */ 3568c2ecf20Sopenharmony_cistatic const unsigned caml_pins[] = { 12, 13, 14, 15, 16, 17, 18, 19, 20, 21 }; 3578c2ecf20Sopenharmony_cistatic struct spear_muxreg caml_muxreg[] = { 3588c2ecf20Sopenharmony_ci { 3598c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 3608c2ecf20Sopenharmony_ci .mask = PMX_MII_MASK, 3618c2ecf20Sopenharmony_ci .val = 0, 3628c2ecf20Sopenharmony_ci }, 3638c2ecf20Sopenharmony_ci}; 3648c2ecf20Sopenharmony_ci 3658c2ecf20Sopenharmony_cistatic struct spear_modemux caml_modemux[] = { 3668c2ecf20Sopenharmony_ci { 3678c2ecf20Sopenharmony_ci .modes = CAML_LCDW_MODE | CAML_LCD_MODE, 3688c2ecf20Sopenharmony_ci .muxregs = caml_muxreg, 3698c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(caml_muxreg), 3708c2ecf20Sopenharmony_ci }, 3718c2ecf20Sopenharmony_ci}; 3728c2ecf20Sopenharmony_ci 3738c2ecf20Sopenharmony_cistatic struct spear_pingroup caml_pingroup = { 3748c2ecf20Sopenharmony_ci .name = "caml_grp", 3758c2ecf20Sopenharmony_ci .pins = caml_pins, 3768c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(caml_pins), 3778c2ecf20Sopenharmony_ci .modemuxs = caml_modemux, 3788c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(caml_modemux), 3798c2ecf20Sopenharmony_ci}; 3808c2ecf20Sopenharmony_ci 3818c2ecf20Sopenharmony_ci/* camu_pins */ 3828c2ecf20Sopenharmony_cistatic const unsigned camu_pins[] = { 16, 17, 18, 19, 20, 21, 45, 46, 47, 48 }; 3838c2ecf20Sopenharmony_cistatic struct spear_muxreg camu_muxreg[] = { 3848c2ecf20Sopenharmony_ci { 3858c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 3868c2ecf20Sopenharmony_ci .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK | PMX_MII_MASK, 3878c2ecf20Sopenharmony_ci .val = 0, 3888c2ecf20Sopenharmony_ci }, 3898c2ecf20Sopenharmony_ci}; 3908c2ecf20Sopenharmony_ci 3918c2ecf20Sopenharmony_cistatic struct spear_modemux camu_modemux[] = { 3928c2ecf20Sopenharmony_ci { 3938c2ecf20Sopenharmony_ci .modes = CAMU_LCD_MODE | CAMU_WLCD_MODE, 3948c2ecf20Sopenharmony_ci .muxregs = camu_muxreg, 3958c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(camu_muxreg), 3968c2ecf20Sopenharmony_ci }, 3978c2ecf20Sopenharmony_ci}; 3988c2ecf20Sopenharmony_ci 3998c2ecf20Sopenharmony_cistatic struct spear_pingroup camu_pingroup = { 4008c2ecf20Sopenharmony_ci .name = "camu_grp", 4018c2ecf20Sopenharmony_ci .pins = camu_pins, 4028c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(camu_pins), 4038c2ecf20Sopenharmony_ci .modemuxs = camu_modemux, 4048c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(camu_modemux), 4058c2ecf20Sopenharmony_ci}; 4068c2ecf20Sopenharmony_ci 4078c2ecf20Sopenharmony_cistatic const char *const cam_grps[] = { "caml_grp", "camu_grp" }; 4088c2ecf20Sopenharmony_cistatic struct spear_function cam_function = { 4098c2ecf20Sopenharmony_ci .name = "cam", 4108c2ecf20Sopenharmony_ci .groups = cam_grps, 4118c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(cam_grps), 4128c2ecf20Sopenharmony_ci}; 4138c2ecf20Sopenharmony_ci 4148c2ecf20Sopenharmony_ci/* dac_pins */ 4158c2ecf20Sopenharmony_cistatic const unsigned dac_pins[] = { 43, 44 }; 4168c2ecf20Sopenharmony_cistatic struct spear_muxreg dac_muxreg[] = { 4178c2ecf20Sopenharmony_ci { 4188c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 4198c2ecf20Sopenharmony_ci .mask = PMX_TIMER_0_1_MASK, 4208c2ecf20Sopenharmony_ci .val = 0, 4218c2ecf20Sopenharmony_ci }, 4228c2ecf20Sopenharmony_ci}; 4238c2ecf20Sopenharmony_ci 4248c2ecf20Sopenharmony_cistatic struct spear_modemux dac_modemux[] = { 4258c2ecf20Sopenharmony_ci { 4268c2ecf20Sopenharmony_ci .modes = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE 4278c2ecf20Sopenharmony_ci | CAMU_WLCD_MODE | CAML_LCD_MODE, 4288c2ecf20Sopenharmony_ci .muxregs = dac_muxreg, 4298c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(dac_muxreg), 4308c2ecf20Sopenharmony_ci }, 4318c2ecf20Sopenharmony_ci}; 4328c2ecf20Sopenharmony_ci 4338c2ecf20Sopenharmony_cistatic struct spear_pingroup dac_pingroup = { 4348c2ecf20Sopenharmony_ci .name = "dac_grp", 4358c2ecf20Sopenharmony_ci .pins = dac_pins, 4368c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(dac_pins), 4378c2ecf20Sopenharmony_ci .modemuxs = dac_modemux, 4388c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(dac_modemux), 4398c2ecf20Sopenharmony_ci}; 4408c2ecf20Sopenharmony_ci 4418c2ecf20Sopenharmony_cistatic const char *const dac_grps[] = { "dac_grp" }; 4428c2ecf20Sopenharmony_cistatic struct spear_function dac_function = { 4438c2ecf20Sopenharmony_ci .name = "dac", 4448c2ecf20Sopenharmony_ci .groups = dac_grps, 4458c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(dac_grps), 4468c2ecf20Sopenharmony_ci}; 4478c2ecf20Sopenharmony_ci 4488c2ecf20Sopenharmony_ci/* i2s_pins */ 4498c2ecf20Sopenharmony_cistatic const unsigned i2s_pins[] = { 39, 40, 41, 42 }; 4508c2ecf20Sopenharmony_cistatic struct spear_muxreg i2s_muxreg[] = { 4518c2ecf20Sopenharmony_ci { 4528c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 4538c2ecf20Sopenharmony_ci .mask = PMX_UART0_MODEM_MASK, 4548c2ecf20Sopenharmony_ci .val = 0, 4558c2ecf20Sopenharmony_ci }, 4568c2ecf20Sopenharmony_ci}; 4578c2ecf20Sopenharmony_ci 4588c2ecf20Sopenharmony_cistatic struct spear_modemux i2s_modemux[] = { 4598c2ecf20Sopenharmony_ci { 4608c2ecf20Sopenharmony_ci .modes = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE 4618c2ecf20Sopenharmony_ci | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE | 4628c2ecf20Sopenharmony_ci ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE 4638c2ecf20Sopenharmony_ci | CAMU_WLCD_MODE | CAML_LCD_MODE, 4648c2ecf20Sopenharmony_ci .muxregs = i2s_muxreg, 4658c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(i2s_muxreg), 4668c2ecf20Sopenharmony_ci }, 4678c2ecf20Sopenharmony_ci}; 4688c2ecf20Sopenharmony_ci 4698c2ecf20Sopenharmony_cistatic struct spear_pingroup i2s_pingroup = { 4708c2ecf20Sopenharmony_ci .name = "i2s_grp", 4718c2ecf20Sopenharmony_ci .pins = i2s_pins, 4728c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(i2s_pins), 4738c2ecf20Sopenharmony_ci .modemuxs = i2s_modemux, 4748c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(i2s_modemux), 4758c2ecf20Sopenharmony_ci}; 4768c2ecf20Sopenharmony_ci 4778c2ecf20Sopenharmony_cistatic const char *const i2s_grps[] = { "i2s_grp" }; 4788c2ecf20Sopenharmony_cistatic struct spear_function i2s_function = { 4798c2ecf20Sopenharmony_ci .name = "i2s", 4808c2ecf20Sopenharmony_ci .groups = i2s_grps, 4818c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(i2s_grps), 4828c2ecf20Sopenharmony_ci}; 4838c2ecf20Sopenharmony_ci 4848c2ecf20Sopenharmony_ci/* sdhci_4bit_pins */ 4858c2ecf20Sopenharmony_cistatic const unsigned sdhci_4bit_pins[] = { 28, 29, 30, 31, 32, 33 }; 4868c2ecf20Sopenharmony_cistatic struct spear_muxreg sdhci_4bit_muxreg[] = { 4878c2ecf20Sopenharmony_ci { 4888c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 4898c2ecf20Sopenharmony_ci .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK | 4908c2ecf20Sopenharmony_ci PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | 4918c2ecf20Sopenharmony_ci PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK, 4928c2ecf20Sopenharmony_ci .val = 0, 4938c2ecf20Sopenharmony_ci }, 4948c2ecf20Sopenharmony_ci}; 4958c2ecf20Sopenharmony_ci 4968c2ecf20Sopenharmony_cistatic struct spear_modemux sdhci_4bit_modemux[] = { 4978c2ecf20Sopenharmony_ci { 4988c2ecf20Sopenharmony_ci .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | 4998c2ecf20Sopenharmony_ci HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | 5008c2ecf20Sopenharmony_ci HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE | 5018c2ecf20Sopenharmony_ci CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE, 5028c2ecf20Sopenharmony_ci .muxregs = sdhci_4bit_muxreg, 5038c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(sdhci_4bit_muxreg), 5048c2ecf20Sopenharmony_ci }, 5058c2ecf20Sopenharmony_ci}; 5068c2ecf20Sopenharmony_ci 5078c2ecf20Sopenharmony_cistatic struct spear_pingroup sdhci_4bit_pingroup = { 5088c2ecf20Sopenharmony_ci .name = "sdhci_4bit_grp", 5098c2ecf20Sopenharmony_ci .pins = sdhci_4bit_pins, 5108c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(sdhci_4bit_pins), 5118c2ecf20Sopenharmony_ci .modemuxs = sdhci_4bit_modemux, 5128c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(sdhci_4bit_modemux), 5138c2ecf20Sopenharmony_ci}; 5148c2ecf20Sopenharmony_ci 5158c2ecf20Sopenharmony_ci/* sdhci_8bit_pins */ 5168c2ecf20Sopenharmony_cistatic const unsigned sdhci_8bit_pins[] = { 24, 25, 26, 27, 28, 29, 30, 31, 32, 5178c2ecf20Sopenharmony_ci 33 }; 5188c2ecf20Sopenharmony_cistatic struct spear_muxreg sdhci_8bit_muxreg[] = { 5198c2ecf20Sopenharmony_ci { 5208c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 5218c2ecf20Sopenharmony_ci .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK | 5228c2ecf20Sopenharmony_ci PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | 5238c2ecf20Sopenharmony_ci PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK, 5248c2ecf20Sopenharmony_ci .val = 0, 5258c2ecf20Sopenharmony_ci }, 5268c2ecf20Sopenharmony_ci}; 5278c2ecf20Sopenharmony_ci 5288c2ecf20Sopenharmony_cistatic struct spear_modemux sdhci_8bit_modemux[] = { 5298c2ecf20Sopenharmony_ci { 5308c2ecf20Sopenharmony_ci .modes = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | 5318c2ecf20Sopenharmony_ci HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | 5328c2ecf20Sopenharmony_ci HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE | 5338c2ecf20Sopenharmony_ci CAMU_WLCD_MODE | CAML_LCD_MODE, 5348c2ecf20Sopenharmony_ci .muxregs = sdhci_8bit_muxreg, 5358c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(sdhci_8bit_muxreg), 5368c2ecf20Sopenharmony_ci }, 5378c2ecf20Sopenharmony_ci}; 5388c2ecf20Sopenharmony_ci 5398c2ecf20Sopenharmony_cistatic struct spear_pingroup sdhci_8bit_pingroup = { 5408c2ecf20Sopenharmony_ci .name = "sdhci_8bit_grp", 5418c2ecf20Sopenharmony_ci .pins = sdhci_8bit_pins, 5428c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(sdhci_8bit_pins), 5438c2ecf20Sopenharmony_ci .modemuxs = sdhci_8bit_modemux, 5448c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(sdhci_8bit_modemux), 5458c2ecf20Sopenharmony_ci}; 5468c2ecf20Sopenharmony_ci 5478c2ecf20Sopenharmony_cistatic const char *const sdhci_grps[] = { "sdhci_4bit_grp", "sdhci_8bit_grp" }; 5488c2ecf20Sopenharmony_cistatic struct spear_function sdhci_function = { 5498c2ecf20Sopenharmony_ci .name = "sdhci", 5508c2ecf20Sopenharmony_ci .groups = sdhci_grps, 5518c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(sdhci_grps), 5528c2ecf20Sopenharmony_ci}; 5538c2ecf20Sopenharmony_ci 5548c2ecf20Sopenharmony_ci/* gpio1_0_to_3_pins */ 5558c2ecf20Sopenharmony_cistatic const unsigned gpio1_0_to_3_pins[] = { 39, 40, 41, 42 }; 5568c2ecf20Sopenharmony_cistatic struct spear_muxreg gpio1_0_to_3_muxreg[] = { 5578c2ecf20Sopenharmony_ci { 5588c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 5598c2ecf20Sopenharmony_ci .mask = PMX_UART0_MODEM_MASK, 5608c2ecf20Sopenharmony_ci .val = 0, 5618c2ecf20Sopenharmony_ci }, 5628c2ecf20Sopenharmony_ci}; 5638c2ecf20Sopenharmony_ci 5648c2ecf20Sopenharmony_cistatic struct spear_modemux gpio1_0_to_3_modemux[] = { 5658c2ecf20Sopenharmony_ci { 5668c2ecf20Sopenharmony_ci .modes = PHOTO_FRAME_MODE, 5678c2ecf20Sopenharmony_ci .muxregs = gpio1_0_to_3_muxreg, 5688c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(gpio1_0_to_3_muxreg), 5698c2ecf20Sopenharmony_ci }, 5708c2ecf20Sopenharmony_ci}; 5718c2ecf20Sopenharmony_ci 5728c2ecf20Sopenharmony_cistatic struct spear_pingroup gpio1_0_to_3_pingroup = { 5738c2ecf20Sopenharmony_ci .name = "gpio1_0_to_3_grp", 5748c2ecf20Sopenharmony_ci .pins = gpio1_0_to_3_pins, 5758c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(gpio1_0_to_3_pins), 5768c2ecf20Sopenharmony_ci .modemuxs = gpio1_0_to_3_modemux, 5778c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(gpio1_0_to_3_modemux), 5788c2ecf20Sopenharmony_ci}; 5798c2ecf20Sopenharmony_ci 5808c2ecf20Sopenharmony_ci/* gpio1_4_to_7_pins */ 5818c2ecf20Sopenharmony_cistatic const unsigned gpio1_4_to_7_pins[] = { 43, 44, 45, 46 }; 5828c2ecf20Sopenharmony_ci 5838c2ecf20Sopenharmony_cistatic struct spear_muxreg gpio1_4_to_7_muxreg[] = { 5848c2ecf20Sopenharmony_ci { 5858c2ecf20Sopenharmony_ci .reg = PMX_CONFIG_REG, 5868c2ecf20Sopenharmony_ci .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK, 5878c2ecf20Sopenharmony_ci .val = 0, 5888c2ecf20Sopenharmony_ci }, 5898c2ecf20Sopenharmony_ci}; 5908c2ecf20Sopenharmony_ci 5918c2ecf20Sopenharmony_cistatic struct spear_modemux gpio1_4_to_7_modemux[] = { 5928c2ecf20Sopenharmony_ci { 5938c2ecf20Sopenharmony_ci .modes = PHOTO_FRAME_MODE, 5948c2ecf20Sopenharmony_ci .muxregs = gpio1_4_to_7_muxreg, 5958c2ecf20Sopenharmony_ci .nmuxregs = ARRAY_SIZE(gpio1_4_to_7_muxreg), 5968c2ecf20Sopenharmony_ci }, 5978c2ecf20Sopenharmony_ci}; 5988c2ecf20Sopenharmony_ci 5998c2ecf20Sopenharmony_cistatic struct spear_pingroup gpio1_4_to_7_pingroup = { 6008c2ecf20Sopenharmony_ci .name = "gpio1_4_to_7_grp", 6018c2ecf20Sopenharmony_ci .pins = gpio1_4_to_7_pins, 6028c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(gpio1_4_to_7_pins), 6038c2ecf20Sopenharmony_ci .modemuxs = gpio1_4_to_7_modemux, 6048c2ecf20Sopenharmony_ci .nmodemuxs = ARRAY_SIZE(gpio1_4_to_7_modemux), 6058c2ecf20Sopenharmony_ci}; 6068c2ecf20Sopenharmony_ci 6078c2ecf20Sopenharmony_cistatic const char *const gpio1_grps[] = { "gpio1_0_to_3_grp", "gpio1_4_to_7_grp" 6088c2ecf20Sopenharmony_ci}; 6098c2ecf20Sopenharmony_cistatic struct spear_function gpio1_function = { 6108c2ecf20Sopenharmony_ci .name = "gpio1", 6118c2ecf20Sopenharmony_ci .groups = gpio1_grps, 6128c2ecf20Sopenharmony_ci .ngroups = ARRAY_SIZE(gpio1_grps), 6138c2ecf20Sopenharmony_ci}; 6148c2ecf20Sopenharmony_ci 6158c2ecf20Sopenharmony_ci/* pingroups */ 6168c2ecf20Sopenharmony_cistatic struct spear_pingroup *spear300_pingroups[] = { 6178c2ecf20Sopenharmony_ci SPEAR3XX_COMMON_PINGROUPS, 6188c2ecf20Sopenharmony_ci &fsmc_2chips_pingroup, 6198c2ecf20Sopenharmony_ci &fsmc_4chips_pingroup, 6208c2ecf20Sopenharmony_ci &clcd_lcdmode_pingroup, 6218c2ecf20Sopenharmony_ci &clcd_pfmode_pingroup, 6228c2ecf20Sopenharmony_ci &tdm_pingroup, 6238c2ecf20Sopenharmony_ci &i2c_clk_pingroup, 6248c2ecf20Sopenharmony_ci &caml_pingroup, 6258c2ecf20Sopenharmony_ci &camu_pingroup, 6268c2ecf20Sopenharmony_ci &dac_pingroup, 6278c2ecf20Sopenharmony_ci &i2s_pingroup, 6288c2ecf20Sopenharmony_ci &sdhci_4bit_pingroup, 6298c2ecf20Sopenharmony_ci &sdhci_8bit_pingroup, 6308c2ecf20Sopenharmony_ci &gpio1_0_to_3_pingroup, 6318c2ecf20Sopenharmony_ci &gpio1_4_to_7_pingroup, 6328c2ecf20Sopenharmony_ci}; 6338c2ecf20Sopenharmony_ci 6348c2ecf20Sopenharmony_ci/* functions */ 6358c2ecf20Sopenharmony_cistatic struct spear_function *spear300_functions[] = { 6368c2ecf20Sopenharmony_ci SPEAR3XX_COMMON_FUNCTIONS, 6378c2ecf20Sopenharmony_ci &fsmc_function, 6388c2ecf20Sopenharmony_ci &clcd_function, 6398c2ecf20Sopenharmony_ci &tdm_function, 6408c2ecf20Sopenharmony_ci &i2c_function, 6418c2ecf20Sopenharmony_ci &cam_function, 6428c2ecf20Sopenharmony_ci &dac_function, 6438c2ecf20Sopenharmony_ci &i2s_function, 6448c2ecf20Sopenharmony_ci &sdhci_function, 6458c2ecf20Sopenharmony_ci &gpio1_function, 6468c2ecf20Sopenharmony_ci}; 6478c2ecf20Sopenharmony_ci 6488c2ecf20Sopenharmony_cistatic const struct of_device_id spear300_pinctrl_of_match[] = { 6498c2ecf20Sopenharmony_ci { 6508c2ecf20Sopenharmony_ci .compatible = "st,spear300-pinmux", 6518c2ecf20Sopenharmony_ci }, 6528c2ecf20Sopenharmony_ci {}, 6538c2ecf20Sopenharmony_ci}; 6548c2ecf20Sopenharmony_ci 6558c2ecf20Sopenharmony_cistatic int spear300_pinctrl_probe(struct platform_device *pdev) 6568c2ecf20Sopenharmony_ci{ 6578c2ecf20Sopenharmony_ci int ret; 6588c2ecf20Sopenharmony_ci 6598c2ecf20Sopenharmony_ci spear3xx_machdata.groups = spear300_pingroups; 6608c2ecf20Sopenharmony_ci spear3xx_machdata.ngroups = ARRAY_SIZE(spear300_pingroups); 6618c2ecf20Sopenharmony_ci spear3xx_machdata.functions = spear300_functions; 6628c2ecf20Sopenharmony_ci spear3xx_machdata.nfunctions = ARRAY_SIZE(spear300_functions); 6638c2ecf20Sopenharmony_ci spear3xx_machdata.gpio_pingroups = NULL; 6648c2ecf20Sopenharmony_ci spear3xx_machdata.ngpio_pingroups = 0; 6658c2ecf20Sopenharmony_ci 6668c2ecf20Sopenharmony_ci spear3xx_machdata.modes_supported = true; 6678c2ecf20Sopenharmony_ci spear3xx_machdata.pmx_modes = spear300_pmx_modes; 6688c2ecf20Sopenharmony_ci spear3xx_machdata.npmx_modes = ARRAY_SIZE(spear300_pmx_modes); 6698c2ecf20Sopenharmony_ci 6708c2ecf20Sopenharmony_ci pmx_init_addr(&spear3xx_machdata, PMX_CONFIG_REG); 6718c2ecf20Sopenharmony_ci 6728c2ecf20Sopenharmony_ci ret = spear_pinctrl_probe(pdev, &spear3xx_machdata); 6738c2ecf20Sopenharmony_ci if (ret) 6748c2ecf20Sopenharmony_ci return ret; 6758c2ecf20Sopenharmony_ci 6768c2ecf20Sopenharmony_ci return 0; 6778c2ecf20Sopenharmony_ci} 6788c2ecf20Sopenharmony_ci 6798c2ecf20Sopenharmony_cistatic struct platform_driver spear300_pinctrl_driver = { 6808c2ecf20Sopenharmony_ci .driver = { 6818c2ecf20Sopenharmony_ci .name = DRIVER_NAME, 6828c2ecf20Sopenharmony_ci .of_match_table = spear300_pinctrl_of_match, 6838c2ecf20Sopenharmony_ci }, 6848c2ecf20Sopenharmony_ci .probe = spear300_pinctrl_probe, 6858c2ecf20Sopenharmony_ci}; 6868c2ecf20Sopenharmony_ci 6878c2ecf20Sopenharmony_cistatic int __init spear300_pinctrl_init(void) 6888c2ecf20Sopenharmony_ci{ 6898c2ecf20Sopenharmony_ci return platform_driver_register(&spear300_pinctrl_driver); 6908c2ecf20Sopenharmony_ci} 6918c2ecf20Sopenharmony_ciarch_initcall(spear300_pinctrl_init); 692