1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2020, The Linux Foundation. All rights reserved. 4 */ 5 6#include <linux/module.h> 7#include <linux/of.h> 8#include <linux/platform_device.h> 9#include <linux/pinctrl/pinctrl.h> 10 11#include "pinctrl-msm.h" 12 13static const struct pinctrl_pin_desc msm8226_pins[] = { 14 PINCTRL_PIN(0, "GPIO_0"), 15 PINCTRL_PIN(1, "GPIO_1"), 16 PINCTRL_PIN(2, "GPIO_2"), 17 PINCTRL_PIN(3, "GPIO_3"), 18 PINCTRL_PIN(4, "GPIO_4"), 19 PINCTRL_PIN(5, "GPIO_5"), 20 PINCTRL_PIN(6, "GPIO_6"), 21 PINCTRL_PIN(7, "GPIO_7"), 22 PINCTRL_PIN(8, "GPIO_8"), 23 PINCTRL_PIN(9, "GPIO_9"), 24 PINCTRL_PIN(10, "GPIO_10"), 25 PINCTRL_PIN(11, "GPIO_11"), 26 PINCTRL_PIN(12, "GPIO_12"), 27 PINCTRL_PIN(13, "GPIO_13"), 28 PINCTRL_PIN(14, "GPIO_14"), 29 PINCTRL_PIN(15, "GPIO_15"), 30 PINCTRL_PIN(16, "GPIO_16"), 31 PINCTRL_PIN(17, "GPIO_17"), 32 PINCTRL_PIN(18, "GPIO_18"), 33 PINCTRL_PIN(19, "GPIO_19"), 34 PINCTRL_PIN(20, "GPIO_20"), 35 PINCTRL_PIN(21, "GPIO_21"), 36 PINCTRL_PIN(22, "GPIO_22"), 37 PINCTRL_PIN(23, "GPIO_23"), 38 PINCTRL_PIN(24, "GPIO_24"), 39 PINCTRL_PIN(25, "GPIO_25"), 40 PINCTRL_PIN(26, "GPIO_26"), 41 PINCTRL_PIN(27, "GPIO_27"), 42 PINCTRL_PIN(28, "GPIO_28"), 43 PINCTRL_PIN(29, "GPIO_29"), 44 PINCTRL_PIN(30, "GPIO_30"), 45 PINCTRL_PIN(31, "GPIO_31"), 46 PINCTRL_PIN(32, "GPIO_32"), 47 PINCTRL_PIN(33, "GPIO_33"), 48 PINCTRL_PIN(34, "GPIO_34"), 49 PINCTRL_PIN(35, "GPIO_35"), 50 PINCTRL_PIN(36, "GPIO_36"), 51 PINCTRL_PIN(37, "GPIO_37"), 52 PINCTRL_PIN(38, "GPIO_38"), 53 PINCTRL_PIN(39, "GPIO_39"), 54 PINCTRL_PIN(40, "GPIO_40"), 55 PINCTRL_PIN(41, "GPIO_41"), 56 PINCTRL_PIN(42, "GPIO_42"), 57 PINCTRL_PIN(43, "GPIO_43"), 58 PINCTRL_PIN(44, "GPIO_44"), 59 PINCTRL_PIN(45, "GPIO_45"), 60 PINCTRL_PIN(46, "GPIO_46"), 61 PINCTRL_PIN(47, "GPIO_47"), 62 PINCTRL_PIN(48, "GPIO_48"), 63 PINCTRL_PIN(49, "GPIO_49"), 64 PINCTRL_PIN(50, "GPIO_50"), 65 PINCTRL_PIN(51, "GPIO_51"), 66 PINCTRL_PIN(52, "GPIO_52"), 67 PINCTRL_PIN(53, "GPIO_53"), 68 PINCTRL_PIN(54, "GPIO_54"), 69 PINCTRL_PIN(55, "GPIO_55"), 70 PINCTRL_PIN(56, "GPIO_56"), 71 PINCTRL_PIN(57, "GPIO_57"), 72 PINCTRL_PIN(58, "GPIO_58"), 73 PINCTRL_PIN(59, "GPIO_59"), 74 PINCTRL_PIN(60, "GPIO_60"), 75 PINCTRL_PIN(61, "GPIO_61"), 76 PINCTRL_PIN(62, "GPIO_62"), 77 PINCTRL_PIN(63, "GPIO_63"), 78 PINCTRL_PIN(64, "GPIO_64"), 79 PINCTRL_PIN(65, "GPIO_65"), 80 PINCTRL_PIN(66, "GPIO_66"), 81 PINCTRL_PIN(67, "GPIO_67"), 82 PINCTRL_PIN(68, "GPIO_68"), 83 PINCTRL_PIN(69, "GPIO_69"), 84 PINCTRL_PIN(70, "GPIO_70"), 85 PINCTRL_PIN(71, "GPIO_71"), 86 PINCTRL_PIN(72, "GPIO_72"), 87 PINCTRL_PIN(73, "GPIO_73"), 88 PINCTRL_PIN(74, "GPIO_74"), 89 PINCTRL_PIN(75, "GPIO_75"), 90 PINCTRL_PIN(76, "GPIO_76"), 91 PINCTRL_PIN(77, "GPIO_77"), 92 PINCTRL_PIN(78, "GPIO_78"), 93 PINCTRL_PIN(79, "GPIO_79"), 94 PINCTRL_PIN(80, "GPIO_80"), 95 PINCTRL_PIN(81, "GPIO_81"), 96 PINCTRL_PIN(82, "GPIO_82"), 97 PINCTRL_PIN(83, "GPIO_83"), 98 PINCTRL_PIN(84, "GPIO_84"), 99 PINCTRL_PIN(85, "GPIO_85"), 100 PINCTRL_PIN(86, "GPIO_86"), 101 PINCTRL_PIN(87, "GPIO_87"), 102 PINCTRL_PIN(88, "GPIO_88"), 103 PINCTRL_PIN(89, "GPIO_89"), 104 PINCTRL_PIN(90, "GPIO_90"), 105 PINCTRL_PIN(91, "GPIO_91"), 106 PINCTRL_PIN(92, "GPIO_92"), 107 PINCTRL_PIN(93, "GPIO_93"), 108 PINCTRL_PIN(94, "GPIO_94"), 109 PINCTRL_PIN(95, "GPIO_95"), 110 PINCTRL_PIN(96, "GPIO_96"), 111 PINCTRL_PIN(97, "GPIO_97"), 112 PINCTRL_PIN(98, "GPIO_98"), 113 PINCTRL_PIN(99, "GPIO_99"), 114 PINCTRL_PIN(100, "GPIO_100"), 115 PINCTRL_PIN(101, "GPIO_101"), 116 PINCTRL_PIN(102, "GPIO_102"), 117 PINCTRL_PIN(103, "GPIO_103"), 118 PINCTRL_PIN(104, "GPIO_104"), 119 PINCTRL_PIN(105, "GPIO_105"), 120 PINCTRL_PIN(106, "GPIO_106"), 121 PINCTRL_PIN(107, "GPIO_107"), 122 PINCTRL_PIN(108, "GPIO_108"), 123 PINCTRL_PIN(109, "GPIO_109"), 124 PINCTRL_PIN(110, "GPIO_110"), 125 PINCTRL_PIN(111, "GPIO_111"), 126 PINCTRL_PIN(112, "GPIO_112"), 127 PINCTRL_PIN(113, "GPIO_113"), 128 PINCTRL_PIN(114, "GPIO_114"), 129 PINCTRL_PIN(115, "GPIO_115"), 130 PINCTRL_PIN(116, "GPIO_116"), 131 132 PINCTRL_PIN(117, "SDC1_CLK"), 133 PINCTRL_PIN(118, "SDC1_CMD"), 134 PINCTRL_PIN(119, "SDC1_DATA"), 135 PINCTRL_PIN(120, "SDC2_CLK"), 136 PINCTRL_PIN(121, "SDC2_CMD"), 137 PINCTRL_PIN(122, "SDC2_DATA"), 138}; 139 140#define DECLARE_MSM_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin } 141DECLARE_MSM_GPIO_PINS(0); 142DECLARE_MSM_GPIO_PINS(1); 143DECLARE_MSM_GPIO_PINS(2); 144DECLARE_MSM_GPIO_PINS(3); 145DECLARE_MSM_GPIO_PINS(4); 146DECLARE_MSM_GPIO_PINS(5); 147DECLARE_MSM_GPIO_PINS(6); 148DECLARE_MSM_GPIO_PINS(7); 149DECLARE_MSM_GPIO_PINS(8); 150DECLARE_MSM_GPIO_PINS(9); 151DECLARE_MSM_GPIO_PINS(10); 152DECLARE_MSM_GPIO_PINS(11); 153DECLARE_MSM_GPIO_PINS(12); 154DECLARE_MSM_GPIO_PINS(13); 155DECLARE_MSM_GPIO_PINS(14); 156DECLARE_MSM_GPIO_PINS(15); 157DECLARE_MSM_GPIO_PINS(16); 158DECLARE_MSM_GPIO_PINS(17); 159DECLARE_MSM_GPIO_PINS(18); 160DECLARE_MSM_GPIO_PINS(19); 161DECLARE_MSM_GPIO_PINS(20); 162DECLARE_MSM_GPIO_PINS(21); 163DECLARE_MSM_GPIO_PINS(22); 164DECLARE_MSM_GPIO_PINS(23); 165DECLARE_MSM_GPIO_PINS(24); 166DECLARE_MSM_GPIO_PINS(25); 167DECLARE_MSM_GPIO_PINS(26); 168DECLARE_MSM_GPIO_PINS(27); 169DECLARE_MSM_GPIO_PINS(28); 170DECLARE_MSM_GPIO_PINS(29); 171DECLARE_MSM_GPIO_PINS(30); 172DECLARE_MSM_GPIO_PINS(31); 173DECLARE_MSM_GPIO_PINS(32); 174DECLARE_MSM_GPIO_PINS(33); 175DECLARE_MSM_GPIO_PINS(34); 176DECLARE_MSM_GPIO_PINS(35); 177DECLARE_MSM_GPIO_PINS(36); 178DECLARE_MSM_GPIO_PINS(37); 179DECLARE_MSM_GPIO_PINS(38); 180DECLARE_MSM_GPIO_PINS(39); 181DECLARE_MSM_GPIO_PINS(40); 182DECLARE_MSM_GPIO_PINS(41); 183DECLARE_MSM_GPIO_PINS(42); 184DECLARE_MSM_GPIO_PINS(43); 185DECLARE_MSM_GPIO_PINS(44); 186DECLARE_MSM_GPIO_PINS(45); 187DECLARE_MSM_GPIO_PINS(46); 188DECLARE_MSM_GPIO_PINS(47); 189DECLARE_MSM_GPIO_PINS(48); 190DECLARE_MSM_GPIO_PINS(49); 191DECLARE_MSM_GPIO_PINS(50); 192DECLARE_MSM_GPIO_PINS(51); 193DECLARE_MSM_GPIO_PINS(52); 194DECLARE_MSM_GPIO_PINS(53); 195DECLARE_MSM_GPIO_PINS(54); 196DECLARE_MSM_GPIO_PINS(55); 197DECLARE_MSM_GPIO_PINS(56); 198DECLARE_MSM_GPIO_PINS(57); 199DECLARE_MSM_GPIO_PINS(58); 200DECLARE_MSM_GPIO_PINS(59); 201DECLARE_MSM_GPIO_PINS(60); 202DECLARE_MSM_GPIO_PINS(61); 203DECLARE_MSM_GPIO_PINS(62); 204DECLARE_MSM_GPIO_PINS(63); 205DECLARE_MSM_GPIO_PINS(64); 206DECLARE_MSM_GPIO_PINS(65); 207DECLARE_MSM_GPIO_PINS(66); 208DECLARE_MSM_GPIO_PINS(67); 209DECLARE_MSM_GPIO_PINS(68); 210DECLARE_MSM_GPIO_PINS(69); 211DECLARE_MSM_GPIO_PINS(70); 212DECLARE_MSM_GPIO_PINS(71); 213DECLARE_MSM_GPIO_PINS(72); 214DECLARE_MSM_GPIO_PINS(73); 215DECLARE_MSM_GPIO_PINS(74); 216DECLARE_MSM_GPIO_PINS(75); 217DECLARE_MSM_GPIO_PINS(76); 218DECLARE_MSM_GPIO_PINS(77); 219DECLARE_MSM_GPIO_PINS(78); 220DECLARE_MSM_GPIO_PINS(79); 221DECLARE_MSM_GPIO_PINS(80); 222DECLARE_MSM_GPIO_PINS(81); 223DECLARE_MSM_GPIO_PINS(82); 224DECLARE_MSM_GPIO_PINS(83); 225DECLARE_MSM_GPIO_PINS(84); 226DECLARE_MSM_GPIO_PINS(85); 227DECLARE_MSM_GPIO_PINS(86); 228DECLARE_MSM_GPIO_PINS(87); 229DECLARE_MSM_GPIO_PINS(88); 230DECLARE_MSM_GPIO_PINS(89); 231DECLARE_MSM_GPIO_PINS(90); 232DECLARE_MSM_GPIO_PINS(91); 233DECLARE_MSM_GPIO_PINS(92); 234DECLARE_MSM_GPIO_PINS(93); 235DECLARE_MSM_GPIO_PINS(94); 236DECLARE_MSM_GPIO_PINS(95); 237DECLARE_MSM_GPIO_PINS(96); 238DECLARE_MSM_GPIO_PINS(97); 239DECLARE_MSM_GPIO_PINS(98); 240DECLARE_MSM_GPIO_PINS(99); 241DECLARE_MSM_GPIO_PINS(100); 242DECLARE_MSM_GPIO_PINS(101); 243DECLARE_MSM_GPIO_PINS(102); 244DECLARE_MSM_GPIO_PINS(103); 245DECLARE_MSM_GPIO_PINS(104); 246DECLARE_MSM_GPIO_PINS(105); 247DECLARE_MSM_GPIO_PINS(106); 248DECLARE_MSM_GPIO_PINS(107); 249DECLARE_MSM_GPIO_PINS(108); 250DECLARE_MSM_GPIO_PINS(109); 251DECLARE_MSM_GPIO_PINS(110); 252DECLARE_MSM_GPIO_PINS(111); 253DECLARE_MSM_GPIO_PINS(112); 254DECLARE_MSM_GPIO_PINS(113); 255DECLARE_MSM_GPIO_PINS(114); 256DECLARE_MSM_GPIO_PINS(115); 257DECLARE_MSM_GPIO_PINS(116); 258 259static const unsigned int sdc1_clk_pins[] = { 117 }; 260static const unsigned int sdc1_cmd_pins[] = { 118 }; 261static const unsigned int sdc1_data_pins[] = { 119 }; 262static const unsigned int sdc2_clk_pins[] = { 120 }; 263static const unsigned int sdc2_cmd_pins[] = { 121 }; 264static const unsigned int sdc2_data_pins[] = { 122 }; 265 266#define FUNCTION(fname) \ 267 [MSM_MUX_##fname] = { \ 268 .name = #fname, \ 269 .groups = fname##_groups, \ 270 .ngroups = ARRAY_SIZE(fname##_groups), \ 271 } 272 273#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7) \ 274 { \ 275 .name = "gpio" #id, \ 276 .pins = gpio##id##_pins, \ 277 .npins = ARRAY_SIZE(gpio##id##_pins), \ 278 .funcs = (int[]){ \ 279 MSM_MUX_gpio, \ 280 MSM_MUX_##f1, \ 281 MSM_MUX_##f2, \ 282 MSM_MUX_##f3, \ 283 MSM_MUX_##f4, \ 284 MSM_MUX_##f5, \ 285 MSM_MUX_##f6, \ 286 MSM_MUX_##f7 \ 287 }, \ 288 .nfuncs = 8, \ 289 .ctl_reg = 0x1000 + 0x10 * id, \ 290 .io_reg = 0x1004 + 0x10 * id, \ 291 .intr_cfg_reg = 0x1008 + 0x10 * id, \ 292 .intr_status_reg = 0x100c + 0x10 * id, \ 293 .intr_target_reg = 0x1008 + 0x10 * id, \ 294 .mux_bit = 2, \ 295 .pull_bit = 0, \ 296 .drv_bit = 6, \ 297 .oe_bit = 9, \ 298 .in_bit = 0, \ 299 .out_bit = 1, \ 300 .intr_enable_bit = 0, \ 301 .intr_status_bit = 0, \ 302 .intr_target_bit = 5, \ 303 .intr_target_kpss_val = 4, \ 304 .intr_raw_status_bit = 4, \ 305 .intr_polarity_bit = 1, \ 306 .intr_detection_bit = 2, \ 307 .intr_detection_width = 2, \ 308 } 309 310#define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 311 { \ 312 .name = #pg_name, \ 313 .pins = pg_name##_pins, \ 314 .npins = ARRAY_SIZE(pg_name##_pins), \ 315 .ctl_reg = ctl, \ 316 .io_reg = 0, \ 317 .intr_cfg_reg = 0, \ 318 .intr_status_reg = 0, \ 319 .intr_target_reg = 0, \ 320 .mux_bit = -1, \ 321 .pull_bit = pull, \ 322 .drv_bit = drv, \ 323 .oe_bit = -1, \ 324 .in_bit = -1, \ 325 .out_bit = -1, \ 326 .intr_enable_bit = -1, \ 327 .intr_status_bit = -1, \ 328 .intr_target_bit = -1, \ 329 .intr_target_kpss_val = -1, \ 330 .intr_raw_status_bit = -1, \ 331 .intr_polarity_bit = -1, \ 332 .intr_detection_bit = -1, \ 333 .intr_detection_width = -1, \ 334 } 335 336/* 337 * TODO: Add the rest of the possible functions and fill out 338 * the pingroup table below. 339 */ 340enum msm8226_functions { 341 MSM_MUX_gpio, 342 MSM_MUX_cci_i2c0, 343 MSM_MUX_blsp_i2c1, 344 MSM_MUX_blsp_i2c2, 345 MSM_MUX_blsp_i2c3, 346 MSM_MUX_blsp_i2c5, 347 MSM_MUX_blsp_spi1, 348 MSM_MUX_blsp_spi2, 349 MSM_MUX_blsp_spi3, 350 MSM_MUX_blsp_spi5, 351 MSM_MUX_blsp_uart1, 352 MSM_MUX_blsp_uart2, 353 MSM_MUX_blsp_uart3, 354 MSM_MUX_blsp_uart5, 355 MSM_MUX_blsp_uim1, 356 MSM_MUX_blsp_uim2, 357 MSM_MUX_blsp_uim3, 358 MSM_MUX_blsp_uim5, 359 MSM_MUX_cam_mclk0, 360 MSM_MUX_cam_mclk1, 361 MSM_MUX_wlan, 362 MSM_MUX_NA, 363}; 364 365static const char * const gpio_groups[] = { 366 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 367 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 368 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 369 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 370 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 371 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 372 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 373 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 374 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 375 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 376 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 377 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", 378 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", 379 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", 380 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", 381 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", 382 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116", 383}; 384 385static const char * const blsp_uart1_groups[] = { 386 "gpio0", "gpio1", "gpio2", "gpio3" 387}; 388 389static const char * const blsp_uim1_groups[] = { "gpio0", "gpio1" }; 390static const char * const blsp_i2c1_groups[] = { "gpio2", "gpio3" }; 391static const char * const blsp_spi1_groups[] = { 392 "gpio0", "gpio1", "gpio2", "gpio3" 393}; 394 395static const char * const blsp_uart2_groups[] = { 396 "gpio4", "gpio5", "gpio6", "gpio7" 397}; 398 399static const char * const blsp_uim2_groups[] = { "gpio4", "gpio5" }; 400static const char * const blsp_i2c2_groups[] = { "gpio6", "gpio7" }; 401static const char * const blsp_spi2_groups[] = { 402 "gpio4", "gpio5", "gpio6", "gpio7" 403}; 404 405static const char * const blsp_uart3_groups[] = { 406 "gpio8", "gpio9", "gpio10", "gpio11" 407}; 408 409static const char * const blsp_uim3_groups[] = { "gpio8", "gpio9" }; 410static const char * const blsp_i2c3_groups[] = { "gpio10", "gpio11" }; 411static const char * const blsp_spi3_groups[] = { 412 "gpio8", "gpio9", "gpio10", "gpio11" 413}; 414 415static const char * const blsp_uart5_groups[] = { 416 "gpio16", "gpio17", "gpio18", "gpio19" 417}; 418 419static const char * const blsp_uim5_groups[] = { "gpio16", "gpio17" }; 420static const char * const blsp_i2c5_groups[] = { "gpio18", "gpio19" }; 421static const char * const blsp_spi5_groups[] = { 422 "gpio16", "gpio17", "gpio18", "gpio19" 423}; 424 425static const char * const cci_i2c0_groups[] = { "gpio29", "gpio30" }; 426 427static const char * const cam_mclk0_groups[] = { "gpio26" }; 428static const char * const cam_mclk1_groups[] = { "gpio27" }; 429 430static const char * const wlan_groups[] = { 431 "gpio40", "gpio41", "gpio42", "gpio43", "gpio44" 432}; 433 434static const struct msm_function msm8226_functions[] = { 435 FUNCTION(gpio), 436 FUNCTION(cci_i2c0), 437 FUNCTION(blsp_uim1), 438 FUNCTION(blsp_uim2), 439 FUNCTION(blsp_uim3), 440 FUNCTION(blsp_uim5), 441 FUNCTION(blsp_i2c1), 442 FUNCTION(blsp_i2c2), 443 FUNCTION(blsp_i2c3), 444 FUNCTION(blsp_i2c5), 445 FUNCTION(blsp_spi1), 446 FUNCTION(blsp_spi2), 447 FUNCTION(blsp_spi3), 448 FUNCTION(blsp_spi5), 449 FUNCTION(blsp_uart1), 450 FUNCTION(blsp_uart2), 451 FUNCTION(blsp_uart3), 452 FUNCTION(blsp_uart5), 453 FUNCTION(cam_mclk0), 454 FUNCTION(cam_mclk1), 455 FUNCTION(wlan), 456}; 457 458static const struct msm_pingroup msm8226_groups[] = { 459 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), 460 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA), 461 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), 462 PINGROUP(3, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, NA, NA), 463 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), 464 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, NA, NA, NA, NA), 465 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), 466 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, NA, NA, NA, NA), 467 PINGROUP(8, blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA), 468 PINGROUP(9, blsp_spi3, blsp_uart3, blsp_uim3, NA, NA, NA, NA), 469 PINGROUP(10, blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA), 470 PINGROUP(11, blsp_spi3, blsp_uart3, blsp_i2c3, NA, NA, NA, NA), 471 PINGROUP(12, NA, NA, NA, NA, NA, NA, NA), 472 PINGROUP(13, NA, NA, NA, NA, NA, NA, NA), 473 PINGROUP(14, NA, NA, NA, NA, NA, NA, NA), 474 PINGROUP(15, NA, NA, NA, NA, NA, NA, NA), 475 PINGROUP(16, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA), 476 PINGROUP(17, blsp_spi5, blsp_uart5, blsp_uim5, NA, NA, NA, NA), 477 PINGROUP(18, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA), 478 PINGROUP(19, blsp_spi5, blsp_uart5, blsp_i2c5, NA, NA, NA, NA), 479 PINGROUP(20, NA, NA, NA, NA, NA, NA, NA), 480 PINGROUP(21, NA, NA, NA, NA, NA, NA, NA), 481 PINGROUP(22, NA, NA, NA, NA, NA, NA, NA), 482 PINGROUP(23, NA, NA, NA, NA, NA, NA, NA), 483 PINGROUP(24, NA, NA, NA, NA, NA, NA, NA), 484 PINGROUP(25, NA, NA, NA, NA, NA, NA, NA), 485 PINGROUP(26, cam_mclk0, NA, NA, NA, NA, NA, NA), 486 PINGROUP(27, cam_mclk1, NA, NA, NA, NA, NA, NA), 487 PINGROUP(28, NA, NA, NA, NA, NA, NA, NA), 488 PINGROUP(29, cci_i2c0, NA, NA, NA, NA, NA, NA), 489 PINGROUP(30, cci_i2c0, NA, NA, NA, NA, NA, NA), 490 PINGROUP(31, NA, NA, NA, NA, NA, NA, NA), 491 PINGROUP(32, NA, NA, NA, NA, NA, NA, NA), 492 PINGROUP(33, NA, NA, NA, NA, NA, NA, NA), 493 PINGROUP(34, NA, NA, NA, NA, NA, NA, NA), 494 PINGROUP(35, NA, NA, NA, NA, NA, NA, NA), 495 PINGROUP(36, NA, NA, NA, NA, NA, NA, NA), 496 PINGROUP(37, NA, NA, NA, NA, NA, NA, NA), 497 PINGROUP(38, NA, NA, NA, NA, NA, NA, NA), 498 PINGROUP(39, NA, NA, NA, NA, NA, NA, NA), 499 PINGROUP(40, wlan, NA, NA, NA, NA, NA, NA), 500 PINGROUP(41, wlan, NA, NA, NA, NA, NA, NA), 501 PINGROUP(42, wlan, NA, NA, NA, NA, NA, NA), 502 PINGROUP(43, wlan, NA, NA, NA, NA, NA, NA), 503 PINGROUP(44, wlan, NA, NA, NA, NA, NA, NA), 504 PINGROUP(45, NA, NA, NA, NA, NA, NA, NA), 505 PINGROUP(46, NA, NA, NA, NA, NA, NA, NA), 506 PINGROUP(47, NA, NA, NA, NA, NA, NA, NA), 507 PINGROUP(48, NA, NA, NA, NA, NA, NA, NA), 508 PINGROUP(49, NA, NA, NA, NA, NA, NA, NA), 509 PINGROUP(50, NA, NA, NA, NA, NA, NA, NA), 510 PINGROUP(51, NA, NA, NA, NA, NA, NA, NA), 511 PINGROUP(52, NA, NA, NA, NA, NA, NA, NA), 512 PINGROUP(53, NA, NA, NA, NA, NA, NA, NA), 513 PINGROUP(54, NA, NA, NA, NA, NA, NA, NA), 514 PINGROUP(55, NA, NA, NA, NA, NA, NA, NA), 515 PINGROUP(56, NA, NA, NA, NA, NA, NA, NA), 516 PINGROUP(57, NA, NA, NA, NA, NA, NA, NA), 517 PINGROUP(58, NA, NA, NA, NA, NA, NA, NA), 518 PINGROUP(59, NA, NA, NA, NA, NA, NA, NA), 519 PINGROUP(60, NA, NA, NA, NA, NA, NA, NA), 520 PINGROUP(61, NA, NA, NA, NA, NA, NA, NA), 521 PINGROUP(62, NA, NA, NA, NA, NA, NA, NA), 522 PINGROUP(63, NA, NA, NA, NA, NA, NA, NA), 523 PINGROUP(64, NA, NA, NA, NA, NA, NA, NA), 524 PINGROUP(65, NA, NA, NA, NA, NA, NA, NA), 525 PINGROUP(66, NA, NA, NA, NA, NA, NA, NA), 526 PINGROUP(67, NA, NA, NA, NA, NA, NA, NA), 527 PINGROUP(68, NA, NA, NA, NA, NA, NA, NA), 528 PINGROUP(69, NA, NA, NA, NA, NA, NA, NA), 529 PINGROUP(70, NA, NA, NA, NA, NA, NA, NA), 530 PINGROUP(71, NA, NA, NA, NA, NA, NA, NA), 531 PINGROUP(72, NA, NA, NA, NA, NA, NA, NA), 532 PINGROUP(73, NA, NA, NA, NA, NA, NA, NA), 533 PINGROUP(74, NA, NA, NA, NA, NA, NA, NA), 534 PINGROUP(75, NA, NA, NA, NA, NA, NA, NA), 535 PINGROUP(76, NA, NA, NA, NA, NA, NA, NA), 536 PINGROUP(77, NA, NA, NA, NA, NA, NA, NA), 537 PINGROUP(78, NA, NA, NA, NA, NA, NA, NA), 538 PINGROUP(79, NA, NA, NA, NA, NA, NA, NA), 539 PINGROUP(80, NA, NA, NA, NA, NA, NA, NA), 540 PINGROUP(81, NA, NA, NA, NA, NA, NA, NA), 541 PINGROUP(82, NA, NA, NA, NA, NA, NA, NA), 542 PINGROUP(83, NA, NA, NA, NA, NA, NA, NA), 543 PINGROUP(84, NA, NA, NA, NA, NA, NA, NA), 544 PINGROUP(85, NA, NA, NA, NA, NA, NA, NA), 545 PINGROUP(86, NA, NA, NA, NA, NA, NA, NA), 546 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA), 547 PINGROUP(88, NA, NA, NA, NA, NA, NA, NA), 548 PINGROUP(89, NA, NA, NA, NA, NA, NA, NA), 549 PINGROUP(90, NA, NA, NA, NA, NA, NA, NA), 550 PINGROUP(91, NA, NA, NA, NA, NA, NA, NA), 551 PINGROUP(92, NA, NA, NA, NA, NA, NA, NA), 552 PINGROUP(93, NA, NA, NA, NA, NA, NA, NA), 553 PINGROUP(94, NA, NA, NA, NA, NA, NA, NA), 554 PINGROUP(95, NA, NA, NA, NA, NA, NA, NA), 555 PINGROUP(96, NA, NA, NA, NA, NA, NA, NA), 556 PINGROUP(97, NA, NA, NA, NA, NA, NA, NA), 557 PINGROUP(98, NA, NA, NA, NA, NA, NA, NA), 558 PINGROUP(99, NA, NA, NA, NA, NA, NA, NA), 559 PINGROUP(100, NA, NA, NA, NA, NA, NA, NA), 560 PINGROUP(101, NA, NA, NA, NA, NA, NA, NA), 561 PINGROUP(102, NA, NA, NA, NA, NA, NA, NA), 562 PINGROUP(103, NA, NA, NA, NA, NA, NA, NA), 563 PINGROUP(104, NA, NA, NA, NA, NA, NA, NA), 564 PINGROUP(105, NA, NA, NA, NA, NA, NA, NA), 565 PINGROUP(106, NA, NA, NA, NA, NA, NA, NA), 566 PINGROUP(107, NA, NA, NA, NA, NA, NA, NA), 567 PINGROUP(108, NA, NA, NA, NA, NA, NA, NA), 568 PINGROUP(109, NA, NA, NA, NA, NA, NA, NA), 569 PINGROUP(110, NA, NA, NA, NA, NA, NA, NA), 570 PINGROUP(111, NA, NA, NA, NA, NA, NA, NA), 571 PINGROUP(112, NA, NA, NA, NA, NA, NA, NA), 572 PINGROUP(113, NA, NA, NA, NA, NA, NA, NA), 573 PINGROUP(114, NA, NA, NA, NA, NA, NA, NA), 574 PINGROUP(115, NA, NA, NA, NA, NA, NA, NA), 575 PINGROUP(116, NA, NA, NA, NA, NA, NA, NA), 576 SDC_PINGROUP(sdc1_clk, 0x2044, 13, 6), 577 SDC_PINGROUP(sdc1_cmd, 0x2044, 11, 3), 578 SDC_PINGROUP(sdc1_data, 0x2044, 9, 0), 579 SDC_PINGROUP(sdc2_clk, 0x2048, 14, 6), 580 SDC_PINGROUP(sdc2_cmd, 0x2048, 11, 3), 581 SDC_PINGROUP(sdc2_data, 0x2048, 9, 0), 582}; 583 584#define NUM_GPIO_PINGROUPS 117 585 586static const struct msm_pinctrl_soc_data msm8226_pinctrl = { 587 .pins = msm8226_pins, 588 .npins = ARRAY_SIZE(msm8226_pins), 589 .functions = msm8226_functions, 590 .nfunctions = ARRAY_SIZE(msm8226_functions), 591 .groups = msm8226_groups, 592 .ngroups = ARRAY_SIZE(msm8226_groups), 593 .ngpios = NUM_GPIO_PINGROUPS, 594}; 595 596static int msm8226_pinctrl_probe(struct platform_device *pdev) 597{ 598 return msm_pinctrl_probe(pdev, &msm8226_pinctrl); 599} 600 601static const struct of_device_id msm8226_pinctrl_of_match[] = { 602 { .compatible = "qcom,msm8226-pinctrl", }, 603 { }, 604}; 605 606static struct platform_driver msm8226_pinctrl_driver = { 607 .driver = { 608 .name = "msm8226-pinctrl", 609 .of_match_table = msm8226_pinctrl_of_match, 610 }, 611 .probe = msm8226_pinctrl_probe, 612 .remove = msm_pinctrl_remove, 613}; 614 615static int __init msm8226_pinctrl_init(void) 616{ 617 return platform_driver_register(&msm8226_pinctrl_driver); 618} 619arch_initcall(msm8226_pinctrl_init); 620 621static void __exit msm8226_pinctrl_exit(void) 622{ 623 platform_driver_unregister(&msm8226_pinctrl_driver); 624} 625module_exit(msm8226_pinctrl_exit); 626 627MODULE_AUTHOR("Bartosz Dudziak <bartosz.dudziak@snejp.pl>"); 628MODULE_DESCRIPTION("Qualcomm MSM8226 pinctrl driver"); 629MODULE_LICENSE("GPL v2"); 630MODULE_DEVICE_TABLE(of, msm8226_pinctrl_of_match); 631