1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
4 */
5
6#include <linux/module.h>
7#include <linux/of.h>
8#include <linux/platform_device.h>
9#include <linux/pinctrl/pinctrl.h>
10
11#include "pinctrl-msm.h"
12
13#define FUNCTION(fname)			                \
14	[msm_mux_##fname] = {		                \
15		.name = #fname,				\
16		.groups = fname##_groups,               \
17		.ngroups = ARRAY_SIZE(fname##_groups),	\
18	}
19
20#define REG_SIZE 0x1000
21#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)	\
22	{					        \
23		.name = "gpio" #id,			\
24		.pins = gpio##id##_pins,		\
25		.npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins),	\
26		.funcs = (int[]){			\
27			msm_mux_gpio, /* gpio mode */	\
28			msm_mux_##f1,			\
29			msm_mux_##f2,			\
30			msm_mux_##f3,			\
31			msm_mux_##f4,			\
32			msm_mux_##f5,			\
33			msm_mux_##f6,			\
34			msm_mux_##f7,			\
35			msm_mux_##f8,			\
36			msm_mux_##f9			\
37		},				        \
38		.nfuncs = 10,				\
39		.ctl_reg = REG_SIZE * id,		\
40		.io_reg = 0x4 + REG_SIZE * id,		\
41		.intr_cfg_reg = 0x8 + REG_SIZE * id,		\
42		.intr_status_reg = 0xc + REG_SIZE * id,	\
43		.intr_target_reg = 0x8 + REG_SIZE * id,	\
44		.mux_bit = 2,			\
45		.pull_bit = 0,			\
46		.drv_bit = 6,			\
47		.oe_bit = 9,			\
48		.in_bit = 0,			\
49		.out_bit = 1,			\
50		.intr_enable_bit = 0,		\
51		.intr_status_bit = 0,		\
52		.intr_target_bit = 5,		\
53		.intr_target_kpss_val = 3,	\
54		.intr_raw_status_bit = 4,	\
55		.intr_polarity_bit = 1,		\
56		.intr_detection_bit = 2,	\
57		.intr_detection_width = 2,	\
58	}
59
60static const struct pinctrl_pin_desc ipq8074_pins[] = {
61	PINCTRL_PIN(0, "GPIO_0"),
62	PINCTRL_PIN(1, "GPIO_1"),
63	PINCTRL_PIN(2, "GPIO_2"),
64	PINCTRL_PIN(3, "GPIO_3"),
65	PINCTRL_PIN(4, "GPIO_4"),
66	PINCTRL_PIN(5, "GPIO_5"),
67	PINCTRL_PIN(6, "GPIO_6"),
68	PINCTRL_PIN(7, "GPIO_7"),
69	PINCTRL_PIN(8, "GPIO_8"),
70	PINCTRL_PIN(9, "GPIO_9"),
71	PINCTRL_PIN(10, "GPIO_10"),
72	PINCTRL_PIN(11, "GPIO_11"),
73	PINCTRL_PIN(12, "GPIO_12"),
74	PINCTRL_PIN(13, "GPIO_13"),
75	PINCTRL_PIN(14, "GPIO_14"),
76	PINCTRL_PIN(15, "GPIO_15"),
77	PINCTRL_PIN(16, "GPIO_16"),
78	PINCTRL_PIN(17, "GPIO_17"),
79	PINCTRL_PIN(18, "GPIO_18"),
80	PINCTRL_PIN(19, "GPIO_19"),
81	PINCTRL_PIN(20, "GPIO_20"),
82	PINCTRL_PIN(21, "GPIO_21"),
83	PINCTRL_PIN(22, "GPIO_22"),
84	PINCTRL_PIN(23, "GPIO_23"),
85	PINCTRL_PIN(24, "GPIO_24"),
86	PINCTRL_PIN(25, "GPIO_25"),
87	PINCTRL_PIN(26, "GPIO_26"),
88	PINCTRL_PIN(27, "GPIO_27"),
89	PINCTRL_PIN(28, "GPIO_28"),
90	PINCTRL_PIN(29, "GPIO_29"),
91	PINCTRL_PIN(30, "GPIO_30"),
92	PINCTRL_PIN(31, "GPIO_31"),
93	PINCTRL_PIN(32, "GPIO_32"),
94	PINCTRL_PIN(33, "GPIO_33"),
95	PINCTRL_PIN(34, "GPIO_34"),
96	PINCTRL_PIN(35, "GPIO_35"),
97	PINCTRL_PIN(36, "GPIO_36"),
98	PINCTRL_PIN(37, "GPIO_37"),
99	PINCTRL_PIN(38, "GPIO_38"),
100	PINCTRL_PIN(39, "GPIO_39"),
101	PINCTRL_PIN(40, "GPIO_40"),
102	PINCTRL_PIN(41, "GPIO_41"),
103	PINCTRL_PIN(42, "GPIO_42"),
104	PINCTRL_PIN(43, "GPIO_43"),
105	PINCTRL_PIN(44, "GPIO_44"),
106	PINCTRL_PIN(45, "GPIO_45"),
107	PINCTRL_PIN(46, "GPIO_46"),
108	PINCTRL_PIN(47, "GPIO_47"),
109	PINCTRL_PIN(48, "GPIO_48"),
110	PINCTRL_PIN(49, "GPIO_49"),
111	PINCTRL_PIN(50, "GPIO_50"),
112	PINCTRL_PIN(51, "GPIO_51"),
113	PINCTRL_PIN(52, "GPIO_52"),
114	PINCTRL_PIN(53, "GPIO_53"),
115	PINCTRL_PIN(54, "GPIO_54"),
116	PINCTRL_PIN(55, "GPIO_55"),
117	PINCTRL_PIN(56, "GPIO_56"),
118	PINCTRL_PIN(57, "GPIO_57"),
119	PINCTRL_PIN(58, "GPIO_58"),
120	PINCTRL_PIN(59, "GPIO_59"),
121	PINCTRL_PIN(60, "GPIO_60"),
122	PINCTRL_PIN(61, "GPIO_61"),
123	PINCTRL_PIN(62, "GPIO_62"),
124	PINCTRL_PIN(63, "GPIO_63"),
125	PINCTRL_PIN(64, "GPIO_64"),
126	PINCTRL_PIN(65, "GPIO_65"),
127	PINCTRL_PIN(66, "GPIO_66"),
128	PINCTRL_PIN(67, "GPIO_67"),
129	PINCTRL_PIN(68, "GPIO_68"),
130	PINCTRL_PIN(69, "GPIO_69"),
131};
132
133#define DECLARE_MSM_GPIO_PINS(pin) \
134	static const unsigned int gpio##pin##_pins[] = { pin }
135DECLARE_MSM_GPIO_PINS(0);
136DECLARE_MSM_GPIO_PINS(1);
137DECLARE_MSM_GPIO_PINS(2);
138DECLARE_MSM_GPIO_PINS(3);
139DECLARE_MSM_GPIO_PINS(4);
140DECLARE_MSM_GPIO_PINS(5);
141DECLARE_MSM_GPIO_PINS(6);
142DECLARE_MSM_GPIO_PINS(7);
143DECLARE_MSM_GPIO_PINS(8);
144DECLARE_MSM_GPIO_PINS(9);
145DECLARE_MSM_GPIO_PINS(10);
146DECLARE_MSM_GPIO_PINS(11);
147DECLARE_MSM_GPIO_PINS(12);
148DECLARE_MSM_GPIO_PINS(13);
149DECLARE_MSM_GPIO_PINS(14);
150DECLARE_MSM_GPIO_PINS(15);
151DECLARE_MSM_GPIO_PINS(16);
152DECLARE_MSM_GPIO_PINS(17);
153DECLARE_MSM_GPIO_PINS(18);
154DECLARE_MSM_GPIO_PINS(19);
155DECLARE_MSM_GPIO_PINS(20);
156DECLARE_MSM_GPIO_PINS(21);
157DECLARE_MSM_GPIO_PINS(22);
158DECLARE_MSM_GPIO_PINS(23);
159DECLARE_MSM_GPIO_PINS(24);
160DECLARE_MSM_GPIO_PINS(25);
161DECLARE_MSM_GPIO_PINS(26);
162DECLARE_MSM_GPIO_PINS(27);
163DECLARE_MSM_GPIO_PINS(28);
164DECLARE_MSM_GPIO_PINS(29);
165DECLARE_MSM_GPIO_PINS(30);
166DECLARE_MSM_GPIO_PINS(31);
167DECLARE_MSM_GPIO_PINS(32);
168DECLARE_MSM_GPIO_PINS(33);
169DECLARE_MSM_GPIO_PINS(34);
170DECLARE_MSM_GPIO_PINS(35);
171DECLARE_MSM_GPIO_PINS(36);
172DECLARE_MSM_GPIO_PINS(37);
173DECLARE_MSM_GPIO_PINS(38);
174DECLARE_MSM_GPIO_PINS(39);
175DECLARE_MSM_GPIO_PINS(40);
176DECLARE_MSM_GPIO_PINS(41);
177DECLARE_MSM_GPIO_PINS(42);
178DECLARE_MSM_GPIO_PINS(43);
179DECLARE_MSM_GPIO_PINS(44);
180DECLARE_MSM_GPIO_PINS(45);
181DECLARE_MSM_GPIO_PINS(46);
182DECLARE_MSM_GPIO_PINS(47);
183DECLARE_MSM_GPIO_PINS(48);
184DECLARE_MSM_GPIO_PINS(49);
185DECLARE_MSM_GPIO_PINS(50);
186DECLARE_MSM_GPIO_PINS(51);
187DECLARE_MSM_GPIO_PINS(52);
188DECLARE_MSM_GPIO_PINS(53);
189DECLARE_MSM_GPIO_PINS(54);
190DECLARE_MSM_GPIO_PINS(55);
191DECLARE_MSM_GPIO_PINS(56);
192DECLARE_MSM_GPIO_PINS(57);
193DECLARE_MSM_GPIO_PINS(58);
194DECLARE_MSM_GPIO_PINS(59);
195DECLARE_MSM_GPIO_PINS(60);
196DECLARE_MSM_GPIO_PINS(61);
197DECLARE_MSM_GPIO_PINS(62);
198DECLARE_MSM_GPIO_PINS(63);
199DECLARE_MSM_GPIO_PINS(64);
200DECLARE_MSM_GPIO_PINS(65);
201DECLARE_MSM_GPIO_PINS(66);
202DECLARE_MSM_GPIO_PINS(67);
203DECLARE_MSM_GPIO_PINS(68);
204DECLARE_MSM_GPIO_PINS(69);
205
206enum ipq8074_functions {
207	msm_mux_atest_char,
208	msm_mux_atest_char0,
209	msm_mux_atest_char1,
210	msm_mux_atest_char2,
211	msm_mux_atest_char3,
212	msm_mux_audio_rxbclk,
213	msm_mux_audio_rxd,
214	msm_mux_audio_rxfsync,
215	msm_mux_audio_rxmclk,
216	msm_mux_audio_txbclk,
217	msm_mux_audio_txd,
218	msm_mux_audio_txfsync,
219	msm_mux_audio_txmclk,
220	msm_mux_blsp0_i2c,
221	msm_mux_blsp0_spi,
222	msm_mux_blsp0_uart,
223	msm_mux_blsp1_i2c,
224	msm_mux_blsp1_spi,
225	msm_mux_blsp1_uart,
226	msm_mux_blsp2_i2c,
227	msm_mux_blsp2_spi,
228	msm_mux_blsp2_uart,
229	msm_mux_blsp3_i2c,
230	msm_mux_blsp3_spi,
231	msm_mux_blsp3_spi0,
232	msm_mux_blsp3_spi1,
233	msm_mux_blsp3_spi2,
234	msm_mux_blsp3_spi3,
235	msm_mux_blsp3_uart,
236	msm_mux_blsp4_i2c0,
237	msm_mux_blsp4_i2c1,
238	msm_mux_blsp4_spi0,
239	msm_mux_blsp4_spi1,
240	msm_mux_blsp4_uart0,
241	msm_mux_blsp4_uart1,
242	msm_mux_blsp5_i2c,
243	msm_mux_blsp5_spi,
244	msm_mux_blsp5_uart,
245	msm_mux_burn0,
246	msm_mux_burn1,
247	msm_mux_cri_trng,
248	msm_mux_cri_trng0,
249	msm_mux_cri_trng1,
250	msm_mux_cxc0,
251	msm_mux_cxc1,
252	msm_mux_dbg_out,
253	msm_mux_gcc_plltest,
254	msm_mux_gcc_tlmm,
255	msm_mux_gpio,
256	msm_mux_ldo_en,
257	msm_mux_ldo_update,
258	msm_mux_led0,
259	msm_mux_led1,
260	msm_mux_led2,
261	msm_mux_mac0_sa0,
262	msm_mux_mac0_sa1,
263	msm_mux_mac1_sa0,
264	msm_mux_mac1_sa1,
265	msm_mux_mac1_sa2,
266	msm_mux_mac1_sa3,
267	msm_mux_mac2_sa0,
268	msm_mux_mac2_sa1,
269	msm_mux_mdc,
270	msm_mux_mdio,
271	msm_mux_pcie0_clk,
272	msm_mux_pcie0_rst,
273	msm_mux_pcie0_wake,
274	msm_mux_pcie1_clk,
275	msm_mux_pcie1_rst,
276	msm_mux_pcie1_wake,
277	msm_mux_pcm_drx,
278	msm_mux_pcm_dtx,
279	msm_mux_pcm_fsync,
280	msm_mux_pcm_pclk,
281	msm_mux_pcm_zsi0,
282	msm_mux_pcm_zsi1,
283	msm_mux_prng_rosc,
284	msm_mux_pta1_0,
285	msm_mux_pta1_1,
286	msm_mux_pta1_2,
287	msm_mux_pta2_0,
288	msm_mux_pta2_1,
289	msm_mux_pta2_2,
290	msm_mux_pwm0,
291	msm_mux_pwm1,
292	msm_mux_pwm2,
293	msm_mux_pwm3,
294	msm_mux_qdss_cti_trig_in_a0,
295	msm_mux_qdss_cti_trig_in_a1,
296	msm_mux_qdss_cti_trig_in_b0,
297	msm_mux_qdss_cti_trig_in_b1,
298	msm_mux_qdss_cti_trig_out_a0,
299	msm_mux_qdss_cti_trig_out_a1,
300	msm_mux_qdss_cti_trig_out_b0,
301	msm_mux_qdss_cti_trig_out_b1,
302	msm_mux_qdss_traceclk_a,
303	msm_mux_qdss_traceclk_b,
304	msm_mux_qdss_tracectl_a,
305	msm_mux_qdss_tracectl_b,
306	msm_mux_qdss_tracedata_a,
307	msm_mux_qdss_tracedata_b,
308	msm_mux_qpic,
309	msm_mux_rx0,
310	msm_mux_rx1,
311	msm_mux_rx2,
312	msm_mux_sd_card,
313	msm_mux_sd_write,
314	msm_mux_tsens_max,
315	msm_mux_wci2a,
316	msm_mux_wci2b,
317	msm_mux_wci2c,
318	msm_mux_wci2d,
319	msm_mux_NA,
320};
321
322static const char * const qpic_groups[] = {
323	"gpio0",	/* LCD_TE */
324	"gpio1",	/* BUSY_N */
325	"gpio2",	/* LCD_RS_N */
326	"gpio3",	/* WE_N */
327	"gpio4",	/* OE_N */
328	"gpio5",	/* DATA[0] */
329	"gpio6",	/* DATA[1] */
330	"gpio7",	/* DATA[2] */
331	"gpio8",	/* DATA[3] */
332	"gpio9",	/* CS_CSR_LCD */
333	"gpio10",	/* CLE */
334	"gpio11",	/* NAND_CS_N */
335	"gpio12",	/* DATA[4] */
336	"gpio13",	/* DATA[5] */
337	"gpio14",	/* DATA[6] */
338	"gpio15",	/* DATA[7] */
339	"gpio16",	/* DATA[8] */
340	"gpio17",	/* ALE */
341};
342
343static const char * const blsp5_i2c_groups[] = {
344	"gpio0", "gpio2",
345};
346
347static const char * const blsp5_spi_groups[] = {
348	"gpio0", "gpio2", "gpio9", "gpio16",
349};
350
351static const char * const wci2a_groups[] = {
352	"gpio0", "gpio2",
353};
354
355static const char * const blsp3_spi3_groups[] = {
356	"gpio0", "gpio2", "gpio9",
357};
358
359static const char * const burn0_groups[] = {
360	"gpio0",
361};
362
363static const char * const pcm_zsi0_groups[] = {
364	"gpio1",
365};
366
367static const char * const blsp5_uart_groups[] = {
368	"gpio0", "gpio2", "gpio9", "gpio16",
369};
370
371static const char * const mac1_sa2_groups[] = {
372	"gpio1", "gpio11",
373};
374
375static const char * const blsp3_spi0_groups[] = {
376	"gpio1", "gpio3", "gpio4",
377};
378
379static const char * const burn1_groups[] = {
380	"gpio1",
381};
382
383static const char * const mac0_sa1_groups[] = {
384	"gpio3", "gpio4",
385};
386
387static const char * const qdss_cti_trig_out_b0_groups[] = {
388	"gpio3",
389};
390
391static const char * const qdss_cti_trig_in_b0_groups[] = {
392	"gpio4",
393};
394
395static const char * const blsp4_uart0_groups[] = {
396	"gpio5", "gpio6", "gpio7", "gpio8",
397};
398
399static const char * const blsp4_i2c0_groups[] = {
400	"gpio5", "gpio6",
401};
402
403static const char * const blsp4_spi0_groups[] = {
404	"gpio5", "gpio6", "gpio7", "gpio8",
405};
406
407static const char * const mac2_sa1_groups[] = {
408	"gpio5", "gpio6",
409};
410
411static const char * const qdss_cti_trig_out_b1_groups[] = {
412	"gpio5",
413};
414
415static const char * const qdss_cti_trig_in_b1_groups[] = {
416	"gpio6",
417};
418
419static const char * const cxc0_groups[] = {
420	"gpio9", "gpio16",
421};
422
423static const char * const mac1_sa3_groups[] = {
424	"gpio9", "gpio16",
425};
426
427static const char * const qdss_cti_trig_in_a1_groups[] = {
428	"gpio9",
429};
430
431static const char * const qdss_cti_trig_out_a1_groups[] = {
432	"gpio10",
433};
434
435static const char * const wci2c_groups[] = {
436	"gpio11", "gpio17",
437};
438
439static const char * const qdss_cti_trig_in_a0_groups[] = {
440	"gpio11",
441};
442
443static const char * const qdss_cti_trig_out_a0_groups[] = {
444	"gpio12",
445};
446
447static const char * const qdss_traceclk_b_groups[] = {
448	"gpio14",
449};
450
451static const char * const qdss_tracectl_b_groups[] = {
452	"gpio15",
453};
454
455static const char * const pcm_zsi1_groups[] = {
456	"gpio16",
457};
458
459static const char * const qdss_tracedata_b_groups[] = {
460	"gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
461	"gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
462	"gpio30", "gpio31",
463};
464
465static const char * const led0_groups[] = {
466	"gpio18",
467};
468
469static const char * const pwm0_groups[] = {
470	"gpio18", "gpio21", "gpio25", "gpio29", "gpio63",
471};
472
473static const char * const led1_groups[] = {
474	"gpio19",
475};
476
477static const char * const pwm1_groups[] = {
478	"gpio19", "gpio22", "gpio26", "gpio30", "gpio64",
479};
480
481static const char * const led2_groups[] = {
482	"gpio20",
483};
484
485static const char * const pwm2_groups[] = {
486	"gpio20", "gpio23", "gpio27", "gpio31", "gpio66",
487};
488
489static const char * const blsp4_uart1_groups[] = {
490	"gpio21", "gpio22", "gpio23", "gpio24",
491};
492
493static const char * const blsp4_i2c1_groups[] = {
494	"gpio21", "gpio22",
495};
496
497static const char * const blsp4_spi1_groups[] = {
498	"gpio21", "gpio22", "gpio23", "gpio24",
499};
500
501static const char * const wci2d_groups[] = {
502	"gpio21", "gpio22",
503};
504
505static const char * const mac1_sa1_groups[] = {
506	"gpio21", "gpio22",
507};
508
509static const char * const blsp3_spi2_groups[] = {
510	"gpio21", "gpio22", "gpio23",
511};
512
513static const char * const pwm3_groups[] = {
514	"gpio24", "gpio28", "gpio32", "gpio67",
515};
516
517static const char * const audio_txmclk_groups[] = {
518	"gpio25",
519};
520
521static const char * const audio_txbclk_groups[] = {
522	"gpio26",
523};
524
525static const char * const audio_txfsync_groups[] = {
526	"gpio27",
527};
528
529static const char * const audio_txd_groups[] = {
530	"gpio28",
531};
532
533static const char * const audio_rxmclk_groups[] = {
534	"gpio29",
535};
536
537static const char * const atest_char0_groups[] = {
538	"gpio29",
539};
540
541static const char * const audio_rxbclk_groups[] = {
542	"gpio30",
543};
544
545static const char * const atest_char1_groups[] = {
546	"gpio30",
547};
548
549static const char * const audio_rxfsync_groups[] = {
550	"gpio31",
551};
552
553static const char * const atest_char2_groups[] = {
554	"gpio31",
555};
556
557static const char * const audio_rxd_groups[] = {
558	"gpio32",
559};
560
561static const char * const atest_char3_groups[] = {
562	"gpio32",
563};
564
565static const char * const pcm_drx_groups[] = {
566	"gpio33",
567};
568
569static const char * const mac1_sa0_groups[] = {
570	"gpio33", "gpio34",
571};
572
573static const char * const mac0_sa0_groups[] = {
574	"gpio33", "gpio34",
575};
576
577static const char * const pcm_dtx_groups[] = {
578	"gpio34",
579};
580
581static const char * const pcm_fsync_groups[] = {
582	"gpio35",
583};
584
585static const char * const mac2_sa0_groups[] = {
586	"gpio35", "gpio36",
587};
588
589static const char * const qdss_traceclk_a_groups[] = {
590	"gpio35",
591};
592
593static const char * const pcm_pclk_groups[] = {
594	"gpio36",
595};
596
597static const char * const qdss_tracectl_a_groups[] = {
598	"gpio36",
599};
600
601static const char * const atest_char_groups[] = {
602	"gpio37",
603};
604
605static const char * const qdss_tracedata_a_groups[] = {
606	"gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43",
607	"gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50",
608	"gpio51", "gpio52",
609};
610
611static const char * const blsp0_uart_groups[] = {
612	"gpio38", "gpio39", "gpio40", "gpio41",
613};
614
615static const char * const blsp0_i2c_groups[] = {
616	"gpio38", "gpio39",
617};
618
619static const char * const blsp0_spi_groups[] = {
620	"gpio38", "gpio39", "gpio40", "gpio41",
621};
622
623static const char * const blsp1_uart_groups[] = {
624	"gpio42", "gpio43", "gpio44", "gpio45",
625};
626
627static const char * const blsp1_i2c_groups[] = {
628	"gpio42", "gpio43",
629};
630
631static const char * const blsp1_spi_groups[] = {
632	"gpio42", "gpio43", "gpio44", "gpio45",
633};
634
635static const char * const blsp2_uart_groups[] = {
636	"gpio46", "gpio47", "gpio48", "gpio49",
637};
638
639static const char * const blsp2_i2c_groups[] = {
640	"gpio46", "gpio47",
641};
642
643static const char * const blsp2_spi_groups[] = {
644	"gpio46", "gpio47", "gpio48", "gpio49",
645};
646
647static const char * const blsp3_uart_groups[] = {
648	"gpio50", "gpio51", "gpio52", "gpio53",
649};
650
651static const char * const blsp3_i2c_groups[] = {
652	"gpio50", "gpio51",
653};
654
655static const char * const blsp3_spi_groups[] = {
656	"gpio50", "gpio51", "gpio52", "gpio53",
657};
658
659static const char * const pta2_0_groups[] = {
660	"gpio54",
661};
662
663static const char * const wci2b_groups[] = {
664	"gpio54", "gpio56",
665};
666
667static const char * const cxc1_groups[] = {
668	"gpio54", "gpio56",
669};
670
671static const char * const blsp3_spi1_groups[] = {
672	"gpio54", "gpio55", "gpio56",
673};
674
675static const char * const pta2_1_groups[] = {
676	"gpio55",
677};
678
679static const char * const pta2_2_groups[] = {
680	"gpio56",
681};
682
683static const char * const pcie0_clk_groups[] = {
684	"gpio57",
685};
686
687static const char * const dbg_out_groups[] = {
688	"gpio57",
689};
690
691static const char * const cri_trng0_groups[] = {
692	"gpio57",
693};
694
695static const char * const pcie0_rst_groups[] = {
696	"gpio58",
697};
698
699static const char * const cri_trng1_groups[] = {
700	"gpio58",
701};
702
703static const char * const pcie0_wake_groups[] = {
704	"gpio59",
705};
706
707static const char * const cri_trng_groups[] = {
708	"gpio59",
709};
710
711static const char * const pcie1_clk_groups[] = {
712	"gpio60",
713};
714
715static const char * const rx2_groups[] = {
716	"gpio60",
717};
718
719static const char * const ldo_update_groups[] = {
720	"gpio60",
721};
722
723static const char * const pcie1_rst_groups[] = {
724	"gpio61",
725};
726
727static const char * const ldo_en_groups[] = {
728	"gpio61",
729};
730
731static const char * const pcie1_wake_groups[] = {
732	"gpio62",
733};
734
735static const char * const gcc_plltest_groups[] = {
736	"gpio62", "gpio63",
737};
738
739static const char * const sd_card_groups[] = {
740	"gpio63",
741};
742
743static const char * const pta1_1_groups[] = {
744	"gpio64",
745};
746
747static const char * const rx1_groups[] = {
748	"gpio64",
749};
750
751static const char * const pta1_2_groups[] = {
752	"gpio65",
753};
754
755static const char * const gcc_tlmm_groups[] = {
756	"gpio65",
757};
758
759static const char * const pta1_0_groups[] = {
760	"gpio66",
761};
762
763static const char * const prng_rosc_groups[] = {
764	"gpio66",
765};
766
767static const char * const sd_write_groups[] = {
768	"gpio67",
769};
770
771static const char * const rx0_groups[] = {
772	"gpio67",
773};
774
775static const char * const tsens_max_groups[] = {
776	"gpio67",
777};
778
779static const char * const mdc_groups[] = {
780	"gpio68",
781};
782
783static const char * const mdio_groups[] = {
784	"gpio69",
785};
786
787static const char * const gpio_groups[] = {
788	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
789	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
790	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
791	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
792	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
793	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
794	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
795	"gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
796	"gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
797	"gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69",
798};
799
800static const struct msm_function ipq8074_functions[] = {
801	FUNCTION(atest_char),
802	FUNCTION(atest_char0),
803	FUNCTION(atest_char1),
804	FUNCTION(atest_char2),
805	FUNCTION(atest_char3),
806	FUNCTION(audio_rxbclk),
807	FUNCTION(audio_rxd),
808	FUNCTION(audio_rxfsync),
809	FUNCTION(audio_rxmclk),
810	FUNCTION(audio_txbclk),
811	FUNCTION(audio_txd),
812	FUNCTION(audio_txfsync),
813	FUNCTION(audio_txmclk),
814	FUNCTION(blsp0_i2c),
815	FUNCTION(blsp0_spi),
816	FUNCTION(blsp0_uart),
817	FUNCTION(blsp1_i2c),
818	FUNCTION(blsp1_spi),
819	FUNCTION(blsp1_uart),
820	FUNCTION(blsp2_i2c),
821	FUNCTION(blsp2_spi),
822	FUNCTION(blsp2_uart),
823	FUNCTION(blsp3_i2c),
824	FUNCTION(blsp3_spi),
825	FUNCTION(blsp3_spi0),
826	FUNCTION(blsp3_spi1),
827	FUNCTION(blsp3_spi2),
828	FUNCTION(blsp3_spi3),
829	FUNCTION(blsp3_uart),
830	FUNCTION(blsp4_i2c0),
831	FUNCTION(blsp4_i2c1),
832	FUNCTION(blsp4_spi0),
833	FUNCTION(blsp4_spi1),
834	FUNCTION(blsp4_uart0),
835	FUNCTION(blsp4_uart1),
836	FUNCTION(blsp5_i2c),
837	FUNCTION(blsp5_spi),
838	FUNCTION(blsp5_uart),
839	FUNCTION(burn0),
840	FUNCTION(burn1),
841	FUNCTION(cri_trng),
842	FUNCTION(cri_trng0),
843	FUNCTION(cri_trng1),
844	FUNCTION(cxc0),
845	FUNCTION(cxc1),
846	FUNCTION(dbg_out),
847	FUNCTION(gcc_plltest),
848	FUNCTION(gcc_tlmm),
849	FUNCTION(gpio),
850	FUNCTION(ldo_en),
851	FUNCTION(ldo_update),
852	FUNCTION(led0),
853	FUNCTION(led1),
854	FUNCTION(led2),
855	FUNCTION(mac0_sa0),
856	FUNCTION(mac0_sa1),
857	FUNCTION(mac1_sa0),
858	FUNCTION(mac1_sa1),
859	FUNCTION(mac1_sa2),
860	FUNCTION(mac1_sa3),
861	FUNCTION(mac2_sa0),
862	FUNCTION(mac2_sa1),
863	FUNCTION(mdc),
864	FUNCTION(mdio),
865	FUNCTION(pcie0_clk),
866	FUNCTION(pcie0_rst),
867	FUNCTION(pcie0_wake),
868	FUNCTION(pcie1_clk),
869	FUNCTION(pcie1_rst),
870	FUNCTION(pcie1_wake),
871	FUNCTION(pcm_drx),
872	FUNCTION(pcm_dtx),
873	FUNCTION(pcm_fsync),
874	FUNCTION(pcm_pclk),
875	FUNCTION(pcm_zsi0),
876	FUNCTION(pcm_zsi1),
877	FUNCTION(prng_rosc),
878	FUNCTION(pta1_0),
879	FUNCTION(pta1_1),
880	FUNCTION(pta1_2),
881	FUNCTION(pta2_0),
882	FUNCTION(pta2_1),
883	FUNCTION(pta2_2),
884	FUNCTION(pwm0),
885	FUNCTION(pwm1),
886	FUNCTION(pwm2),
887	FUNCTION(pwm3),
888	FUNCTION(qdss_cti_trig_in_a0),
889	FUNCTION(qdss_cti_trig_in_a1),
890	FUNCTION(qdss_cti_trig_in_b0),
891	FUNCTION(qdss_cti_trig_in_b1),
892	FUNCTION(qdss_cti_trig_out_a0),
893	FUNCTION(qdss_cti_trig_out_a1),
894	FUNCTION(qdss_cti_trig_out_b0),
895	FUNCTION(qdss_cti_trig_out_b1),
896	FUNCTION(qdss_traceclk_a),
897	FUNCTION(qdss_traceclk_b),
898	FUNCTION(qdss_tracectl_a),
899	FUNCTION(qdss_tracectl_b),
900	FUNCTION(qdss_tracedata_a),
901	FUNCTION(qdss_tracedata_b),
902	FUNCTION(qpic),
903	FUNCTION(rx0),
904	FUNCTION(rx1),
905	FUNCTION(rx2),
906	FUNCTION(sd_card),
907	FUNCTION(sd_write),
908	FUNCTION(tsens_max),
909	FUNCTION(wci2a),
910	FUNCTION(wci2b),
911	FUNCTION(wci2c),
912	FUNCTION(wci2d),
913};
914
915static const struct msm_pingroup ipq8074_groups[] = {
916	PINGROUP(0, qpic, blsp5_uart, blsp5_i2c, blsp5_spi, wci2a,
917		 blsp3_spi3, NA, burn0, NA),
918	PINGROUP(1, qpic, pcm_zsi0, mac1_sa2, blsp3_spi0, NA, burn1, NA, NA,
919		 NA),
920	PINGROUP(2, qpic, blsp5_uart, blsp5_i2c, blsp5_spi, wci2a,
921		 blsp3_spi3, NA, NA, NA),
922	PINGROUP(3, qpic, mac0_sa1, blsp3_spi0, qdss_cti_trig_out_b0, NA, NA,
923		 NA, NA, NA),
924	PINGROUP(4, qpic, mac0_sa1, blsp3_spi0, qdss_cti_trig_in_b0, NA, NA,
925		 NA, NA, NA),
926	PINGROUP(5, qpic, blsp4_uart0, blsp4_i2c0, blsp4_spi0, mac2_sa1,
927		 qdss_cti_trig_out_b1, NA, NA, NA),
928	PINGROUP(6, qpic, blsp4_uart0, blsp4_i2c0, blsp4_spi0, mac2_sa1,
929		 qdss_cti_trig_in_b1, NA, NA, NA),
930	PINGROUP(7, qpic, blsp4_uart0, blsp4_spi0, NA, NA, NA, NA, NA, NA),
931	PINGROUP(8, qpic, blsp4_uart0, blsp4_spi0, NA, NA, NA, NA, NA, NA),
932	PINGROUP(9, qpic, blsp5_uart, blsp5_spi, cxc0, mac1_sa3, blsp3_spi3,
933		 qdss_cti_trig_in_a1, NA, NA),
934	PINGROUP(10, qpic, qdss_cti_trig_out_a1, NA, NA, NA, NA, NA, NA,
935		 NA),
936	PINGROUP(11, qpic, wci2c, mac1_sa2, qdss_cti_trig_in_a0, NA, NA, NA,
937		 NA, NA),
938	PINGROUP(12, qpic, qdss_cti_trig_out_a0, NA, NA, NA, NA, NA, NA,
939		 NA),
940	PINGROUP(13, qpic, NA, NA, NA, NA, NA, NA, NA, NA),
941	PINGROUP(14, qpic, qdss_traceclk_b, NA, NA, NA, NA, NA, NA, NA),
942	PINGROUP(15, qpic, qdss_tracectl_b, NA, NA, NA, NA, NA, NA, NA),
943	PINGROUP(16, qpic, blsp5_uart, pcm_zsi1, blsp5_spi, cxc0, mac1_sa3,
944		 qdss_tracedata_b, NA, NA),
945	PINGROUP(17, qpic, wci2c, qdss_tracedata_b, NA, NA, NA, NA, NA, NA),
946	PINGROUP(18, led0, pwm0, qdss_tracedata_b, NA, NA, NA, NA, NA, NA),
947	PINGROUP(19, led1, pwm1, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
948	PINGROUP(20, led2, pwm2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA),
949	PINGROUP(21, pwm0, blsp4_uart1, blsp4_i2c1, blsp4_spi1, wci2d, mac1_sa1,
950		 blsp3_spi2, NA, qdss_tracedata_b),
951	PINGROUP(22, pwm1, blsp4_uart1, blsp4_i2c1, blsp4_spi1, wci2d, mac1_sa1,
952		 blsp3_spi2, NA, qdss_tracedata_b),
953	PINGROUP(23, pwm2, blsp4_uart1, blsp4_spi1, blsp3_spi2, NA,
954		 qdss_tracedata_b, NA, NA, NA),
955	PINGROUP(24, pwm3, blsp4_uart1, blsp4_spi1, NA, qdss_tracedata_b, NA,
956		 NA, NA, NA),
957	PINGROUP(25, audio_txmclk, pwm0, NA, qdss_tracedata_b, NA, NA, NA, NA,
958		 NA),
959	PINGROUP(26, audio_txbclk, pwm1, NA, qdss_tracedata_b, NA, NA, NA, NA,
960		 NA),
961	PINGROUP(27, audio_txfsync, pwm2, NA, qdss_tracedata_b, NA, NA, NA,
962		 NA, NA),
963	PINGROUP(28, audio_txd, pwm3, NA, qdss_tracedata_b, NA, NA, NA, NA,
964		 NA),
965	PINGROUP(29, audio_rxmclk, pwm0, atest_char0, NA, qdss_tracedata_b,
966		 NA, NA, NA, NA),
967	PINGROUP(30, audio_rxbclk, pwm1, atest_char1, NA, qdss_tracedata_b,
968		 NA, NA, NA, NA),
969	PINGROUP(31, audio_rxfsync, pwm2, atest_char2, NA, qdss_tracedata_b,
970		 NA, NA, NA, NA),
971	PINGROUP(32, audio_rxd, pwm3, atest_char3, NA, NA, NA, NA, NA, NA),
972	PINGROUP(33, pcm_drx, mac1_sa0, mac0_sa0, NA, NA, NA, NA, NA, NA),
973	PINGROUP(34, pcm_dtx, mac1_sa0, mac0_sa0, NA, NA, NA, NA, NA, NA),
974	PINGROUP(35, pcm_fsync, mac2_sa0, qdss_traceclk_a, NA, NA, NA, NA, NA, NA),
975	PINGROUP(36, pcm_pclk, mac2_sa0, NA, qdss_tracectl_a, NA, NA, NA, NA, NA),
976	PINGROUP(37, atest_char, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA),
977	PINGROUP(38, blsp0_uart, blsp0_i2c, blsp0_spi, NA, qdss_tracedata_a,
978		 NA, NA, NA, NA),
979	PINGROUP(39, blsp0_uart, blsp0_i2c, blsp0_spi, NA, qdss_tracedata_a,
980		 NA, NA, NA, NA),
981	PINGROUP(40, blsp0_uart, blsp0_spi, NA, qdss_tracedata_a, NA, NA, NA,
982		 NA, NA),
983	PINGROUP(41, blsp0_uart, blsp0_spi, NA, qdss_tracedata_a, NA, NA, NA,
984		 NA, NA),
985	PINGROUP(42, blsp1_uart, blsp1_i2c, blsp1_spi, NA, qdss_tracedata_a,
986		 NA, NA, NA, NA),
987	PINGROUP(43, blsp1_uart, blsp1_i2c, blsp1_spi, NA, qdss_tracedata_a,
988		 NA, NA, NA, NA),
989	PINGROUP(44, blsp1_uart, blsp1_spi, NA, qdss_tracedata_a, NA, NA, NA,
990		 NA, NA),
991	PINGROUP(45, blsp1_uart, blsp1_spi, qdss_tracedata_a, NA, NA, NA, NA,
992		 NA, NA),
993	PINGROUP(46, blsp2_uart, blsp2_i2c, blsp2_spi, qdss_tracedata_a, NA,
994		 NA, NA, NA, NA),
995	PINGROUP(47, blsp2_uart, blsp2_i2c, blsp2_spi, NA, qdss_tracedata_a,
996		 NA, NA, NA, NA),
997	PINGROUP(48, blsp2_uart, blsp2_spi, NA, qdss_tracedata_a, NA, NA, NA,
998		 NA, NA),
999	PINGROUP(49, blsp2_uart, blsp2_spi, NA, qdss_tracedata_a, NA, NA, NA,
1000		 NA, NA),
1001	PINGROUP(50, blsp3_uart, blsp3_i2c, blsp3_spi, NA, qdss_tracedata_a,
1002		 NA, NA, NA, NA),
1003	PINGROUP(51, blsp3_uart, blsp3_i2c, blsp3_spi, NA, qdss_tracedata_a,
1004		 NA, NA, NA, NA),
1005	PINGROUP(52, blsp3_uart, blsp3_spi, NA, qdss_tracedata_a, NA, NA, NA,
1006		 NA, NA),
1007	PINGROUP(53, blsp3_uart, blsp3_spi, NA, NA, NA, NA, NA, NA, NA),
1008	PINGROUP(54, pta2_0, wci2b, cxc1, blsp3_spi1, NA, NA, NA, NA, NA),
1009	PINGROUP(55, pta2_1, blsp3_spi1, NA, NA, NA, NA, NA, NA, NA),
1010	PINGROUP(56, pta2_2, wci2b, cxc1, blsp3_spi1, NA, NA, NA, NA, NA),
1011	PINGROUP(57, pcie0_clk, NA, dbg_out, cri_trng0, NA, NA, NA, NA, NA),
1012	PINGROUP(58, pcie0_rst, NA, cri_trng1, NA, NA, NA, NA, NA, NA),
1013	PINGROUP(59, pcie0_wake, NA, cri_trng, NA, NA, NA, NA, NA, NA),
1014	PINGROUP(60, pcie1_clk, rx2, ldo_update, NA, NA, NA, NA, NA, NA),
1015	PINGROUP(61, pcie1_rst, ldo_en, NA, NA, NA, NA, NA, NA, NA),
1016	PINGROUP(62, pcie1_wake, gcc_plltest, NA, NA, NA, NA, NA, NA, NA),
1017	PINGROUP(63, sd_card, pwm0, NA, gcc_plltest, NA, NA, NA, NA, NA),
1018	PINGROUP(64, pta1_1, pwm1, NA, rx1, NA, NA, NA, NA, NA),
1019	PINGROUP(65, pta1_2, NA, gcc_tlmm, NA, NA, NA, NA, NA, NA),
1020	PINGROUP(66, pta1_0, pwm2, prng_rosc, NA, NA, NA, NA, NA, NA),
1021	PINGROUP(67, sd_write, pwm3, rx0, tsens_max, NA, NA, NA, NA, NA),
1022	PINGROUP(68, mdc, NA, NA, NA, NA, NA, NA, NA, NA),
1023	PINGROUP(69, mdio, NA, NA, NA, NA, NA, NA, NA, NA),
1024};
1025
1026static const struct msm_pinctrl_soc_data ipq8074_pinctrl = {
1027	.pins = ipq8074_pins,
1028	.npins = ARRAY_SIZE(ipq8074_pins),
1029	.functions = ipq8074_functions,
1030	.nfunctions = ARRAY_SIZE(ipq8074_functions),
1031	.groups = ipq8074_groups,
1032	.ngroups = ARRAY_SIZE(ipq8074_groups),
1033	.ngpios = 70,
1034};
1035
1036static int ipq8074_pinctrl_probe(struct platform_device *pdev)
1037{
1038	return msm_pinctrl_probe(pdev, &ipq8074_pinctrl);
1039}
1040
1041static const struct of_device_id ipq8074_pinctrl_of_match[] = {
1042	{ .compatible = "qcom,ipq8074-pinctrl", },
1043	{ },
1044};
1045
1046static struct platform_driver ipq8074_pinctrl_driver = {
1047	.driver = {
1048		.name = "ipq8074-pinctrl",
1049		.of_match_table = ipq8074_pinctrl_of_match,
1050	},
1051	.probe = ipq8074_pinctrl_probe,
1052	.remove = msm_pinctrl_remove,
1053};
1054
1055static int __init ipq8074_pinctrl_init(void)
1056{
1057	return platform_driver_register(&ipq8074_pinctrl_driver);
1058}
1059arch_initcall(ipq8074_pinctrl_init);
1060
1061static void __exit ipq8074_pinctrl_exit(void)
1062{
1063	platform_driver_unregister(&ipq8074_pinctrl_driver);
1064}
1065module_exit(ipq8074_pinctrl_exit);
1066
1067MODULE_DESCRIPTION("Qualcomm ipq8074 pinctrl driver");
1068MODULE_LICENSE("GPL v2");
1069MODULE_DEVICE_TABLE(of, ipq8074_pinctrl_of_match);
1070