1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Pinctrl driver for Rockchip RK805 PMIC 4 * 5 * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd 6 * 7 * Author: Joseph Chen <chenjh@rock-chips.com> 8 * 9 * Based on the pinctrl-as3722 driver 10 */ 11 12#include <linux/gpio/driver.h> 13#include <linux/kernel.h> 14#include <linux/module.h> 15#include <linux/mfd/rk808.h> 16#include <linux/of.h> 17#include <linux/of_device.h> 18#include <linux/platform_device.h> 19#include <linux/pinctrl/consumer.h> 20#include <linux/pinctrl/machine.h> 21#include <linux/pinctrl/pinctrl.h> 22#include <linux/pinctrl/pinconf-generic.h> 23#include <linux/pinctrl/pinconf.h> 24#include <linux/pinctrl/pinmux.h> 25#include <linux/pm.h> 26#include <linux/slab.h> 27 28#include "core.h" 29#include "pinconf.h" 30#include "pinctrl-utils.h" 31 32struct rk805_pin_function { 33 const char *name; 34 const char *const *groups; 35 unsigned int ngroups; 36 int mux_option; 37}; 38 39struct rk805_pin_group { 40 const char *name; 41 const unsigned int pins[1]; 42 unsigned int npins; 43}; 44 45/* 46 * @reg: gpio setting register; 47 * @fun_mask: functions select mask value, when set is gpio; 48 * @dir_mask: input or output mask value, when set is output, otherwise input; 49 * @val_mask: gpio set value, when set is level high, otherwise low; 50 * 51 * Different PMIC has different pin features, belowing 3 mask members are not 52 * all necessary for every PMIC. For example, RK805 has 2 pins that can be used 53 * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1 54 * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all 55 * necessary. 56 */ 57struct rk805_pin_config { 58 u8 reg; 59 u8 fun_msk; 60 u8 dir_msk; 61 u8 val_msk; 62}; 63 64struct rk805_pctrl_info { 65 struct rk808 *rk808; 66 struct device *dev; 67 struct pinctrl_dev *pctl; 68 struct gpio_chip gpio_chip; 69 struct pinctrl_desc pinctrl_desc; 70 const struct rk805_pin_function *functions; 71 unsigned int num_functions; 72 const struct rk805_pin_group *groups; 73 int num_pin_groups; 74 const struct pinctrl_pin_desc *pins; 75 unsigned int num_pins; 76 const struct rk805_pin_config *pin_cfg; 77}; 78 79enum rk805_pinmux_option { 80 RK805_PINMUX_GPIO, 81}; 82 83enum { 84 RK805_GPIO0, 85 RK805_GPIO1, 86}; 87 88static const char *const rk805_gpio_groups[] = { 89 "gpio0", 90 "gpio1", 91}; 92 93/* RK805: 2 output only GPIOs */ 94static const struct pinctrl_pin_desc rk805_pins_desc[] = { 95 PINCTRL_PIN(RK805_GPIO0, "gpio0"), 96 PINCTRL_PIN(RK805_GPIO1, "gpio1"), 97}; 98 99static const struct rk805_pin_function rk805_pin_functions[] = { 100 { 101 .name = "gpio", 102 .groups = rk805_gpio_groups, 103 .ngroups = ARRAY_SIZE(rk805_gpio_groups), 104 .mux_option = RK805_PINMUX_GPIO, 105 }, 106}; 107 108static const struct rk805_pin_group rk805_pin_groups[] = { 109 { 110 .name = "gpio0", 111 .pins = { RK805_GPIO0 }, 112 .npins = 1, 113 }, 114 { 115 .name = "gpio1", 116 .pins = { RK805_GPIO1 }, 117 .npins = 1, 118 }, 119}; 120 121#define RK805_GPIO0_VAL_MSK BIT(0) 122#define RK805_GPIO1_VAL_MSK BIT(1) 123 124static const struct rk805_pin_config rk805_gpio_cfgs[] = { 125 { 126 .reg = RK805_OUT_REG, 127 .val_msk = RK805_GPIO0_VAL_MSK, 128 }, 129 { 130 .reg = RK805_OUT_REG, 131 .val_msk = RK805_GPIO1_VAL_MSK, 132 }, 133}; 134 135/* generic gpio chip */ 136static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset) 137{ 138 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 139 int ret, val; 140 141 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val); 142 if (ret) { 143 dev_err(pci->dev, "get gpio%d value failed\n", offset); 144 return ret; 145 } 146 147 return !!(val & pci->pin_cfg[offset].val_msk); 148} 149 150static void rk805_gpio_set(struct gpio_chip *chip, 151 unsigned int offset, 152 int value) 153{ 154 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 155 int ret; 156 157 ret = regmap_update_bits(pci->rk808->regmap, 158 pci->pin_cfg[offset].reg, 159 pci->pin_cfg[offset].val_msk, 160 value ? pci->pin_cfg[offset].val_msk : 0); 161 if (ret) 162 dev_err(pci->dev, "set gpio%d value %d failed\n", 163 offset, value); 164} 165 166static int rk805_gpio_direction_input(struct gpio_chip *chip, 167 unsigned int offset) 168{ 169 return pinctrl_gpio_direction_input(chip->base + offset); 170} 171 172static int rk805_gpio_direction_output(struct gpio_chip *chip, 173 unsigned int offset, int value) 174{ 175 rk805_gpio_set(chip, offset, value); 176 return pinctrl_gpio_direction_output(chip->base + offset); 177} 178 179static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) 180{ 181 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); 182 unsigned int val; 183 int ret; 184 185 /* default output*/ 186 if (!pci->pin_cfg[offset].dir_msk) 187 return GPIO_LINE_DIRECTION_OUT; 188 189 ret = regmap_read(pci->rk808->regmap, 190 pci->pin_cfg[offset].reg, 191 &val); 192 if (ret) { 193 dev_err(pci->dev, "get gpio%d direction failed\n", offset); 194 return ret; 195 } 196 197 if (val & pci->pin_cfg[offset].dir_msk) 198 return GPIO_LINE_DIRECTION_OUT; 199 200 return GPIO_LINE_DIRECTION_IN; 201} 202 203static const struct gpio_chip rk805_gpio_chip = { 204 .label = "rk805-gpio", 205 .request = gpiochip_generic_request, 206 .free = gpiochip_generic_free, 207 .get_direction = rk805_gpio_get_direction, 208 .get = rk805_gpio_get, 209 .set = rk805_gpio_set, 210 .direction_input = rk805_gpio_direction_input, 211 .direction_output = rk805_gpio_direction_output, 212 .can_sleep = true, 213 .base = -1, 214 .owner = THIS_MODULE, 215}; 216 217/* generic pinctrl */ 218static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) 219{ 220 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 221 222 return pci->num_pin_groups; 223} 224 225static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 226 unsigned int group) 227{ 228 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 229 230 return pci->groups[group].name; 231} 232 233static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 234 unsigned int group, 235 const unsigned int **pins, 236 unsigned int *num_pins) 237{ 238 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 239 240 *pins = pci->groups[group].pins; 241 *num_pins = pci->groups[group].npins; 242 243 return 0; 244} 245 246static const struct pinctrl_ops rk805_pinctrl_ops = { 247 .get_groups_count = rk805_pinctrl_get_groups_count, 248 .get_group_name = rk805_pinctrl_get_group_name, 249 .get_group_pins = rk805_pinctrl_get_group_pins, 250 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, 251 .dt_free_map = pinctrl_utils_free_map, 252}; 253 254static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) 255{ 256 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 257 258 return pci->num_functions; 259} 260 261static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev, 262 unsigned int function) 263{ 264 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 265 266 return pci->functions[function].name; 267} 268 269static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, 270 unsigned int function, 271 const char *const **groups, 272 unsigned int *const num_groups) 273{ 274 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 275 276 *groups = pci->functions[function].groups; 277 *num_groups = pci->functions[function].ngroups; 278 279 return 0; 280} 281 282static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, 283 unsigned int offset, 284 int mux) 285{ 286 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 287 int ret; 288 289 if (!pci->pin_cfg[offset].fun_msk) 290 return 0; 291 292 if (mux == RK805_PINMUX_GPIO) { 293 ret = regmap_update_bits(pci->rk808->regmap, 294 pci->pin_cfg[offset].reg, 295 pci->pin_cfg[offset].fun_msk, 296 pci->pin_cfg[offset].fun_msk); 297 if (ret) { 298 dev_err(pci->dev, "set gpio%d GPIO failed\n", offset); 299 return ret; 300 } 301 } else { 302 dev_err(pci->dev, "Couldn't find function mux %d\n", mux); 303 return -EINVAL; 304 } 305 306 return 0; 307} 308 309static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev, 310 unsigned int function, 311 unsigned int group) 312{ 313 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 314 int mux = pci->functions[function].mux_option; 315 int offset = group; 316 317 return _rk805_pinctrl_set_mux(pctldev, offset, mux); 318} 319 320static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 321 struct pinctrl_gpio_range *range, 322 unsigned int offset, bool input) 323{ 324 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 325 int ret; 326 327 /* switch to gpio function */ 328 ret = _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO); 329 if (ret) { 330 dev_err(pci->dev, "set gpio%d mux failed\n", offset); 331 return ret; 332 } 333 334 /* set direction */ 335 if (!pci->pin_cfg[offset].dir_msk) 336 return 0; 337 338 ret = regmap_update_bits(pci->rk808->regmap, 339 pci->pin_cfg[offset].reg, 340 pci->pin_cfg[offset].dir_msk, 341 input ? 0 : pci->pin_cfg[offset].dir_msk); 342 if (ret) { 343 dev_err(pci->dev, "set gpio%d direction failed\n", offset); 344 return ret; 345 } 346 347 return ret; 348} 349 350static const struct pinmux_ops rk805_pinmux_ops = { 351 .get_functions_count = rk805_pinctrl_get_funcs_count, 352 .get_function_name = rk805_pinctrl_get_func_name, 353 .get_function_groups = rk805_pinctrl_get_func_groups, 354 .set_mux = rk805_pinctrl_set_mux, 355 .gpio_set_direction = rk805_pmx_gpio_set_direction, 356}; 357 358static int rk805_pinconf_get(struct pinctrl_dev *pctldev, 359 unsigned int pin, unsigned long *config) 360{ 361 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 362 enum pin_config_param param = pinconf_to_config_param(*config); 363 u32 arg = 0; 364 365 switch (param) { 366 case PIN_CONFIG_OUTPUT: 367 arg = rk805_gpio_get(&pci->gpio_chip, pin); 368 break; 369 default: 370 dev_err(pci->dev, "Properties not supported\n"); 371 return -ENOTSUPP; 372 } 373 374 *config = pinconf_to_config_packed(param, (u16)arg); 375 376 return 0; 377} 378 379static int rk805_pinconf_set(struct pinctrl_dev *pctldev, 380 unsigned int pin, unsigned long *configs, 381 unsigned int num_configs) 382{ 383 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev); 384 enum pin_config_param param; 385 u32 i, arg = 0; 386 387 for (i = 0; i < num_configs; i++) { 388 param = pinconf_to_config_param(configs[i]); 389 arg = pinconf_to_config_argument(configs[i]); 390 391 switch (param) { 392 case PIN_CONFIG_OUTPUT: 393 rk805_gpio_set(&pci->gpio_chip, pin, arg); 394 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false); 395 break; 396 default: 397 dev_err(pci->dev, "Properties not supported\n"); 398 return -ENOTSUPP; 399 } 400 } 401 402 return 0; 403} 404 405static const struct pinconf_ops rk805_pinconf_ops = { 406 .pin_config_get = rk805_pinconf_get, 407 .pin_config_set = rk805_pinconf_set, 408}; 409 410static const struct pinctrl_desc rk805_pinctrl_desc = { 411 .name = "rk805-pinctrl", 412 .pctlops = &rk805_pinctrl_ops, 413 .pmxops = &rk805_pinmux_ops, 414 .confops = &rk805_pinconf_ops, 415 .owner = THIS_MODULE, 416}; 417 418static int rk805_pinctrl_probe(struct platform_device *pdev) 419{ 420 struct rk805_pctrl_info *pci; 421 int ret; 422 423 pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL); 424 if (!pci) 425 return -ENOMEM; 426 427 pci->dev = &pdev->dev; 428 pci->dev->of_node = pdev->dev.parent->of_node; 429 pci->rk808 = dev_get_drvdata(pdev->dev.parent); 430 431 pci->pinctrl_desc = rk805_pinctrl_desc; 432 pci->gpio_chip = rk805_gpio_chip; 433 pci->gpio_chip.parent = &pdev->dev; 434 pci->gpio_chip.of_node = pdev->dev.parent->of_node; 435 436 platform_set_drvdata(pdev, pci); 437 438 switch (pci->rk808->variant) { 439 case RK805_ID: 440 pci->pins = rk805_pins_desc; 441 pci->num_pins = ARRAY_SIZE(rk805_pins_desc); 442 pci->functions = rk805_pin_functions; 443 pci->num_functions = ARRAY_SIZE(rk805_pin_functions); 444 pci->groups = rk805_pin_groups; 445 pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups); 446 pci->pinctrl_desc.pins = rk805_pins_desc; 447 pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc); 448 pci->pin_cfg = rk805_gpio_cfgs; 449 pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs); 450 break; 451 default: 452 dev_err(&pdev->dev, "unsupported RK805 ID %lu\n", 453 pci->rk808->variant); 454 return -EINVAL; 455 } 456 457 /* Add gpio chip */ 458 ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci); 459 if (ret < 0) { 460 dev_err(&pdev->dev, "Couldn't add gpiochip\n"); 461 return ret; 462 } 463 464 /* Add pinctrl */ 465 pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci); 466 if (IS_ERR(pci->pctl)) { 467 dev_err(&pdev->dev, "Couldn't add pinctrl\n"); 468 return PTR_ERR(pci->pctl); 469 } 470 471 /* Add pin range */ 472 ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev), 473 0, 0, pci->gpio_chip.ngpio); 474 if (ret < 0) { 475 dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n"); 476 return ret; 477 } 478 479 return 0; 480} 481 482static struct platform_driver rk805_pinctrl_driver = { 483 .probe = rk805_pinctrl_probe, 484 .driver = { 485 .name = "rk805-pinctrl", 486 }, 487}; 488module_platform_driver(rk805_pinctrl_driver); 489 490MODULE_DESCRIPTION("RK805 pin control and GPIO driver"); 491MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>"); 492MODULE_LICENSE("GPL v2"); 493