1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Pin controller and GPIO driver for Amlogic Meson SoCs
4 *
5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
6 */
7
8#include <linux/gpio/driver.h>
9#include <linux/pinctrl/pinctrl.h>
10#include <linux/platform_device.h>
11#include <linux/regmap.h>
12#include <linux/types.h>
13
14struct meson_pinctrl;
15
16/**
17 * struct meson_pmx_group - a pinmux group
18 *
19 * @name:	group name
20 * @pins:	pins in the group
21 * @num_pins:	number of pins in the group
22 * @is_gpio:	whether the group is a single GPIO group
23 * @reg:	register offset for the group in the domain mux registers
24 * @bit		bit index enabling the group
25 * @domain:	index of the domain this group belongs to
26 */
27struct meson_pmx_group {
28	const char *name;
29	const unsigned int *pins;
30	unsigned int num_pins;
31	const void *data;
32};
33
34/**
35 * struct meson_pmx_func - a pinmux function
36 *
37 * @name:	function name
38 * @groups:	groups in the function
39 * @num_groups:	number of groups in the function
40 */
41struct meson_pmx_func {
42	const char *name;
43	const char * const *groups;
44	unsigned int num_groups;
45};
46
47/**
48 * struct meson_reg_desc - a register descriptor
49 *
50 * @reg:	register offset in the regmap
51 * @bit:	bit index in register
52 *
53 * The structure describes the information needed to control pull,
54 * pull-enable, direction, etc. for a single pin
55 */
56struct meson_reg_desc {
57	unsigned int reg;
58	unsigned int bit;
59};
60
61/**
62 * enum meson_reg_type - type of registers encoded in @meson_reg_desc
63 */
64enum meson_reg_type {
65	REG_PULLEN,
66	REG_PULL,
67	REG_DIR,
68	REG_OUT,
69	REG_IN,
70	REG_DS,
71	NUM_REG,
72};
73
74/**
75 * enum meson_pinconf_drv - value of drive-strength supported
76 */
77enum meson_pinconf_drv {
78	MESON_PINCONF_DRV_500UA,
79	MESON_PINCONF_DRV_2500UA,
80	MESON_PINCONF_DRV_3000UA,
81	MESON_PINCONF_DRV_4000UA,
82};
83
84/**
85 * struct meson bank
86 *
87 * @name:	bank name
88 * @first:	first pin of the bank
89 * @last:	last pin of the bank
90 * @irq:	hwirq base number of the bank
91 * @regs:	array of register descriptors
92 *
93 * A bank represents a set of pins controlled by a contiguous set of
94 * bits in the domain registers. The structure specifies which bits in
95 * the regmap control the different functionalities. Each member of
96 * the @regs array refers to the first pin of the bank.
97 */
98struct meson_bank {
99	const char *name;
100	unsigned int first;
101	unsigned int last;
102	int irq_first;
103	int irq_last;
104	struct meson_reg_desc regs[NUM_REG];
105};
106
107struct meson_pinctrl_data {
108	const char *name;
109	const struct pinctrl_pin_desc *pins;
110	struct meson_pmx_group *groups;
111	struct meson_pmx_func *funcs;
112	unsigned int num_pins;
113	unsigned int num_groups;
114	unsigned int num_funcs;
115	struct meson_bank *banks;
116	unsigned int num_banks;
117	const struct pinmux_ops *pmx_ops;
118	void *pmx_data;
119	int (*parse_dt)(struct meson_pinctrl *pc);
120};
121
122struct meson_pinctrl {
123	struct device *dev;
124	struct pinctrl_dev *pcdev;
125	struct pinctrl_desc desc;
126	struct meson_pinctrl_data *data;
127	struct regmap *reg_mux;
128	struct regmap *reg_pullen;
129	struct regmap *reg_pull;
130	struct regmap *reg_gpio;
131	struct regmap *reg_ds;
132	struct gpio_chip chip;
133	struct device_node *of_node;
134};
135
136#define FUNCTION(fn)							\
137	{								\
138		.name = #fn,						\
139		.groups = fn ## _groups,				\
140		.num_groups = ARRAY_SIZE(fn ## _groups),		\
141	}
142
143#define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib,     \
144		dsr, dsb)                                                      \
145	{								\
146		.name		= n,					\
147		.first		= f,					\
148		.last		= l,					\
149		.irq_first	= fi,					\
150		.irq_last	= li,					\
151		.regs = {						\
152			[REG_PULLEN]	= { per, peb },			\
153			[REG_PULL]	= { pr, pb },			\
154			[REG_DIR]	= { dr, db },			\
155			[REG_OUT]	= { or, ob },			\
156			[REG_IN]	= { ir, ib },			\
157			[REG_DS]	= { dsr, dsb },			\
158		},							\
159	 }
160
161#define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
162	BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
163
164#define MESON_PIN(x) PINCTRL_PIN(x, #x)
165
166/* Common pmx functions */
167int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev);
168const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
169				    unsigned selector);
170int meson_pmx_get_groups(struct pinctrl_dev *pcdev,
171			 unsigned selector,
172			 const char * const **groups,
173			 unsigned * const num_groups);
174
175/* Common probe function */
176int meson_pinctrl_probe(struct platform_device *pdev);
177/* Common ao groups extra dt parse function for SoCs before g12a  */
178int meson8_aobus_parse_dt_extra(struct meson_pinctrl *pc);
179/* Common extra dt parse function for SoCs like A1  */
180int meson_a1_parse_dt_extra(struct meson_pinctrl *pc);
181