1// SPDX-License-Identifier: GPL-2.0 2/* 3 * MediaTek Pinctrl Paris Driver, which implement the vendor per-pin 4 * bindings for MediaTek SoC. 5 * 6 * Copyright (C) 2018 MediaTek Inc. 7 * Author: Sean Wang <sean.wang@mediatek.com> 8 * Zhiyong Tao <zhiyong.tao@mediatek.com> 9 * Hongzhou.Yang <hongzhou.yang@mediatek.com> 10 */ 11 12#include <linux/gpio/driver.h> 13#include <linux/module.h> 14#include <dt-bindings/pinctrl/mt65xx.h> 15#include "pinctrl-paris.h" 16 17#define PINCTRL_PINCTRL_DEV KBUILD_MODNAME 18 19/* Custom pinconf parameters */ 20#define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) 21#define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) 22#define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) 23#define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) 24#define MTK_PIN_CONFIG_DRV_ADV (PIN_CONFIG_END + 5) 25 26static const struct pinconf_generic_params mtk_custom_bindings[] = { 27 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, 28 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, 29 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, 30 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, 31 {"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2}, 32}; 33 34#ifdef CONFIG_DEBUG_FS 35static const struct pin_config_item mtk_conf_items[] = { 36 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), 37 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), 38 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), 39 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), 40 PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true), 41}; 42#endif 43 44static const char * const mtk_gpio_functions[] = { 45 "func0", "func1", "func2", "func3", 46 "func4", "func5", "func6", "func7", 47 "func8", "func9", "func10", "func11", 48 "func12", "func13", "func14", "func15", 49}; 50 51static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, 52 struct pinctrl_gpio_range *range, 53 unsigned int pin) 54{ 55 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 56 const struct mtk_pin_desc *desc; 57 58 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 59 60 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 61 hw->soc->gpio_m); 62} 63 64static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, 65 struct pinctrl_gpio_range *range, 66 unsigned int pin, bool input) 67{ 68 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 69 const struct mtk_pin_desc *desc; 70 71 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 72 73 /* hardware would take 0 as input direction */ 74 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); 75} 76 77static int mtk_pinconf_get(struct pinctrl_dev *pctldev, 78 unsigned int pin, unsigned long *config) 79{ 80 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 81 u32 param = pinconf_to_config_param(*config); 82 int pullup, err, reg, ret = 1; 83 const struct mtk_pin_desc *desc; 84 85 if (pin >= hw->soc->npins) { 86 err = -EINVAL; 87 goto out; 88 } 89 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 90 91 switch (param) { 92 case PIN_CONFIG_BIAS_DISABLE: 93 case PIN_CONFIG_BIAS_PULL_UP: 94 case PIN_CONFIG_BIAS_PULL_DOWN: 95 if (hw->soc->bias_get_combo) { 96 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); 97 if (err) 98 goto out; 99 if (ret == MTK_PUPD_SET_R1R0_00) 100 ret = MTK_DISABLE; 101 if (param == PIN_CONFIG_BIAS_DISABLE) { 102 if (ret != MTK_DISABLE) 103 err = -EINVAL; 104 } else if (param == PIN_CONFIG_BIAS_PULL_UP) { 105 if (!pullup || ret == MTK_DISABLE) 106 err = -EINVAL; 107 } else if (param == PIN_CONFIG_BIAS_PULL_DOWN) { 108 if (pullup || ret == MTK_DISABLE) 109 err = -EINVAL; 110 } 111 } else { 112 err = -ENOTSUPP; 113 } 114 break; 115 case PIN_CONFIG_SLEW_RATE: 116 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret); 117 break; 118 case PIN_CONFIG_INPUT_ENABLE: 119 case PIN_CONFIG_OUTPUT_ENABLE: 120 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); 121 if (err) 122 goto out; 123 /* CONFIG Current direction return value 124 * ------------- ----------------- ---------------------- 125 * OUTPUT_ENABLE output 1 (= HW value) 126 * input 0 (= HW value) 127 * INPUT_ENABLE output 0 (= reverse HW value) 128 * input 1 (= reverse HW value) 129 */ 130 if (param == PIN_CONFIG_INPUT_ENABLE) 131 ret = !ret; 132 133 break; 134 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 135 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); 136 if (err) 137 goto out; 138 /* return error when in output mode 139 * because schmitt trigger only work in input mode 140 */ 141 if (ret) { 142 err = -EINVAL; 143 goto out; 144 } 145 146 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret); 147 148 break; 149 case PIN_CONFIG_DRIVE_STRENGTH: 150 if (hw->soc->drive_get) 151 err = hw->soc->drive_get(hw, desc, &ret); 152 else 153 err = -ENOTSUPP; 154 break; 155 case MTK_PIN_CONFIG_TDSEL: 156 case MTK_PIN_CONFIG_RDSEL: 157 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 158 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 159 err = mtk_hw_get_value(hw, desc, reg, &ret); 160 break; 161 case MTK_PIN_CONFIG_PU_ADV: 162 case MTK_PIN_CONFIG_PD_ADV: 163 if (hw->soc->adv_pull_get) { 164 pullup = param == MTK_PIN_CONFIG_PU_ADV; 165 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); 166 } else 167 err = -ENOTSUPP; 168 break; 169 case MTK_PIN_CONFIG_DRV_ADV: 170 if (hw->soc->adv_drive_get) 171 err = hw->soc->adv_drive_get(hw, desc, &ret); 172 else 173 err = -ENOTSUPP; 174 break; 175 default: 176 err = -ENOTSUPP; 177 } 178 179out: 180 if (!err) 181 *config = pinconf_to_config_packed(param, ret); 182 183 return err; 184} 185 186static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 187 enum pin_config_param param, u32 arg) 188{ 189 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 190 const struct mtk_pin_desc *desc; 191 int err = 0; 192 u32 reg; 193 194 if (pin >= hw->soc->npins) { 195 err = -EINVAL; 196 goto err; 197 } 198 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 199 200 switch ((u32)param) { 201 case PIN_CONFIG_BIAS_DISABLE: 202 if (hw->soc->bias_set_combo) 203 err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); 204 else 205 err = -ENOTSUPP; 206 break; 207 case PIN_CONFIG_BIAS_PULL_UP: 208 if (hw->soc->bias_set_combo) 209 err = hw->soc->bias_set_combo(hw, desc, 1, arg); 210 else 211 err = -ENOTSUPP; 212 break; 213 case PIN_CONFIG_BIAS_PULL_DOWN: 214 if (hw->soc->bias_set_combo) 215 err = hw->soc->bias_set_combo(hw, desc, 0, arg); 216 else 217 err = -ENOTSUPP; 218 break; 219 case PIN_CONFIG_OUTPUT_ENABLE: 220 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 221 MTK_DISABLE); 222 /* Keep set direction to consider the case that a GPIO pin 223 * does not have SMT control 224 */ 225 if (err != -ENOTSUPP) 226 goto err; 227 228 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 229 MTK_OUTPUT); 230 break; 231 case PIN_CONFIG_INPUT_ENABLE: 232 /* regard all non-zero value as enable */ 233 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg); 234 if (err) 235 goto err; 236 237 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 238 MTK_INPUT); 239 break; 240 case PIN_CONFIG_SLEW_RATE: 241 /* regard all non-zero value as enable */ 242 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg); 243 break; 244 case PIN_CONFIG_OUTPUT: 245 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 246 MTK_OUTPUT); 247 if (err) 248 goto err; 249 250 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, 251 arg); 252 break; 253 case PIN_CONFIG_INPUT_SCHMITT: 254 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 255 /* arg = 1: Input mode & SMT enable ; 256 * arg = 0: Output mode & SMT disable 257 */ 258 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg); 259 if (err) 260 goto err; 261 262 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg); 263 break; 264 case PIN_CONFIG_DRIVE_STRENGTH: 265 if (hw->soc->drive_set) 266 err = hw->soc->drive_set(hw, desc, arg); 267 else 268 err = -ENOTSUPP; 269 break; 270 case MTK_PIN_CONFIG_TDSEL: 271 case MTK_PIN_CONFIG_RDSEL: 272 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 273 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 274 err = mtk_hw_set_value(hw, desc, reg, arg); 275 break; 276 case MTK_PIN_CONFIG_PU_ADV: 277 case MTK_PIN_CONFIG_PD_ADV: 278 if (hw->soc->adv_pull_set) { 279 bool pullup; 280 281 pullup = param == MTK_PIN_CONFIG_PU_ADV; 282 err = hw->soc->adv_pull_set(hw, desc, pullup, 283 arg); 284 } else 285 err = -ENOTSUPP; 286 break; 287 case MTK_PIN_CONFIG_DRV_ADV: 288 if (hw->soc->adv_drive_set) 289 err = hw->soc->adv_drive_set(hw, desc, arg); 290 else 291 err = -ENOTSUPP; 292 break; 293 default: 294 err = -ENOTSUPP; 295 } 296 297err: 298 return err; 299} 300 301static struct mtk_pinctrl_group * 302mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin) 303{ 304 int i; 305 306 for (i = 0; i < hw->soc->ngrps; i++) { 307 struct mtk_pinctrl_group *grp = hw->groups + i; 308 309 if (grp->pin == pin) 310 return grp; 311 } 312 313 return NULL; 314} 315 316static const struct mtk_func_desc * 317mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum) 318{ 319 const struct mtk_pin_desc *pin = hw->soc->pins + pin_num; 320 const struct mtk_func_desc *func = pin->funcs; 321 322 while (func && func->name) { 323 if (func->muxval == fnum) 324 return func; 325 func++; 326 } 327 328 return NULL; 329} 330 331static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num, 332 u32 fnum) 333{ 334 int i; 335 336 for (i = 0; i < hw->soc->npins; i++) { 337 const struct mtk_pin_desc *pin = hw->soc->pins + i; 338 339 if (pin->number == pin_num) { 340 const struct mtk_func_desc *func = pin->funcs; 341 342 while (func && func->name) { 343 if (func->muxval == fnum) 344 return true; 345 func++; 346 } 347 348 break; 349 } 350 } 351 352 return false; 353} 354 355static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl, 356 u32 pin, u32 fnum, 357 struct mtk_pinctrl_group *grp, 358 struct pinctrl_map **map, 359 unsigned *reserved_maps, 360 unsigned *num_maps) 361{ 362 bool ret; 363 364 if (*num_maps == *reserved_maps) 365 return -ENOSPC; 366 367 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 368 (*map)[*num_maps].data.mux.group = grp->name; 369 370 ret = mtk_pctrl_is_function_valid(pctl, pin, fnum); 371 if (!ret) { 372 dev_err(pctl->dev, "invalid function %d on pin %d .\n", 373 fnum, pin); 374 return -EINVAL; 375 } 376 377 (*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum]; 378 (*num_maps)++; 379 380 return 0; 381} 382 383static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, 384 struct device_node *node, 385 struct pinctrl_map **map, 386 unsigned *reserved_maps, 387 unsigned *num_maps) 388{ 389 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 390 int num_pins, num_funcs, maps_per_pin, i, err; 391 struct mtk_pinctrl_group *grp; 392 unsigned int num_configs; 393 bool has_config = false; 394 unsigned long *configs; 395 u32 pinfunc, pin, func; 396 struct property *pins; 397 unsigned reserve = 0; 398 399 pins = of_find_property(node, "pinmux", NULL); 400 if (!pins) { 401 dev_err(hw->dev, "missing pins property in node %pOFn .\n", 402 node); 403 return -EINVAL; 404 } 405 406 err = pinconf_generic_parse_dt_config(node, pctldev, &configs, 407 &num_configs); 408 if (err) 409 return err; 410 411 if (num_configs) 412 has_config = true; 413 414 num_pins = pins->length / sizeof(u32); 415 num_funcs = num_pins; 416 maps_per_pin = 0; 417 if (num_funcs) 418 maps_per_pin++; 419 if (has_config && num_pins >= 1) 420 maps_per_pin++; 421 422 if (!num_pins || !maps_per_pin) { 423 err = -EINVAL; 424 goto exit; 425 } 426 427 reserve = num_pins * maps_per_pin; 428 429 err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps, 430 reserve); 431 if (err < 0) 432 goto exit; 433 434 for (i = 0; i < num_pins; i++) { 435 err = of_property_read_u32_index(node, "pinmux", i, &pinfunc); 436 if (err) 437 goto exit; 438 439 pin = MTK_GET_PIN_NO(pinfunc); 440 func = MTK_GET_PIN_FUNC(pinfunc); 441 442 if (pin >= hw->soc->npins || 443 func >= ARRAY_SIZE(mtk_gpio_functions)) { 444 dev_err(hw->dev, "invalid pins value.\n"); 445 err = -EINVAL; 446 goto exit; 447 } 448 449 grp = mtk_pctrl_find_group_by_pin(hw, pin); 450 if (!grp) { 451 dev_err(hw->dev, "unable to match pin %d to group\n", 452 pin); 453 err = -EINVAL; 454 goto exit; 455 } 456 457 err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map, 458 reserved_maps, num_maps); 459 if (err < 0) 460 goto exit; 461 462 if (has_config) { 463 err = pinctrl_utils_add_map_configs(pctldev, map, 464 reserved_maps, 465 num_maps, 466 grp->name, 467 configs, 468 num_configs, 469 PIN_MAP_TYPE_CONFIGS_GROUP); 470 if (err < 0) 471 goto exit; 472 } 473 } 474 475 err = 0; 476 477exit: 478 kfree(configs); 479 return err; 480} 481 482static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev, 483 struct device_node *np_config, 484 struct pinctrl_map **map, 485 unsigned *num_maps) 486{ 487 struct device_node *np; 488 unsigned reserved_maps; 489 int ret; 490 491 *map = NULL; 492 *num_maps = 0; 493 reserved_maps = 0; 494 495 for_each_child_of_node(np_config, np) { 496 ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map, 497 &reserved_maps, 498 num_maps); 499 if (ret < 0) { 500 pinctrl_utils_free_map(pctldev, *map, *num_maps); 501 of_node_put(np); 502 return ret; 503 } 504 } 505 506 return 0; 507} 508 509static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev) 510{ 511 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 512 513 return hw->soc->ngrps; 514} 515 516static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev, 517 unsigned group) 518{ 519 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 520 521 return hw->groups[group].name; 522} 523 524static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev, 525 unsigned group, const unsigned **pins, 526 unsigned *num_pins) 527{ 528 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 529 530 *pins = (unsigned *)&hw->groups[group].pin; 531 *num_pins = 1; 532 533 return 0; 534} 535 536static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field) 537{ 538 const struct mtk_pin_desc *desc; 539 int value, err; 540 541 if (gpio >= hw->soc->npins) 542 return -EINVAL; 543 544 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 545 546 err = mtk_hw_get_value(hw, desc, field, &value); 547 if (err) 548 return err; 549 550 return value; 551} 552 553#define mtk_pctrl_get_pinmux(hw, gpio) \ 554 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE) 555 556#define mtk_pctrl_get_direction(hw, gpio) \ 557 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DIR) 558 559#define mtk_pctrl_get_out(hw, gpio) \ 560 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DO) 561 562#define mtk_pctrl_get_in(hw, gpio) \ 563 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DI) 564 565#define mtk_pctrl_get_smt(hw, gpio) \ 566 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_SMT) 567 568#define mtk_pctrl_get_ies(hw, gpio) \ 569 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_IES) 570 571#define mtk_pctrl_get_driving(hw, gpio) \ 572 mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV) 573 574ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, 575 unsigned int gpio, char *buf, unsigned int bufLen) 576{ 577 int pinmux, pullup = 0, pullen = 0, len = 0, r1 = -1, r0 = -1; 578 const struct mtk_pin_desc *desc; 579 580 if (gpio >= hw->soc->npins) 581 return -EINVAL; 582 583 if (mtk_is_virt_gpio(hw, gpio)) 584 return -EINVAL; 585 586 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 587 pinmux = mtk_pctrl_get_pinmux(hw, gpio); 588 if (pinmux >= hw->soc->nfuncs) 589 pinmux -= hw->soc->nfuncs; 590 591 mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen); 592 if (pullen == MTK_PUPD_SET_R1R0_00) { 593 pullen = 0; 594 r1 = 0; 595 r0 = 0; 596 } else if (pullen == MTK_PUPD_SET_R1R0_01) { 597 pullen = 1; 598 r1 = 0; 599 r0 = 1; 600 } else if (pullen == MTK_PUPD_SET_R1R0_10) { 601 pullen = 1; 602 r1 = 1; 603 r0 = 0; 604 } else if (pullen == MTK_PUPD_SET_R1R0_11) { 605 pullen = 1; 606 r1 = 1; 607 r0 = 1; 608 } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) { 609 pullen = 0; 610 } 611 len += scnprintf(buf + len, bufLen - len, 612 "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d", 613 gpio, 614 pinmux, 615 mtk_pctrl_get_direction(hw, gpio), 616 mtk_pctrl_get_out(hw, gpio), 617 mtk_pctrl_get_in(hw, gpio), 618 mtk_pctrl_get_driving(hw, gpio), 619 mtk_pctrl_get_smt(hw, gpio), 620 mtk_pctrl_get_ies(hw, gpio), 621 pullen, 622 pullup); 623 624 if (r1 != -1) { 625 len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n", 626 r1, r0); 627 } else { 628 len += scnprintf(buf + len, bufLen - len, "\n"); 629 } 630 631 return len; 632} 633EXPORT_SYMBOL_GPL(mtk_pctrl_show_one_pin); 634 635#define PIN_DBG_BUF_SZ 96 636static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 637 unsigned int gpio) 638{ 639 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 640 char buf[PIN_DBG_BUF_SZ] = { 0 }; 641 642 (void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ); 643 644 seq_printf(s, "%s", buf); 645} 646 647static const struct pinctrl_ops mtk_pctlops = { 648 .dt_node_to_map = mtk_pctrl_dt_node_to_map, 649 .dt_free_map = pinctrl_utils_free_map, 650 .get_groups_count = mtk_pctrl_get_groups_count, 651 .get_group_name = mtk_pctrl_get_group_name, 652 .get_group_pins = mtk_pctrl_get_group_pins, 653 .pin_dbg_show = mtk_pctrl_dbg_show, 654}; 655 656static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) 657{ 658 return ARRAY_SIZE(mtk_gpio_functions); 659} 660 661static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev, 662 unsigned selector) 663{ 664 return mtk_gpio_functions[selector]; 665} 666 667static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev, 668 unsigned function, 669 const char * const **groups, 670 unsigned * const num_groups) 671{ 672 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 673 674 *groups = hw->grp_names; 675 *num_groups = hw->soc->ngrps; 676 677 return 0; 678} 679 680static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev, 681 unsigned function, 682 unsigned group) 683{ 684 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 685 struct mtk_pinctrl_group *grp = hw->groups + group; 686 const struct mtk_func_desc *desc_func; 687 const struct mtk_pin_desc *desc; 688 bool ret; 689 690 ret = mtk_pctrl_is_function_valid(hw, grp->pin, function); 691 if (!ret) { 692 dev_err(hw->dev, "invalid function %d on group %d .\n", 693 function, group); 694 return -EINVAL; 695 } 696 697 desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function); 698 if (!desc_func) 699 return -EINVAL; 700 701 desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin]; 702 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval); 703 704 return 0; 705} 706 707static const struct pinmux_ops mtk_pmxops = { 708 .get_functions_count = mtk_pmx_get_funcs_cnt, 709 .get_function_name = mtk_pmx_get_func_name, 710 .get_function_groups = mtk_pmx_get_func_groups, 711 .set_mux = mtk_pmx_set_mux, 712 .gpio_set_direction = mtk_pinmux_gpio_set_direction, 713 .gpio_request_enable = mtk_pinmux_gpio_request_enable, 714}; 715 716static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group, 717 unsigned long *config) 718{ 719 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 720 struct mtk_pinctrl_group *grp = &hw->groups[group]; 721 722 /* One pin per group only */ 723 return mtk_pinconf_get(pctldev, grp->pin, config); 724} 725 726static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, 727 unsigned long *configs, unsigned num_configs) 728{ 729 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 730 struct mtk_pinctrl_group *grp = &hw->groups[group]; 731 int i, ret; 732 733 for (i = 0; i < num_configs; i++) { 734 ret = mtk_pinconf_set(pctldev, grp->pin, 735 pinconf_to_config_param(configs[i]), 736 pinconf_to_config_argument(configs[i])); 737 if (ret < 0) 738 return ret; 739 } 740 741 return 0; 742} 743 744static const struct pinconf_ops mtk_confops = { 745 .pin_config_get = mtk_pinconf_get, 746 .pin_config_group_get = mtk_pconf_group_get, 747 .pin_config_group_set = mtk_pconf_group_set, 748 .is_generic = true, 749}; 750 751static struct pinctrl_desc mtk_desc = { 752 .name = PINCTRL_PINCTRL_DEV, 753 .pctlops = &mtk_pctlops, 754 .pmxops = &mtk_pmxops, 755 .confops = &mtk_confops, 756 .owner = THIS_MODULE, 757}; 758 759static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio) 760{ 761 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 762 const struct mtk_pin_desc *desc; 763 int value, err; 764 765 if (gpio >= hw->soc->npins) 766 return -EINVAL; 767 768 /* 769 * "Virtual" GPIOs are always and only used for interrupts 770 * Since they are only used for interrupts, they are always inputs 771 */ 772 if (mtk_is_virt_gpio(hw, gpio)) 773 return 1; 774 775 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 776 777 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value); 778 if (err) 779 return err; 780 781 if (value) 782 return GPIO_LINE_DIRECTION_OUT; 783 784 return GPIO_LINE_DIRECTION_IN; 785} 786 787static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) 788{ 789 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 790 const struct mtk_pin_desc *desc; 791 int value, err; 792 793 if (gpio >= hw->soc->npins) 794 return -EINVAL; 795 796 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 797 798 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 799 if (err) 800 return err; 801 802 return !!value; 803} 804 805static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) 806{ 807 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 808 const struct mtk_pin_desc *desc; 809 810 if (gpio >= hw->soc->npins) 811 return; 812 813 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 814 815 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); 816} 817 818static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) 819{ 820 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 821 822 if (gpio >= hw->soc->npins) 823 return -EINVAL; 824 825 return pinctrl_gpio_direction_input(chip->base + gpio); 826} 827 828static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, 829 int value) 830{ 831 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 832 833 if (gpio >= hw->soc->npins) 834 return -EINVAL; 835 836 mtk_gpio_set(chip, gpio, value); 837 838 return pinctrl_gpio_direction_output(chip->base + gpio); 839} 840 841static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) 842{ 843 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 844 const struct mtk_pin_desc *desc; 845 846 if (!hw->eint) 847 return -ENOTSUPP; 848 849 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 850 851 if (desc->eint.eint_n == EINT_NA) 852 return -ENOTSUPP; 853 854 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); 855} 856 857static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, 858 unsigned long config) 859{ 860 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 861 const struct mtk_pin_desc *desc; 862 u32 debounce; 863 864 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 865 866 if (!hw->eint || 867 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || 868 desc->eint.eint_n == EINT_NA) 869 return -ENOTSUPP; 870 871 debounce = pinconf_to_config_argument(config); 872 873 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); 874} 875 876static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) 877{ 878 struct gpio_chip *chip = &hw->chip; 879 int ret; 880 881 chip->label = PINCTRL_PINCTRL_DEV; 882 chip->parent = hw->dev; 883 chip->request = gpiochip_generic_request; 884 chip->free = gpiochip_generic_free; 885 chip->get_direction = mtk_gpio_get_direction; 886 chip->direction_input = mtk_gpio_direction_input; 887 chip->direction_output = mtk_gpio_direction_output; 888 chip->get = mtk_gpio_get; 889 chip->set = mtk_gpio_set; 890 chip->to_irq = mtk_gpio_to_irq, 891 chip->set_config = mtk_gpio_set_config, 892 chip->base = -1; 893 chip->ngpio = hw->soc->npins; 894 chip->of_node = np; 895 chip->of_gpio_n_cells = 2; 896 897 ret = gpiochip_add_data(chip, hw); 898 if (ret < 0) 899 return ret; 900 901 return 0; 902} 903 904static int mtk_pctrl_build_state(struct platform_device *pdev) 905{ 906 struct mtk_pinctrl *hw = platform_get_drvdata(pdev); 907 int i; 908 909 /* Allocate groups */ 910 hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, 911 sizeof(*hw->groups), GFP_KERNEL); 912 if (!hw->groups) 913 return -ENOMEM; 914 915 /* We assume that one pin is one group, use pin name as group name. */ 916 hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, 917 sizeof(*hw->grp_names), GFP_KERNEL); 918 if (!hw->grp_names) 919 return -ENOMEM; 920 921 for (i = 0; i < hw->soc->npins; i++) { 922 const struct mtk_pin_desc *pin = hw->soc->pins + i; 923 struct mtk_pinctrl_group *group = hw->groups + i; 924 925 group->name = pin->name; 926 group->pin = pin->number; 927 928 hw->grp_names[i] = pin->name; 929 } 930 931 return 0; 932} 933 934int mtk_paris_pinctrl_probe(struct platform_device *pdev, 935 const struct mtk_pin_soc *soc) 936{ 937 struct pinctrl_pin_desc *pins; 938 struct mtk_pinctrl *hw; 939 int err, i; 940 941 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); 942 if (!hw) 943 return -ENOMEM; 944 945 platform_set_drvdata(pdev, hw); 946 hw->soc = soc; 947 hw->dev = &pdev->dev; 948 949 if (!hw->soc->nbase_names) { 950 dev_err(&pdev->dev, 951 "SoC should be assigned at least one register base\n"); 952 return -EINVAL; 953 } 954 955 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, 956 sizeof(*hw->base), GFP_KERNEL); 957 if (!hw->base) 958 return -ENOMEM; 959 960 for (i = 0; i < hw->soc->nbase_names; i++) { 961 hw->base[i] = devm_platform_ioremap_resource_byname(pdev, 962 hw->soc->base_names[i]); 963 if (IS_ERR(hw->base[i])) 964 return PTR_ERR(hw->base[i]); 965 } 966 967 hw->nbase = hw->soc->nbase_names; 968 969 err = mtk_pctrl_build_state(pdev); 970 if (err) { 971 dev_err(&pdev->dev, "build state failed: %d\n", err); 972 return -EINVAL; 973 } 974 975 /* Copy from internal struct mtk_pin_desc to register to the core */ 976 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), 977 GFP_KERNEL); 978 if (!pins) 979 return -ENOMEM; 980 981 for (i = 0; i < hw->soc->npins; i++) { 982 pins[i].number = hw->soc->pins[i].number; 983 pins[i].name = hw->soc->pins[i].name; 984 } 985 986 /* Setup pins descriptions per SoC types */ 987 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; 988 mtk_desc.npins = hw->soc->npins; 989 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); 990 mtk_desc.custom_params = mtk_custom_bindings; 991#ifdef CONFIG_DEBUG_FS 992 mtk_desc.custom_conf_items = mtk_conf_items; 993#endif 994 995 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, 996 &hw->pctrl); 997 if (err) 998 return err; 999 1000 err = pinctrl_enable(hw->pctrl); 1001 if (err) 1002 return err; 1003 1004 err = mtk_build_eint(hw, pdev); 1005 if (err) 1006 dev_warn(&pdev->dev, 1007 "Failed to add EINT, but pinctrl still can work\n"); 1008 1009 /* Build gpiochip should be after pinctrl_enable is done */ 1010 err = mtk_build_gpiochip(hw, pdev->dev.of_node); 1011 if (err) { 1012 dev_err(&pdev->dev, "Failed to add gpio_chip\n"); 1013 return err; 1014 } 1015 1016 platform_set_drvdata(pdev, hw); 1017 1018 return 0; 1019} 1020EXPORT_SYMBOL_GPL(mtk_paris_pinctrl_probe); 1021 1022static int mtk_paris_pinctrl_suspend(struct device *device) 1023{ 1024 struct mtk_pinctrl *pctl = dev_get_drvdata(device); 1025 1026 return mtk_eint_do_suspend(pctl->eint); 1027} 1028 1029static int mtk_paris_pinctrl_resume(struct device *device) 1030{ 1031 struct mtk_pinctrl *pctl = dev_get_drvdata(device); 1032 1033 return mtk_eint_do_resume(pctl->eint); 1034} 1035 1036const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = { 1037 .suspend_noirq = mtk_paris_pinctrl_suspend, 1038 .resume_noirq = mtk_paris_pinctrl_resume, 1039}; 1040 1041MODULE_LICENSE("GPL v2"); 1042MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Paris"); 1043