18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Based on pinctrl-mt6765.c 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2018 MediaTek Inc. 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Author: ZH Chen <zh.chen@mediatek.com> 88c2ecf20Sopenharmony_ci * 98c2ecf20Sopenharmony_ci * Copyright (C) Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 108c2ecf20Sopenharmony_ci * 118c2ecf20Sopenharmony_ci */ 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#include "pinctrl-mtk-mt6797.h" 148c2ecf20Sopenharmony_ci#include "pinctrl-paris.h" 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci/* 178c2ecf20Sopenharmony_ci * MT6797 have multiple bases to program pin configuration listed as the below: 188c2ecf20Sopenharmony_ci * gpio:0x10005000, iocfg[l]:0x10002000, iocfg[b]:0x10002400, 198c2ecf20Sopenharmony_ci * iocfg[r]:0x10002800, iocfg[t]:0x10002C00. 208c2ecf20Sopenharmony_ci * _i_base could be used to indicate what base the pin should be mapped into. 218c2ecf20Sopenharmony_ci */ 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_cistatic const struct mtk_pin_field_calc mt6797_pin_mode_range[] = { 248c2ecf20Sopenharmony_ci PIN_FIELD(0, 261, 0x300, 0x10, 0, 4), 258c2ecf20Sopenharmony_ci}; 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_cistatic const struct mtk_pin_field_calc mt6797_pin_dir_range[] = { 288c2ecf20Sopenharmony_ci PIN_FIELD(0, 261, 0x0, 0x10, 0, 1), 298c2ecf20Sopenharmony_ci}; 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_cistatic const struct mtk_pin_field_calc mt6797_pin_di_range[] = { 328c2ecf20Sopenharmony_ci PIN_FIELD(0, 261, 0x200, 0x10, 0, 1), 338c2ecf20Sopenharmony_ci}; 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_cistatic const struct mtk_pin_field_calc mt6797_pin_do_range[] = { 368c2ecf20Sopenharmony_ci PIN_FIELD(0, 261, 0x100, 0x10, 0, 1), 378c2ecf20Sopenharmony_ci}; 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_cistatic const struct mtk_pin_reg_calc mt6797_reg_cals[PINCTRL_PIN_REG_MAX] = { 408c2ecf20Sopenharmony_ci [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6797_pin_mode_range), 418c2ecf20Sopenharmony_ci [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6797_pin_dir_range), 428c2ecf20Sopenharmony_ci [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6797_pin_di_range), 438c2ecf20Sopenharmony_ci [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6797_pin_do_range), 448c2ecf20Sopenharmony_ci}; 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_cistatic const char * const mt6797_pinctrl_register_base_names[] = { 478c2ecf20Sopenharmony_ci "gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt", 488c2ecf20Sopenharmony_ci}; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_cistatic const struct mtk_pin_soc mt6797_data = { 518c2ecf20Sopenharmony_ci .reg_cal = mt6797_reg_cals, 528c2ecf20Sopenharmony_ci .pins = mtk_pins_mt6797, 538c2ecf20Sopenharmony_ci .npins = ARRAY_SIZE(mtk_pins_mt6797), 548c2ecf20Sopenharmony_ci .ngrps = ARRAY_SIZE(mtk_pins_mt6797), 558c2ecf20Sopenharmony_ci .gpio_m = 0, 568c2ecf20Sopenharmony_ci .base_names = mt6797_pinctrl_register_base_names, 578c2ecf20Sopenharmony_ci .nbase_names = ARRAY_SIZE(mt6797_pinctrl_register_base_names), 588c2ecf20Sopenharmony_ci}; 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_cistatic const struct of_device_id mt6797_pinctrl_of_match[] = { 618c2ecf20Sopenharmony_ci { .compatible = "mediatek,mt6797-pinctrl", }, 628c2ecf20Sopenharmony_ci { } 638c2ecf20Sopenharmony_ci}; 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_cistatic int mt6797_pinctrl_probe(struct platform_device *pdev) 668c2ecf20Sopenharmony_ci{ 678c2ecf20Sopenharmony_ci return mtk_paris_pinctrl_probe(pdev, &mt6797_data); 688c2ecf20Sopenharmony_ci} 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_cistatic struct platform_driver mt6797_pinctrl_driver = { 718c2ecf20Sopenharmony_ci .driver = { 728c2ecf20Sopenharmony_ci .name = "mt6797-pinctrl", 738c2ecf20Sopenharmony_ci .of_match_table = mt6797_pinctrl_of_match, 748c2ecf20Sopenharmony_ci }, 758c2ecf20Sopenharmony_ci .probe = mt6797_pinctrl_probe, 768c2ecf20Sopenharmony_ci}; 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_cistatic int __init mt6797_pinctrl_init(void) 798c2ecf20Sopenharmony_ci{ 808c2ecf20Sopenharmony_ci return platform_driver_register(&mt6797_pinctrl_driver); 818c2ecf20Sopenharmony_ci} 828c2ecf20Sopenharmony_ciarch_initcall(mt6797_pinctrl_init); 83