1// SPDX-License-Identifier: GPL-2.0 2/* 3 * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding 4 * pinctrl-bindings.txt for MediaTek SoC. 5 * 6 * Copyright (C) 2017-2018 MediaTek Inc. 7 * Author: Sean Wang <sean.wang@mediatek.com> 8 * 9 */ 10 11#include <linux/gpio/driver.h> 12#include "pinctrl-moore.h" 13 14#define PINCTRL_PINCTRL_DEV KBUILD_MODNAME 15 16/* Custom pinconf parameters */ 17#define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) 18#define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) 19#define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) 20#define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) 21 22static const struct pinconf_generic_params mtk_custom_bindings[] = { 23 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, 24 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, 25 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, 26 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, 27}; 28 29#ifdef CONFIG_DEBUG_FS 30static const struct pin_config_item mtk_conf_items[] = { 31 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), 32 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), 33 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), 34 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), 35}; 36#endif 37 38static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev, 39 unsigned int selector, unsigned int group) 40{ 41 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 42 struct function_desc *func; 43 struct group_desc *grp; 44 int i; 45 46 func = pinmux_generic_get_function(pctldev, selector); 47 if (!func) 48 return -EINVAL; 49 50 grp = pinctrl_generic_get_group(pctldev, group); 51 if (!grp) 52 return -EINVAL; 53 54 dev_dbg(pctldev->dev, "enable function %s group %s\n", 55 func->name, grp->name); 56 57 for (i = 0; i < grp->num_pins; i++) { 58 const struct mtk_pin_desc *desc; 59 int *pin_modes = grp->data; 60 int pin = grp->pins[i]; 61 62 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 63 64 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 65 pin_modes[i]); 66 } 67 68 return 0; 69} 70 71static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, 72 struct pinctrl_gpio_range *range, 73 unsigned int pin) 74{ 75 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 76 const struct mtk_pin_desc *desc; 77 78 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 79 80 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 81 hw->soc->gpio_m); 82} 83 84static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, 85 struct pinctrl_gpio_range *range, 86 unsigned int pin, bool input) 87{ 88 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 89 const struct mtk_pin_desc *desc; 90 91 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 92 93 /* hardware would take 0 as input direction */ 94 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); 95} 96 97static int mtk_pinconf_get(struct pinctrl_dev *pctldev, 98 unsigned int pin, unsigned long *config) 99{ 100 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 101 u32 param = pinconf_to_config_param(*config); 102 int val, val2, err, reg, ret = 1; 103 const struct mtk_pin_desc *desc; 104 105 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 106 107 switch (param) { 108 case PIN_CONFIG_BIAS_DISABLE: 109 if (hw->soc->bias_disable_get) { 110 err = hw->soc->bias_disable_get(hw, desc, &ret); 111 if (err) 112 return err; 113 } else { 114 return -ENOTSUPP; 115 } 116 break; 117 case PIN_CONFIG_BIAS_PULL_UP: 118 if (hw->soc->bias_get) { 119 err = hw->soc->bias_get(hw, desc, 1, &ret); 120 if (err) 121 return err; 122 } else { 123 return -ENOTSUPP; 124 } 125 break; 126 case PIN_CONFIG_BIAS_PULL_DOWN: 127 if (hw->soc->bias_get) { 128 err = hw->soc->bias_get(hw, desc, 0, &ret); 129 if (err) 130 return err; 131 } else { 132 return -ENOTSUPP; 133 } 134 break; 135 case PIN_CONFIG_SLEW_RATE: 136 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val); 137 if (err) 138 return err; 139 140 if (!val) 141 return -EINVAL; 142 143 break; 144 case PIN_CONFIG_INPUT_ENABLE: 145 case PIN_CONFIG_OUTPUT_ENABLE: 146 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); 147 if (err) 148 return err; 149 150 /* HW takes input mode as zero; output mode as non-zero */ 151 if ((val && param == PIN_CONFIG_INPUT_ENABLE) || 152 (!val && param == PIN_CONFIG_OUTPUT_ENABLE)) 153 return -EINVAL; 154 155 break; 156 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 157 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); 158 if (err) 159 return err; 160 161 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2); 162 if (err) 163 return err; 164 165 if (val || !val2) 166 return -EINVAL; 167 168 break; 169 case PIN_CONFIG_DRIVE_STRENGTH: 170 if (hw->soc->drive_get) { 171 err = hw->soc->drive_get(hw, desc, &ret); 172 if (err) 173 return err; 174 } else { 175 err = -ENOTSUPP; 176 } 177 break; 178 case MTK_PIN_CONFIG_TDSEL: 179 case MTK_PIN_CONFIG_RDSEL: 180 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 181 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 182 183 err = mtk_hw_get_value(hw, desc, reg, &val); 184 if (err) 185 return err; 186 187 ret = val; 188 189 break; 190 case MTK_PIN_CONFIG_PU_ADV: 191 case MTK_PIN_CONFIG_PD_ADV: 192 if (hw->soc->adv_pull_get) { 193 bool pullup; 194 195 pullup = param == MTK_PIN_CONFIG_PU_ADV; 196 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); 197 if (err) 198 return err; 199 } else { 200 return -ENOTSUPP; 201 } 202 break; 203 default: 204 return -ENOTSUPP; 205 } 206 207 *config = pinconf_to_config_packed(param, ret); 208 209 return 0; 210} 211 212static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 213 unsigned long *configs, unsigned int num_configs) 214{ 215 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 216 const struct mtk_pin_desc *desc; 217 u32 reg, param, arg; 218 int cfg, err = 0; 219 220 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 221 222 for (cfg = 0; cfg < num_configs; cfg++) { 223 param = pinconf_to_config_param(configs[cfg]); 224 arg = pinconf_to_config_argument(configs[cfg]); 225 226 switch (param) { 227 case PIN_CONFIG_BIAS_DISABLE: 228 if (hw->soc->bias_disable_set) { 229 err = hw->soc->bias_disable_set(hw, desc); 230 if (err) 231 return err; 232 } else { 233 return -ENOTSUPP; 234 } 235 break; 236 case PIN_CONFIG_BIAS_PULL_UP: 237 if (hw->soc->bias_set) { 238 err = hw->soc->bias_set(hw, desc, 1); 239 if (err) 240 return err; 241 } else { 242 return -ENOTSUPP; 243 } 244 break; 245 case PIN_CONFIG_BIAS_PULL_DOWN: 246 if (hw->soc->bias_set) { 247 err = hw->soc->bias_set(hw, desc, 0); 248 if (err) 249 return err; 250 } else { 251 return -ENOTSUPP; 252 } 253 break; 254 case PIN_CONFIG_OUTPUT_ENABLE: 255 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 256 MTK_DISABLE); 257 if (err) 258 goto err; 259 260 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 261 MTK_OUTPUT); 262 if (err) 263 goto err; 264 break; 265 case PIN_CONFIG_INPUT_ENABLE: 266 267 if (hw->soc->ies_present) { 268 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, 269 MTK_ENABLE); 270 } 271 272 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 273 MTK_INPUT); 274 if (err) 275 goto err; 276 break; 277 case PIN_CONFIG_SLEW_RATE: 278 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, 279 arg); 280 if (err) 281 goto err; 282 283 break; 284 case PIN_CONFIG_OUTPUT: 285 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 286 MTK_OUTPUT); 287 if (err) 288 goto err; 289 290 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, 291 arg); 292 if (err) 293 goto err; 294 break; 295 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 296 /* arg = 1: Input mode & SMT enable ; 297 * arg = 0: Output mode & SMT disable 298 */ 299 arg = arg ? 2 : 1; 300 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 301 arg & 1); 302 if (err) 303 goto err; 304 305 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 306 !!(arg & 2)); 307 if (err) 308 goto err; 309 break; 310 case PIN_CONFIG_DRIVE_STRENGTH: 311 if (hw->soc->drive_set) { 312 err = hw->soc->drive_set(hw, desc, arg); 313 if (err) 314 return err; 315 } else { 316 err = -ENOTSUPP; 317 } 318 break; 319 case MTK_PIN_CONFIG_TDSEL: 320 case MTK_PIN_CONFIG_RDSEL: 321 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 322 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 323 324 err = mtk_hw_set_value(hw, desc, reg, arg); 325 if (err) 326 goto err; 327 break; 328 case MTK_PIN_CONFIG_PU_ADV: 329 case MTK_PIN_CONFIG_PD_ADV: 330 if (hw->soc->adv_pull_set) { 331 bool pullup; 332 333 pullup = param == MTK_PIN_CONFIG_PU_ADV; 334 err = hw->soc->adv_pull_set(hw, desc, pullup, 335 arg); 336 if (err) 337 return err; 338 } else { 339 return -ENOTSUPP; 340 } 341 break; 342 default: 343 err = -ENOTSUPP; 344 } 345 } 346err: 347 return err; 348} 349 350static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev, 351 unsigned int group, unsigned long *config) 352{ 353 const unsigned int *pins; 354 unsigned int i, npins, old = 0; 355 int ret; 356 357 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); 358 if (ret) 359 return ret; 360 361 for (i = 0; i < npins; i++) { 362 if (mtk_pinconf_get(pctldev, pins[i], config)) 363 return -ENOTSUPP; 364 365 /* configs do not match between two pins */ 366 if (i && old != *config) 367 return -ENOTSUPP; 368 369 old = *config; 370 } 371 372 return 0; 373} 374 375static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev, 376 unsigned int group, unsigned long *configs, 377 unsigned int num_configs) 378{ 379 const unsigned int *pins; 380 unsigned int i, npins; 381 int ret; 382 383 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); 384 if (ret) 385 return ret; 386 387 for (i = 0; i < npins; i++) { 388 ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs); 389 if (ret) 390 return ret; 391 } 392 393 return 0; 394} 395 396static const struct pinctrl_ops mtk_pctlops = { 397 .get_groups_count = pinctrl_generic_get_group_count, 398 .get_group_name = pinctrl_generic_get_group_name, 399 .get_group_pins = pinctrl_generic_get_group_pins, 400 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 401 .dt_free_map = pinconf_generic_dt_free_map, 402}; 403 404static const struct pinmux_ops mtk_pmxops = { 405 .get_functions_count = pinmux_generic_get_function_count, 406 .get_function_name = pinmux_generic_get_function_name, 407 .get_function_groups = pinmux_generic_get_function_groups, 408 .set_mux = mtk_pinmux_set_mux, 409 .gpio_request_enable = mtk_pinmux_gpio_request_enable, 410 .gpio_set_direction = mtk_pinmux_gpio_set_direction, 411 .strict = true, 412}; 413 414static const struct pinconf_ops mtk_confops = { 415 .is_generic = true, 416 .pin_config_get = mtk_pinconf_get, 417 .pin_config_set = mtk_pinconf_set, 418 .pin_config_group_get = mtk_pinconf_group_get, 419 .pin_config_group_set = mtk_pinconf_group_set, 420 .pin_config_config_dbg_show = pinconf_generic_dump_config, 421}; 422 423static struct pinctrl_desc mtk_desc = { 424 .name = PINCTRL_PINCTRL_DEV, 425 .pctlops = &mtk_pctlops, 426 .pmxops = &mtk_pmxops, 427 .confops = &mtk_confops, 428 .owner = THIS_MODULE, 429}; 430 431static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) 432{ 433 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 434 const struct mtk_pin_desc *desc; 435 int value, err; 436 437 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 438 439 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 440 if (err) 441 return err; 442 443 return !!value; 444} 445 446static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) 447{ 448 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 449 const struct mtk_pin_desc *desc; 450 451 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 452 453 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); 454} 455 456static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) 457{ 458 return pinctrl_gpio_direction_input(chip->base + gpio); 459} 460 461static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, 462 int value) 463{ 464 mtk_gpio_set(chip, gpio, value); 465 466 return pinctrl_gpio_direction_output(chip->base + gpio); 467} 468 469static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) 470{ 471 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 472 const struct mtk_pin_desc *desc; 473 474 if (!hw->eint) 475 return -ENOTSUPP; 476 477 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 478 479 if (desc->eint.eint_n == (u16)EINT_NA) 480 return -ENOTSUPP; 481 482 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); 483} 484 485static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, 486 unsigned long config) 487{ 488 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 489 const struct mtk_pin_desc *desc; 490 u32 debounce; 491 492 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 493 494 if (!hw->eint || 495 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || 496 desc->eint.eint_n == (u16)EINT_NA) 497 return -ENOTSUPP; 498 499 debounce = pinconf_to_config_argument(config); 500 501 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); 502} 503 504static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) 505{ 506 struct gpio_chip *chip = &hw->chip; 507 int ret; 508 509 chip->label = PINCTRL_PINCTRL_DEV; 510 chip->parent = hw->dev; 511 chip->request = gpiochip_generic_request; 512 chip->free = gpiochip_generic_free; 513 chip->direction_input = mtk_gpio_direction_input; 514 chip->direction_output = mtk_gpio_direction_output; 515 chip->get = mtk_gpio_get; 516 chip->set = mtk_gpio_set; 517 chip->to_irq = mtk_gpio_to_irq, 518 chip->set_config = mtk_gpio_set_config, 519 chip->base = -1; 520 chip->ngpio = hw->soc->npins; 521 chip->of_node = np; 522 chip->of_gpio_n_cells = 2; 523 524 ret = gpiochip_add_data(chip, hw); 525 if (ret < 0) 526 return ret; 527 528 /* Just for backward compatible for these old pinctrl nodes without 529 * "gpio-ranges" property. Otherwise, called directly from a 530 * DeviceTree-supported pinctrl driver is DEPRECATED. 531 * Please see Section 2.1 of 532 * Documentation/devicetree/bindings/gpio/gpio.txt on how to 533 * bind pinctrl and gpio drivers via the "gpio-ranges" property. 534 */ 535 if (!of_find_property(np, "gpio-ranges", NULL)) { 536 ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, 537 chip->ngpio); 538 if (ret < 0) { 539 gpiochip_remove(chip); 540 return ret; 541 } 542 } 543 544 return 0; 545} 546 547static int mtk_build_groups(struct mtk_pinctrl *hw) 548{ 549 int err, i; 550 551 for (i = 0; i < hw->soc->ngrps; i++) { 552 const struct group_desc *group = hw->soc->grps + i; 553 554 err = pinctrl_generic_add_group(hw->pctrl, group->name, 555 group->pins, group->num_pins, 556 group->data); 557 if (err < 0) { 558 dev_err(hw->dev, "Failed to register group %s\n", 559 group->name); 560 return err; 561 } 562 } 563 564 return 0; 565} 566 567static int mtk_build_functions(struct mtk_pinctrl *hw) 568{ 569 int i, err; 570 571 for (i = 0; i < hw->soc->nfuncs ; i++) { 572 const struct function_desc *func = hw->soc->funcs + i; 573 574 err = pinmux_generic_add_function(hw->pctrl, func->name, 575 func->group_names, 576 func->num_group_names, 577 func->data); 578 if (err < 0) { 579 dev_err(hw->dev, "Failed to register function %s\n", 580 func->name); 581 return err; 582 } 583 } 584 585 return 0; 586} 587 588int mtk_moore_pinctrl_probe(struct platform_device *pdev, 589 const struct mtk_pin_soc *soc) 590{ 591 struct pinctrl_pin_desc *pins; 592 struct mtk_pinctrl *hw; 593 int err, i; 594 595 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); 596 if (!hw) 597 return -ENOMEM; 598 599 hw->soc = soc; 600 hw->dev = &pdev->dev; 601 602 if (!hw->soc->nbase_names) { 603 dev_err(&pdev->dev, 604 "SoC should be assigned at least one register base\n"); 605 return -EINVAL; 606 } 607 608 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, 609 sizeof(*hw->base), GFP_KERNEL); 610 if (!hw->base) 611 return -ENOMEM; 612 613 for (i = 0; i < hw->soc->nbase_names; i++) { 614 hw->base[i] = devm_platform_ioremap_resource_byname(pdev, 615 hw->soc->base_names[i]); 616 if (IS_ERR(hw->base[i])) 617 return PTR_ERR(hw->base[i]); 618 } 619 620 hw->nbase = hw->soc->nbase_names; 621 622 /* Copy from internal struct mtk_pin_desc to register to the core */ 623 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), 624 GFP_KERNEL); 625 if (!pins) 626 return -ENOMEM; 627 628 for (i = 0; i < hw->soc->npins; i++) { 629 pins[i].number = hw->soc->pins[i].number; 630 pins[i].name = hw->soc->pins[i].name; 631 } 632 633 /* Setup pins descriptions per SoC types */ 634 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; 635 mtk_desc.npins = hw->soc->npins; 636 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); 637 mtk_desc.custom_params = mtk_custom_bindings; 638#ifdef CONFIG_DEBUG_FS 639 mtk_desc.custom_conf_items = mtk_conf_items; 640#endif 641 642 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, 643 &hw->pctrl); 644 if (err) 645 return err; 646 647 /* Setup groups descriptions per SoC types */ 648 err = mtk_build_groups(hw); 649 if (err) { 650 dev_err(&pdev->dev, "Failed to build groups\n"); 651 return err; 652 } 653 654 /* Setup functions descriptions per SoC types */ 655 err = mtk_build_functions(hw); 656 if (err) { 657 dev_err(&pdev->dev, "Failed to build functions\n"); 658 return err; 659 } 660 661 /* For able to make pinctrl_claim_hogs, we must not enable pinctrl 662 * until all groups and functions are being added one. 663 */ 664 err = pinctrl_enable(hw->pctrl); 665 if (err) 666 return err; 667 668 err = mtk_build_eint(hw, pdev); 669 if (err) 670 dev_warn(&pdev->dev, 671 "Failed to add EINT, but pinctrl still can work\n"); 672 673 /* Build gpiochip should be after pinctrl_enable is done */ 674 err = mtk_build_gpiochip(hw, pdev->dev.of_node); 675 if (err) { 676 dev_err(&pdev->dev, "Failed to add gpio_chip\n"); 677 return err; 678 } 679 680 platform_set_drvdata(pdev, hw); 681 682 return 0; 683} 684