1// SPDX-License-Identifier: GPL-2.0+ 2// 3// i.MX21 pinctrl driver based on imx pinmux core 4// 5// Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 6 7#include <linux/init.h> 8#include <linux/of.h> 9#include <linux/platform_device.h> 10#include <linux/pinctrl/pinctrl.h> 11 12#include "pinctrl-imx1.h" 13 14#define PAD_ID(port, pin) ((port) * 32 + (pin)) 15#define PA 0 16#define PB 1 17#define PC 2 18#define PD 3 19#define PE 4 20#define PF 5 21 22enum imx21_pads { 23 MX21_PAD_LSCLK = PAD_ID(PA, 5), 24 MX21_PAD_LD0 = PAD_ID(PA, 6), 25 MX21_PAD_LD1 = PAD_ID(PA, 7), 26 MX21_PAD_LD2 = PAD_ID(PA, 8), 27 MX21_PAD_LD3 = PAD_ID(PA, 9), 28 MX21_PAD_LD4 = PAD_ID(PA, 10), 29 MX21_PAD_LD5 = PAD_ID(PA, 11), 30 MX21_PAD_LD6 = PAD_ID(PA, 12), 31 MX21_PAD_LD7 = PAD_ID(PA, 13), 32 MX21_PAD_LD8 = PAD_ID(PA, 14), 33 MX21_PAD_LD9 = PAD_ID(PA, 15), 34 MX21_PAD_LD10 = PAD_ID(PA, 16), 35 MX21_PAD_LD11 = PAD_ID(PA, 17), 36 MX21_PAD_LD12 = PAD_ID(PA, 18), 37 MX21_PAD_LD13 = PAD_ID(PA, 19), 38 MX21_PAD_LD14 = PAD_ID(PA, 20), 39 MX21_PAD_LD15 = PAD_ID(PA, 21), 40 MX21_PAD_LD16 = PAD_ID(PA, 22), 41 MX21_PAD_LD17 = PAD_ID(PA, 23), 42 MX21_PAD_REV = PAD_ID(PA, 24), 43 MX21_PAD_CLS = PAD_ID(PA, 25), 44 MX21_PAD_PS = PAD_ID(PA, 26), 45 MX21_PAD_SPL_SPR = PAD_ID(PA, 27), 46 MX21_PAD_HSYNC = PAD_ID(PA, 28), 47 MX21_PAD_VSYNC = PAD_ID(PA, 29), 48 MX21_PAD_CONTRAST = PAD_ID(PA, 30), 49 MX21_PAD_OE_ACD = PAD_ID(PA, 31), 50 MX21_PAD_SD2_D0 = PAD_ID(PB, 4), 51 MX21_PAD_SD2_D1 = PAD_ID(PB, 5), 52 MX21_PAD_SD2_D2 = PAD_ID(PB, 6), 53 MX21_PAD_SD2_D3 = PAD_ID(PB, 7), 54 MX21_PAD_SD2_CMD = PAD_ID(PB, 8), 55 MX21_PAD_SD2_CLK = PAD_ID(PB, 9), 56 MX21_PAD_CSI_D0 = PAD_ID(PB, 10), 57 MX21_PAD_CSI_D1 = PAD_ID(PB, 11), 58 MX21_PAD_CSI_D2 = PAD_ID(PB, 12), 59 MX21_PAD_CSI_D3 = PAD_ID(PB, 13), 60 MX21_PAD_CSI_D4 = PAD_ID(PB, 14), 61 MX21_PAD_CSI_MCLK = PAD_ID(PB, 15), 62 MX21_PAD_CSI_PIXCLK = PAD_ID(PB, 16), 63 MX21_PAD_CSI_D5 = PAD_ID(PB, 17), 64 MX21_PAD_CSI_D6 = PAD_ID(PB, 18), 65 MX21_PAD_CSI_D7 = PAD_ID(PB, 19), 66 MX21_PAD_CSI_VSYNC = PAD_ID(PB, 20), 67 MX21_PAD_CSI_HSYNC = PAD_ID(PB, 21), 68 MX21_PAD_USB_BYP = PAD_ID(PB, 22), 69 MX21_PAD_USB_PWR = PAD_ID(PB, 23), 70 MX21_PAD_USB_OC = PAD_ID(PB, 24), 71 MX21_PAD_USBH_ON = PAD_ID(PB, 25), 72 MX21_PAD_USBH1_FS = PAD_ID(PB, 26), 73 MX21_PAD_USBH1_OE = PAD_ID(PB, 27), 74 MX21_PAD_USBH1_TXDM = PAD_ID(PB, 28), 75 MX21_PAD_USBH1_TXDP = PAD_ID(PB, 29), 76 MX21_PAD_USBH1_RXDM = PAD_ID(PB, 30), 77 MX21_PAD_USBH1_RXDP = PAD_ID(PB, 31), 78 MX21_PAD_USBG_SDA = PAD_ID(PC, 5), 79 MX21_PAD_USBG_SCL = PAD_ID(PC, 6), 80 MX21_PAD_USBG_ON = PAD_ID(PC, 7), 81 MX21_PAD_USBG_FS = PAD_ID(PC, 8), 82 MX21_PAD_USBG_OE = PAD_ID(PC, 9), 83 MX21_PAD_USBG_TXDM = PAD_ID(PC, 10), 84 MX21_PAD_USBG_TXDP = PAD_ID(PC, 11), 85 MX21_PAD_USBG_RXDM = PAD_ID(PC, 12), 86 MX21_PAD_USBG_RXDP = PAD_ID(PC, 13), 87 MX21_PAD_TOUT = PAD_ID(PC, 14), 88 MX21_PAD_TIN = PAD_ID(PC, 15), 89 MX21_PAD_SAP_FS = PAD_ID(PC, 16), 90 MX21_PAD_SAP_RXD = PAD_ID(PC, 17), 91 MX21_PAD_SAP_TXD = PAD_ID(PC, 18), 92 MX21_PAD_SAP_CLK = PAD_ID(PC, 19), 93 MX21_PAD_SSI1_FS = PAD_ID(PC, 20), 94 MX21_PAD_SSI1_RXD = PAD_ID(PC, 21), 95 MX21_PAD_SSI1_TXD = PAD_ID(PC, 22), 96 MX21_PAD_SSI1_CLK = PAD_ID(PC, 23), 97 MX21_PAD_SSI2_FS = PAD_ID(PC, 24), 98 MX21_PAD_SSI2_RXD = PAD_ID(PC, 25), 99 MX21_PAD_SSI2_TXD = PAD_ID(PC, 26), 100 MX21_PAD_SSI2_CLK = PAD_ID(PC, 27), 101 MX21_PAD_SSI3_FS = PAD_ID(PC, 28), 102 MX21_PAD_SSI3_RXD = PAD_ID(PC, 29), 103 MX21_PAD_SSI3_TXD = PAD_ID(PC, 30), 104 MX21_PAD_SSI3_CLK = PAD_ID(PC, 31), 105 MX21_PAD_I2C_DATA = PAD_ID(PD, 17), 106 MX21_PAD_I2C_CLK = PAD_ID(PD, 18), 107 MX21_PAD_CSPI2_SS2 = PAD_ID(PD, 19), 108 MX21_PAD_CSPI2_SS1 = PAD_ID(PD, 20), 109 MX21_PAD_CSPI2_SS0 = PAD_ID(PD, 21), 110 MX21_PAD_CSPI2_SCLK = PAD_ID(PD, 22), 111 MX21_PAD_CSPI2_MISO = PAD_ID(PD, 23), 112 MX21_PAD_CSPI2_MOSI = PAD_ID(PD, 24), 113 MX21_PAD_CSPI1_RDY = PAD_ID(PD, 25), 114 MX21_PAD_CSPI1_SS2 = PAD_ID(PD, 26), 115 MX21_PAD_CSPI1_SS1 = PAD_ID(PD, 27), 116 MX21_PAD_CSPI1_SS0 = PAD_ID(PD, 28), 117 MX21_PAD_CSPI1_SCLK = PAD_ID(PD, 29), 118 MX21_PAD_CSPI1_MISO = PAD_ID(PD, 30), 119 MX21_PAD_CSPI1_MOSI = PAD_ID(PD, 31), 120 MX21_PAD_TEST_WB2 = PAD_ID(PE, 0), 121 MX21_PAD_TEST_WB1 = PAD_ID(PE, 1), 122 MX21_PAD_TEST_WB0 = PAD_ID(PE, 2), 123 MX21_PAD_UART2_CTS = PAD_ID(PE, 3), 124 MX21_PAD_UART2_RTS = PAD_ID(PE, 4), 125 MX21_PAD_PWMO = PAD_ID(PE, 5), 126 MX21_PAD_UART2_TXD = PAD_ID(PE, 6), 127 MX21_PAD_UART2_RXD = PAD_ID(PE, 7), 128 MX21_PAD_UART3_TXD = PAD_ID(PE, 8), 129 MX21_PAD_UART3_RXD = PAD_ID(PE, 9), 130 MX21_PAD_UART3_CTS = PAD_ID(PE, 10), 131 MX21_PAD_UART3_RTS = PAD_ID(PE, 11), 132 MX21_PAD_UART1_TXD = PAD_ID(PE, 12), 133 MX21_PAD_UART1_RXD = PAD_ID(PE, 13), 134 MX21_PAD_UART1_CTS = PAD_ID(PE, 14), 135 MX21_PAD_UART1_RTS = PAD_ID(PE, 15), 136 MX21_PAD_RTCK = PAD_ID(PE, 16), 137 MX21_PAD_RESET_OUT = PAD_ID(PE, 17), 138 MX21_PAD_SD1_D0 = PAD_ID(PE, 18), 139 MX21_PAD_SD1_D1 = PAD_ID(PE, 19), 140 MX21_PAD_SD1_D2 = PAD_ID(PE, 20), 141 MX21_PAD_SD1_D3 = PAD_ID(PE, 21), 142 MX21_PAD_SD1_CMD = PAD_ID(PE, 22), 143 MX21_PAD_SD1_CLK = PAD_ID(PE, 23), 144 MX21_PAD_NFRB = PAD_ID(PF, 0), 145 MX21_PAD_NFCE = PAD_ID(PF, 1), 146 MX21_PAD_NFWP = PAD_ID(PF, 2), 147 MX21_PAD_NFCLE = PAD_ID(PF, 3), 148 MX21_PAD_NFALE = PAD_ID(PF, 4), 149 MX21_PAD_NFRE = PAD_ID(PF, 5), 150 MX21_PAD_NFWE = PAD_ID(PF, 6), 151 MX21_PAD_NFIO0 = PAD_ID(PF, 7), 152 MX21_PAD_NFIO1 = PAD_ID(PF, 8), 153 MX21_PAD_NFIO2 = PAD_ID(PF, 9), 154 MX21_PAD_NFIO3 = PAD_ID(PF, 10), 155 MX21_PAD_NFIO4 = PAD_ID(PF, 11), 156 MX21_PAD_NFIO5 = PAD_ID(PF, 12), 157 MX21_PAD_NFIO6 = PAD_ID(PF, 13), 158 MX21_PAD_NFIO7 = PAD_ID(PF, 14), 159 MX21_PAD_CLKO = PAD_ID(PF, 15), 160 MX21_PAD_RESERVED = PAD_ID(PF, 16), 161 MX21_PAD_CS4 = PAD_ID(PF, 21), 162 MX21_PAD_CS5 = PAD_ID(PF, 22), 163}; 164 165/* Pad names for the pinmux subsystem */ 166static const struct pinctrl_pin_desc imx21_pinctrl_pads[] = { 167 IMX_PINCTRL_PIN(MX21_PAD_LSCLK), 168 IMX_PINCTRL_PIN(MX21_PAD_LD0), 169 IMX_PINCTRL_PIN(MX21_PAD_LD1), 170 IMX_PINCTRL_PIN(MX21_PAD_LD2), 171 IMX_PINCTRL_PIN(MX21_PAD_LD3), 172 IMX_PINCTRL_PIN(MX21_PAD_LD4), 173 IMX_PINCTRL_PIN(MX21_PAD_LD5), 174 IMX_PINCTRL_PIN(MX21_PAD_LD6), 175 IMX_PINCTRL_PIN(MX21_PAD_LD7), 176 IMX_PINCTRL_PIN(MX21_PAD_LD8), 177 IMX_PINCTRL_PIN(MX21_PAD_LD9), 178 IMX_PINCTRL_PIN(MX21_PAD_LD10), 179 IMX_PINCTRL_PIN(MX21_PAD_LD11), 180 IMX_PINCTRL_PIN(MX21_PAD_LD12), 181 IMX_PINCTRL_PIN(MX21_PAD_LD13), 182 IMX_PINCTRL_PIN(MX21_PAD_LD14), 183 IMX_PINCTRL_PIN(MX21_PAD_LD15), 184 IMX_PINCTRL_PIN(MX21_PAD_LD16), 185 IMX_PINCTRL_PIN(MX21_PAD_LD17), 186 IMX_PINCTRL_PIN(MX21_PAD_REV), 187 IMX_PINCTRL_PIN(MX21_PAD_CLS), 188 IMX_PINCTRL_PIN(MX21_PAD_PS), 189 IMX_PINCTRL_PIN(MX21_PAD_SPL_SPR), 190 IMX_PINCTRL_PIN(MX21_PAD_HSYNC), 191 IMX_PINCTRL_PIN(MX21_PAD_VSYNC), 192 IMX_PINCTRL_PIN(MX21_PAD_CONTRAST), 193 IMX_PINCTRL_PIN(MX21_PAD_OE_ACD), 194 IMX_PINCTRL_PIN(MX21_PAD_SD2_D0), 195 IMX_PINCTRL_PIN(MX21_PAD_SD2_D1), 196 IMX_PINCTRL_PIN(MX21_PAD_SD2_D2), 197 IMX_PINCTRL_PIN(MX21_PAD_SD2_D3), 198 IMX_PINCTRL_PIN(MX21_PAD_SD2_CMD), 199 IMX_PINCTRL_PIN(MX21_PAD_SD2_CLK), 200 IMX_PINCTRL_PIN(MX21_PAD_CSI_D0), 201 IMX_PINCTRL_PIN(MX21_PAD_CSI_D1), 202 IMX_PINCTRL_PIN(MX21_PAD_CSI_D2), 203 IMX_PINCTRL_PIN(MX21_PAD_CSI_D3), 204 IMX_PINCTRL_PIN(MX21_PAD_CSI_D4), 205 IMX_PINCTRL_PIN(MX21_PAD_CSI_MCLK), 206 IMX_PINCTRL_PIN(MX21_PAD_CSI_PIXCLK), 207 IMX_PINCTRL_PIN(MX21_PAD_CSI_D5), 208 IMX_PINCTRL_PIN(MX21_PAD_CSI_D6), 209 IMX_PINCTRL_PIN(MX21_PAD_CSI_D7), 210 IMX_PINCTRL_PIN(MX21_PAD_CSI_VSYNC), 211 IMX_PINCTRL_PIN(MX21_PAD_CSI_HSYNC), 212 IMX_PINCTRL_PIN(MX21_PAD_USB_BYP), 213 IMX_PINCTRL_PIN(MX21_PAD_USB_PWR), 214 IMX_PINCTRL_PIN(MX21_PAD_USB_OC), 215 IMX_PINCTRL_PIN(MX21_PAD_USBH_ON), 216 IMX_PINCTRL_PIN(MX21_PAD_USBH1_FS), 217 IMX_PINCTRL_PIN(MX21_PAD_USBH1_OE), 218 IMX_PINCTRL_PIN(MX21_PAD_USBH1_TXDM), 219 IMX_PINCTRL_PIN(MX21_PAD_USBH1_TXDP), 220 IMX_PINCTRL_PIN(MX21_PAD_USBH1_RXDM), 221 IMX_PINCTRL_PIN(MX21_PAD_USBH1_RXDP), 222 IMX_PINCTRL_PIN(MX21_PAD_USBG_SDA), 223 IMX_PINCTRL_PIN(MX21_PAD_USBG_SCL), 224 IMX_PINCTRL_PIN(MX21_PAD_USBG_ON), 225 IMX_PINCTRL_PIN(MX21_PAD_USBG_FS), 226 IMX_PINCTRL_PIN(MX21_PAD_USBG_OE), 227 IMX_PINCTRL_PIN(MX21_PAD_USBG_TXDM), 228 IMX_PINCTRL_PIN(MX21_PAD_USBG_TXDP), 229 IMX_PINCTRL_PIN(MX21_PAD_USBG_RXDM), 230 IMX_PINCTRL_PIN(MX21_PAD_USBG_RXDP), 231 IMX_PINCTRL_PIN(MX21_PAD_TOUT), 232 IMX_PINCTRL_PIN(MX21_PAD_TIN), 233 IMX_PINCTRL_PIN(MX21_PAD_SAP_FS), 234 IMX_PINCTRL_PIN(MX21_PAD_SAP_RXD), 235 IMX_PINCTRL_PIN(MX21_PAD_SAP_TXD), 236 IMX_PINCTRL_PIN(MX21_PAD_SAP_CLK), 237 IMX_PINCTRL_PIN(MX21_PAD_SSI1_FS), 238 IMX_PINCTRL_PIN(MX21_PAD_SSI1_RXD), 239 IMX_PINCTRL_PIN(MX21_PAD_SSI1_TXD), 240 IMX_PINCTRL_PIN(MX21_PAD_SSI1_CLK), 241 IMX_PINCTRL_PIN(MX21_PAD_SSI2_FS), 242 IMX_PINCTRL_PIN(MX21_PAD_SSI2_RXD), 243 IMX_PINCTRL_PIN(MX21_PAD_SSI2_TXD), 244 IMX_PINCTRL_PIN(MX21_PAD_SSI2_CLK), 245 IMX_PINCTRL_PIN(MX21_PAD_SSI3_FS), 246 IMX_PINCTRL_PIN(MX21_PAD_SSI3_RXD), 247 IMX_PINCTRL_PIN(MX21_PAD_SSI3_TXD), 248 IMX_PINCTRL_PIN(MX21_PAD_SSI3_CLK), 249 IMX_PINCTRL_PIN(MX21_PAD_I2C_DATA), 250 IMX_PINCTRL_PIN(MX21_PAD_I2C_CLK), 251 IMX_PINCTRL_PIN(MX21_PAD_CSPI2_SS2), 252 IMX_PINCTRL_PIN(MX21_PAD_CSPI2_SS1), 253 IMX_PINCTRL_PIN(MX21_PAD_CSPI2_SS0), 254 IMX_PINCTRL_PIN(MX21_PAD_CSPI2_SCLK), 255 IMX_PINCTRL_PIN(MX21_PAD_CSPI2_MISO), 256 IMX_PINCTRL_PIN(MX21_PAD_CSPI2_MOSI), 257 IMX_PINCTRL_PIN(MX21_PAD_CSPI1_RDY), 258 IMX_PINCTRL_PIN(MX21_PAD_CSPI1_SS2), 259 IMX_PINCTRL_PIN(MX21_PAD_CSPI1_SS1), 260 IMX_PINCTRL_PIN(MX21_PAD_CSPI1_SS0), 261 IMX_PINCTRL_PIN(MX21_PAD_CSPI1_SCLK), 262 IMX_PINCTRL_PIN(MX21_PAD_CSPI1_MISO), 263 IMX_PINCTRL_PIN(MX21_PAD_CSPI1_MOSI), 264 IMX_PINCTRL_PIN(MX21_PAD_TEST_WB2), 265 IMX_PINCTRL_PIN(MX21_PAD_TEST_WB1), 266 IMX_PINCTRL_PIN(MX21_PAD_TEST_WB0), 267 IMX_PINCTRL_PIN(MX21_PAD_UART2_CTS), 268 IMX_PINCTRL_PIN(MX21_PAD_UART2_RTS), 269 IMX_PINCTRL_PIN(MX21_PAD_PWMO), 270 IMX_PINCTRL_PIN(MX21_PAD_UART2_TXD), 271 IMX_PINCTRL_PIN(MX21_PAD_UART2_RXD), 272 IMX_PINCTRL_PIN(MX21_PAD_UART3_TXD), 273 IMX_PINCTRL_PIN(MX21_PAD_UART3_RXD), 274 IMX_PINCTRL_PIN(MX21_PAD_UART3_CTS), 275 IMX_PINCTRL_PIN(MX21_PAD_UART3_RTS), 276 IMX_PINCTRL_PIN(MX21_PAD_UART1_TXD), 277 IMX_PINCTRL_PIN(MX21_PAD_UART1_RXD), 278 IMX_PINCTRL_PIN(MX21_PAD_UART1_CTS), 279 IMX_PINCTRL_PIN(MX21_PAD_UART1_RTS), 280 IMX_PINCTRL_PIN(MX21_PAD_RTCK), 281 IMX_PINCTRL_PIN(MX21_PAD_RESET_OUT), 282 IMX_PINCTRL_PIN(MX21_PAD_SD1_D0), 283 IMX_PINCTRL_PIN(MX21_PAD_SD1_D1), 284 IMX_PINCTRL_PIN(MX21_PAD_SD1_D2), 285 IMX_PINCTRL_PIN(MX21_PAD_SD1_D3), 286 IMX_PINCTRL_PIN(MX21_PAD_SD1_CMD), 287 IMX_PINCTRL_PIN(MX21_PAD_SD1_CLK), 288 IMX_PINCTRL_PIN(MX21_PAD_NFRB), 289 IMX_PINCTRL_PIN(MX21_PAD_NFCE), 290 IMX_PINCTRL_PIN(MX21_PAD_NFWP), 291 IMX_PINCTRL_PIN(MX21_PAD_NFCLE), 292 IMX_PINCTRL_PIN(MX21_PAD_NFALE), 293 IMX_PINCTRL_PIN(MX21_PAD_NFRE), 294 IMX_PINCTRL_PIN(MX21_PAD_NFWE), 295 IMX_PINCTRL_PIN(MX21_PAD_NFIO0), 296 IMX_PINCTRL_PIN(MX21_PAD_NFIO1), 297 IMX_PINCTRL_PIN(MX21_PAD_NFIO2), 298 IMX_PINCTRL_PIN(MX21_PAD_NFIO3), 299 IMX_PINCTRL_PIN(MX21_PAD_NFIO4), 300 IMX_PINCTRL_PIN(MX21_PAD_NFIO5), 301 IMX_PINCTRL_PIN(MX21_PAD_NFIO6), 302 IMX_PINCTRL_PIN(MX21_PAD_NFIO7), 303 IMX_PINCTRL_PIN(MX21_PAD_CLKO), 304 IMX_PINCTRL_PIN(MX21_PAD_RESERVED), 305 IMX_PINCTRL_PIN(MX21_PAD_CS4), 306 IMX_PINCTRL_PIN(MX21_PAD_CS5), 307}; 308 309static struct imx1_pinctrl_soc_info imx21_pinctrl_info = { 310 .pins = imx21_pinctrl_pads, 311 .npins = ARRAY_SIZE(imx21_pinctrl_pads), 312}; 313 314static int __init imx21_pinctrl_probe(struct platform_device *pdev) 315{ 316 return imx1_pinctrl_core_probe(pdev, &imx21_pinctrl_info); 317} 318 319static const struct of_device_id imx21_pinctrl_of_match[] = { 320 { .compatible = "fsl,imx21-iomuxc", }, 321 { } 322}; 323 324static struct platform_driver imx21_pinctrl_driver = { 325 .driver = { 326 .name = "imx21-pinctrl", 327 .of_match_table = imx21_pinctrl_of_match, 328 }, 329}; 330builtin_platform_driver_probe(imx21_pinctrl_driver, imx21_pinctrl_probe); 331