1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Pinctrl for Cirrus Logic Madera codecs 4 * 5 * Copyright (C) 2016-2018 Cirrus Logic 6 */ 7 8#include <linux/err.h> 9#include <linux/module.h> 10#include <linux/platform_device.h> 11#include <linux/regmap.h> 12#include <linux/slab.h> 13#include <linux/pinctrl/machine.h> 14#include <linux/pinctrl/pinctrl.h> 15#include <linux/pinctrl/pinmux.h> 16#include <linux/pinctrl/pinconf.h> 17#include <linux/pinctrl/pinconf-generic.h> 18 19#include <linux/mfd/madera/core.h> 20#include <linux/mfd/madera/registers.h> 21 22#include "../pinctrl-utils.h" 23 24#include "pinctrl-madera.h" 25 26/* 27 * Use pin GPIO names for consistency 28 * NOTE: IDs are zero-indexed for coding convenience 29 */ 30static const struct pinctrl_pin_desc madera_pins[] = { 31 PINCTRL_PIN(0, "gpio1"), 32 PINCTRL_PIN(1, "gpio2"), 33 PINCTRL_PIN(2, "gpio3"), 34 PINCTRL_PIN(3, "gpio4"), 35 PINCTRL_PIN(4, "gpio5"), 36 PINCTRL_PIN(5, "gpio6"), 37 PINCTRL_PIN(6, "gpio7"), 38 PINCTRL_PIN(7, "gpio8"), 39 PINCTRL_PIN(8, "gpio9"), 40 PINCTRL_PIN(9, "gpio10"), 41 PINCTRL_PIN(10, "gpio11"), 42 PINCTRL_PIN(11, "gpio12"), 43 PINCTRL_PIN(12, "gpio13"), 44 PINCTRL_PIN(13, "gpio14"), 45 PINCTRL_PIN(14, "gpio15"), 46 PINCTRL_PIN(15, "gpio16"), 47 PINCTRL_PIN(16, "gpio17"), 48 PINCTRL_PIN(17, "gpio18"), 49 PINCTRL_PIN(18, "gpio19"), 50 PINCTRL_PIN(19, "gpio20"), 51 PINCTRL_PIN(20, "gpio21"), 52 PINCTRL_PIN(21, "gpio22"), 53 PINCTRL_PIN(22, "gpio23"), 54 PINCTRL_PIN(23, "gpio24"), 55 PINCTRL_PIN(24, "gpio25"), 56 PINCTRL_PIN(25, "gpio26"), 57 PINCTRL_PIN(26, "gpio27"), 58 PINCTRL_PIN(27, "gpio28"), 59 PINCTRL_PIN(28, "gpio29"), 60 PINCTRL_PIN(29, "gpio30"), 61 PINCTRL_PIN(30, "gpio31"), 62 PINCTRL_PIN(31, "gpio32"), 63 PINCTRL_PIN(32, "gpio33"), 64 PINCTRL_PIN(33, "gpio34"), 65 PINCTRL_PIN(34, "gpio35"), 66 PINCTRL_PIN(35, "gpio36"), 67 PINCTRL_PIN(36, "gpio37"), 68 PINCTRL_PIN(37, "gpio38"), 69 PINCTRL_PIN(38, "gpio39"), 70 PINCTRL_PIN(39, "gpio40"), 71}; 72 73/* 74 * All single-pin functions can be mapped to any GPIO, however pinmux applies 75 * functions to pin groups and only those groups declared as supporting that 76 * function. To make this work we must put each pin in its own dummy group so 77 * that the functions can be described as applying to all pins. 78 * Since these do not correspond to anything in the actual hardware - they are 79 * merely an adaptation to pinctrl's view of the world - we use the same name 80 * as the pin to avoid confusion when comparing with datasheet instructions 81 */ 82static const char * const madera_pin_single_group_names[] = { 83 "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 84 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 85 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 86 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 87 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 88 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", 89}; 90 91/* set of pin numbers for single-pin groups, zero-indexed */ 92static const unsigned int madera_pin_single_group_pins[] = { 93 0, 1, 2, 3, 4, 5, 6, 94 7, 8, 9, 10, 11, 12, 13, 95 14, 15, 16, 17, 18, 19, 20, 96 21, 22, 23, 24, 25, 26, 27, 97 28, 29, 30, 31, 32, 33, 34, 98 35, 36, 37, 38, 39, 99}; 100 101static const char * const madera_aif1_group_names[] = { "aif1" }; 102static const char * const madera_aif2_group_names[] = { "aif2" }; 103static const char * const madera_aif3_group_names[] = { "aif3" }; 104static const char * const madera_aif4_group_names[] = { "aif4" }; 105static const char * const madera_mif1_group_names[] = { "mif1" }; 106static const char * const madera_mif2_group_names[] = { "mif2" }; 107static const char * const madera_mif3_group_names[] = { "mif3" }; 108static const char * const madera_dmic3_group_names[] = { "dmic3" }; 109static const char * const madera_dmic4_group_names[] = { "dmic4" }; 110static const char * const madera_dmic5_group_names[] = { "dmic5" }; 111static const char * const madera_dmic6_group_names[] = { "dmic6" }; 112static const char * const madera_spk1_group_names[] = { "pdmspk1" }; 113static const char * const madera_spk2_group_names[] = { "pdmspk2" }; 114 115/* 116 * alt-functions always apply to a single pin group, other functions always 117 * apply to all pins 118 */ 119static const struct { 120 const char *name; 121 const char * const *group_names; 122 u32 func; 123} madera_mux_funcs[] = { 124 { 125 .name = "aif1", 126 .group_names = madera_aif1_group_names, 127 .func = 0x000 128 }, 129 { 130 .name = "aif2", 131 .group_names = madera_aif2_group_names, 132 .func = 0x000 133 }, 134 { 135 .name = "aif3", 136 .group_names = madera_aif3_group_names, 137 .func = 0x000 138 }, 139 { 140 .name = "aif4", 141 .group_names = madera_aif4_group_names, 142 .func = 0x000 143 }, 144 { 145 .name = "mif1", 146 .group_names = madera_mif1_group_names, 147 .func = 0x000 148 }, 149 { 150 .name = "mif2", 151 .group_names = madera_mif2_group_names, 152 .func = 0x000 153 }, 154 { 155 .name = "mif3", 156 .group_names = madera_mif3_group_names, 157 .func = 0x000 158 }, 159 { 160 .name = "dmic3", 161 .group_names = madera_dmic3_group_names, 162 .func = 0x000 163 }, 164 { 165 .name = "dmic4", 166 .group_names = madera_dmic4_group_names, 167 .func = 0x000 168 }, 169 { 170 .name = "dmic5", 171 .group_names = madera_dmic5_group_names, 172 .func = 0x000 173 }, 174 { 175 .name = "dmic6", 176 .group_names = madera_dmic6_group_names, 177 .func = 0x000 178 }, 179 { 180 .name = "pdmspk1", 181 .group_names = madera_spk1_group_names, 182 .func = 0x000 183 }, 184 { 185 .name = "pdmspk2", 186 .group_names = madera_spk2_group_names, 187 .func = 0x000 188 }, 189 { 190 .name = "io", 191 .group_names = madera_pin_single_group_names, 192 .func = 0x001 193 }, 194 { 195 .name = "dsp-gpio", 196 .group_names = madera_pin_single_group_names, 197 .func = 0x002 198 }, 199 { 200 .name = "irq1", 201 .group_names = madera_pin_single_group_names, 202 .func = 0x003 203 }, 204 { 205 .name = "irq2", 206 .group_names = madera_pin_single_group_names, 207 .func = 0x004 208 }, 209 { 210 .name = "fll1-clk", 211 .group_names = madera_pin_single_group_names, 212 .func = 0x010 213 }, 214 { 215 .name = "fll2-clk", 216 .group_names = madera_pin_single_group_names, 217 .func = 0x011 218 }, 219 { 220 .name = "fll3-clk", 221 .group_names = madera_pin_single_group_names, 222 .func = 0x012 223 }, 224 { 225 .name = "fllao-clk", 226 .group_names = madera_pin_single_group_names, 227 .func = 0x013 228 }, 229 { 230 .name = "fll1-lock", 231 .group_names = madera_pin_single_group_names, 232 .func = 0x018 233 }, 234 { 235 .name = "fll2-lock", 236 .group_names = madera_pin_single_group_names, 237 .func = 0x019 238 }, 239 { 240 .name = "fll3-lock", 241 .group_names = madera_pin_single_group_names, 242 .func = 0x01a 243 }, 244 { 245 .name = "fllao-lock", 246 .group_names = madera_pin_single_group_names, 247 .func = 0x01b 248 }, 249 { 250 .name = "opclk", 251 .group_names = madera_pin_single_group_names, 252 .func = 0x040 253 }, 254 { 255 .name = "opclk-async", 256 .group_names = madera_pin_single_group_names, 257 .func = 0x041 258 }, 259 { 260 .name = "pwm1", 261 .group_names = madera_pin_single_group_names, 262 .func = 0x048 263 }, 264 { 265 .name = "pwm2", 266 .group_names = madera_pin_single_group_names, 267 .func = 0x049 268 }, 269 { 270 .name = "spdif", 271 .group_names = madera_pin_single_group_names, 272 .func = 0x04c 273 }, 274 { 275 .name = "asrc1-in1-lock", 276 .group_names = madera_pin_single_group_names, 277 .func = 0x088 278 }, 279 { 280 .name = "asrc1-in2-lock", 281 .group_names = madera_pin_single_group_names, 282 .func = 0x089 283 }, 284 { 285 .name = "asrc2-in1-lock", 286 .group_names = madera_pin_single_group_names, 287 .func = 0x08a 288 }, 289 { 290 .name = "asrc2-in2-lock", 291 .group_names = madera_pin_single_group_names, 292 .func = 0x08b 293 }, 294 { 295 .name = "spkl-short-circuit", 296 .group_names = madera_pin_single_group_names, 297 .func = 0x0b6 298 }, 299 { 300 .name = "spkr-short-circuit", 301 .group_names = madera_pin_single_group_names, 302 .func = 0x0b7 303 }, 304 { 305 .name = "spk-shutdown", 306 .group_names = madera_pin_single_group_names, 307 .func = 0x0e0 308 }, 309 { 310 .name = "spk-overheat-shutdown", 311 .group_names = madera_pin_single_group_names, 312 .func = 0x0e1 313 }, 314 { 315 .name = "spk-overheat-warn", 316 .group_names = madera_pin_single_group_names, 317 .func = 0x0e2 318 }, 319 { 320 .name = "timer1-sts", 321 .group_names = madera_pin_single_group_names, 322 .func = 0x140 323 }, 324 { 325 .name = "timer2-sts", 326 .group_names = madera_pin_single_group_names, 327 .func = 0x141 328 }, 329 { 330 .name = "timer3-sts", 331 .group_names = madera_pin_single_group_names, 332 .func = 0x142 333 }, 334 { 335 .name = "timer4-sts", 336 .group_names = madera_pin_single_group_names, 337 .func = 0x143 338 }, 339 { 340 .name = "timer5-sts", 341 .group_names = madera_pin_single_group_names, 342 .func = 0x144 343 }, 344 { 345 .name = "timer6-sts", 346 .group_names = madera_pin_single_group_names, 347 .func = 0x145 348 }, 349 { 350 .name = "timer7-sts", 351 .group_names = madera_pin_single_group_names, 352 .func = 0x146 353 }, 354 { 355 .name = "timer8-sts", 356 .group_names = madera_pin_single_group_names, 357 .func = 0x147 358 }, 359 { 360 .name = "log1-fifo-ne", 361 .group_names = madera_pin_single_group_names, 362 .func = 0x150 363 }, 364 { 365 .name = "log2-fifo-ne", 366 .group_names = madera_pin_single_group_names, 367 .func = 0x151 368 }, 369 { 370 .name = "log3-fifo-ne", 371 .group_names = madera_pin_single_group_names, 372 .func = 0x152 373 }, 374 { 375 .name = "log4-fifo-ne", 376 .group_names = madera_pin_single_group_names, 377 .func = 0x153 378 }, 379 { 380 .name = "log5-fifo-ne", 381 .group_names = madera_pin_single_group_names, 382 .func = 0x154 383 }, 384 { 385 .name = "log6-fifo-ne", 386 .group_names = madera_pin_single_group_names, 387 .func = 0x155 388 }, 389 { 390 .name = "log7-fifo-ne", 391 .group_names = madera_pin_single_group_names, 392 .func = 0x156 393 }, 394 { 395 .name = "log8-fifo-ne", 396 .group_names = madera_pin_single_group_names, 397 .func = 0x157 398 }, 399 { 400 .name = "aux-pdm-clk", 401 .group_names = madera_pin_single_group_names, 402 .func = 0x280 403 }, 404 { 405 .name = "aux-pdm-dat", 406 .group_names = madera_pin_single_group_names, 407 .func = 0x281 408 }, 409}; 410 411static u16 madera_pin_make_drv_str(struct madera_pin_private *priv, 412 unsigned int milliamps) 413{ 414 switch (milliamps) { 415 case 4: 416 return 0; 417 case 8: 418 return 2 << MADERA_GP1_DRV_STR_SHIFT; 419 default: 420 break; 421 } 422 423 dev_warn(priv->dev, "%u mA not a valid drive strength", milliamps); 424 425 return 0; 426} 427 428static unsigned int madera_pin_unmake_drv_str(struct madera_pin_private *priv, 429 u16 regval) 430{ 431 regval = (regval & MADERA_GP1_DRV_STR_MASK) >> MADERA_GP1_DRV_STR_SHIFT; 432 433 switch (regval) { 434 case 0: 435 return 4; 436 case 2: 437 return 8; 438 default: 439 return 0; 440 } 441} 442 443static int madera_get_groups_count(struct pinctrl_dev *pctldev) 444{ 445 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 446 447 /* Number of alt function groups plus number of single-pin groups */ 448 return priv->chip->n_pin_groups + priv->chip->n_pins; 449} 450 451static const char *madera_get_group_name(struct pinctrl_dev *pctldev, 452 unsigned int selector) 453{ 454 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 455 456 if (selector < priv->chip->n_pin_groups) 457 return priv->chip->pin_groups[selector].name; 458 459 selector -= priv->chip->n_pin_groups; 460 return madera_pin_single_group_names[selector]; 461} 462 463static int madera_get_group_pins(struct pinctrl_dev *pctldev, 464 unsigned int selector, 465 const unsigned int **pins, 466 unsigned int *num_pins) 467{ 468 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 469 470 if (selector < priv->chip->n_pin_groups) { 471 *pins = priv->chip->pin_groups[selector].pins; 472 *num_pins = priv->chip->pin_groups[selector].n_pins; 473 } else { 474 /* return the dummy group for a single pin */ 475 selector -= priv->chip->n_pin_groups; 476 *pins = &madera_pin_single_group_pins[selector]; 477 *num_pins = 1; 478 } 479 return 0; 480} 481 482static void madera_pin_dbg_show_fn(struct madera_pin_private *priv, 483 struct seq_file *s, 484 unsigned int pin, unsigned int fn) 485{ 486 const struct madera_pin_chip *chip = priv->chip; 487 int i, g_pin; 488 489 if (fn != 0) { 490 for (i = 0; i < ARRAY_SIZE(madera_mux_funcs); ++i) { 491 if (madera_mux_funcs[i].func == fn) { 492 seq_printf(s, " FN=%s", 493 madera_mux_funcs[i].name); 494 return; 495 } 496 } 497 return; /* ignore unknown function values */ 498 } 499 500 /* alt function */ 501 for (i = 0; i < chip->n_pin_groups; ++i) { 502 for (g_pin = 0; g_pin < chip->pin_groups[i].n_pins; ++g_pin) { 503 if (chip->pin_groups[i].pins[g_pin] == pin) { 504 seq_printf(s, " FN=%s", 505 chip->pin_groups[i].name); 506 return; 507 } 508 } 509 } 510} 511 512static void __maybe_unused madera_pin_dbg_show(struct pinctrl_dev *pctldev, 513 struct seq_file *s, 514 unsigned int pin) 515{ 516 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 517 unsigned int conf[2]; 518 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); 519 unsigned int fn; 520 int ret; 521 522 ret = regmap_read(priv->madera->regmap, reg, &conf[0]); 523 if (ret) 524 return; 525 526 ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]); 527 if (ret) 528 return; 529 530 seq_printf(s, "%04x:%04x", conf[0], conf[1]); 531 532 fn = (conf[0] & MADERA_GP1_FN_MASK) >> MADERA_GP1_FN_SHIFT; 533 madera_pin_dbg_show_fn(priv, s, pin, fn); 534 535 /* State of direction bit is only relevant if function==1 */ 536 if (fn == 1) { 537 if (conf[1] & MADERA_GP1_DIR_MASK) 538 seq_puts(s, " IN"); 539 else 540 seq_puts(s, " OUT"); 541 } 542 543 if (conf[1] & MADERA_GP1_PU_MASK) 544 seq_puts(s, " PU"); 545 546 if (conf[1] & MADERA_GP1_PD_MASK) 547 seq_puts(s, " PD"); 548 549 if (conf[0] & MADERA_GP1_DB_MASK) 550 seq_puts(s, " DB"); 551 552 if (conf[0] & MADERA_GP1_OP_CFG_MASK) 553 seq_puts(s, " OD"); 554 else 555 seq_puts(s, " CMOS"); 556 557 seq_printf(s, " DRV=%umA", madera_pin_unmake_drv_str(priv, conf[1])); 558 559 if (conf[0] & MADERA_GP1_IP_CFG_MASK) 560 seq_puts(s, " SCHMITT"); 561} 562 563static const struct pinctrl_ops madera_pin_group_ops = { 564 .get_groups_count = madera_get_groups_count, 565 .get_group_name = madera_get_group_name, 566 .get_group_pins = madera_get_group_pins, 567#if IS_ENABLED(CONFIG_OF) 568 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 569 .dt_free_map = pinctrl_utils_free_map, 570#endif 571#if IS_ENABLED(CONFIG_DEBUG_FS) 572 .pin_dbg_show = madera_pin_dbg_show, 573#endif 574}; 575 576static int madera_mux_get_funcs_count(struct pinctrl_dev *pctldev) 577{ 578 return ARRAY_SIZE(madera_mux_funcs); 579} 580 581static const char *madera_mux_get_func_name(struct pinctrl_dev *pctldev, 582 unsigned int selector) 583{ 584 return madera_mux_funcs[selector].name; 585} 586 587static int madera_mux_get_groups(struct pinctrl_dev *pctldev, 588 unsigned int selector, 589 const char * const **groups, 590 unsigned int * const num_groups) 591{ 592 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 593 594 *groups = madera_mux_funcs[selector].group_names; 595 596 if (madera_mux_funcs[selector].func == 0) { 597 /* alt func always maps to a single group */ 598 *num_groups = 1; 599 } else { 600 /* other funcs map to all available gpio pins */ 601 *num_groups = priv->chip->n_pins; 602 } 603 604 return 0; 605} 606 607static int madera_mux_set_mux(struct pinctrl_dev *pctldev, 608 unsigned int selector, 609 unsigned int group) 610{ 611 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 612 struct madera *madera = priv->madera; 613 const struct madera_pin_groups *pin_group = priv->chip->pin_groups; 614 unsigned int n_chip_groups = priv->chip->n_pin_groups; 615 const char *func_name = madera_mux_funcs[selector].name; 616 unsigned int reg; 617 int i, ret = 0; 618 619 dev_dbg(priv->dev, "%s selecting %u (%s) for group %u (%s)\n", 620 __func__, selector, func_name, group, 621 madera_get_group_name(pctldev, group)); 622 623 if (madera_mux_funcs[selector].func == 0) { 624 /* alt func pin assignments are codec-specific */ 625 for (i = 0; i < n_chip_groups; ++i) { 626 if (strcmp(func_name, pin_group->name) == 0) 627 break; 628 629 ++pin_group; 630 } 631 632 if (i == n_chip_groups) 633 return -EINVAL; 634 635 for (i = 0; i < pin_group->n_pins; ++i) { 636 reg = MADERA_GPIO1_CTRL_1 + (2 * pin_group->pins[i]); 637 638 dev_dbg(priv->dev, "%s setting 0x%x func bits to 0\n", 639 __func__, reg); 640 641 ret = regmap_update_bits(madera->regmap, reg, 642 MADERA_GP1_FN_MASK, 0); 643 if (ret) 644 break; 645 646 } 647 } else { 648 /* 649 * for other funcs the group will be the gpio number and will 650 * be offset by the number of chip-specific functions at the 651 * start of the group list 652 */ 653 group -= n_chip_groups; 654 reg = MADERA_GPIO1_CTRL_1 + (2 * group); 655 656 dev_dbg(priv->dev, "%s setting 0x%x func bits to 0x%x\n", 657 __func__, reg, madera_mux_funcs[selector].func); 658 659 ret = regmap_update_bits(madera->regmap, 660 reg, 661 MADERA_GP1_FN_MASK, 662 madera_mux_funcs[selector].func); 663 } 664 665 if (ret) 666 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); 667 668 return ret; 669} 670 671static int madera_gpio_set_direction(struct pinctrl_dev *pctldev, 672 struct pinctrl_gpio_range *range, 673 unsigned int offset, 674 bool input) 675{ 676 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 677 struct madera *madera = priv->madera; 678 unsigned int reg = MADERA_GPIO1_CTRL_2 + (2 * offset); 679 unsigned int val; 680 int ret; 681 682 if (input) 683 val = MADERA_GP1_DIR; 684 else 685 val = 0; 686 687 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_DIR_MASK, val); 688 if (ret) 689 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); 690 691 return ret; 692} 693 694static int madera_gpio_request_enable(struct pinctrl_dev *pctldev, 695 struct pinctrl_gpio_range *range, 696 unsigned int offset) 697{ 698 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 699 struct madera *madera = priv->madera; 700 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset); 701 int ret; 702 703 /* put the pin into GPIO mode */ 704 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1); 705 if (ret) 706 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); 707 708 return ret; 709} 710 711static void madera_gpio_disable_free(struct pinctrl_dev *pctldev, 712 struct pinctrl_gpio_range *range, 713 unsigned int offset) 714{ 715 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 716 struct madera *madera = priv->madera; 717 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset); 718 int ret; 719 720 /* disable GPIO by setting to GPIO IN */ 721 madera_gpio_set_direction(pctldev, range, offset, true); 722 723 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1); 724 if (ret) 725 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); 726} 727 728static const struct pinmux_ops madera_pin_mux_ops = { 729 .get_functions_count = madera_mux_get_funcs_count, 730 .get_function_name = madera_mux_get_func_name, 731 .get_function_groups = madera_mux_get_groups, 732 .set_mux = madera_mux_set_mux, 733 .gpio_request_enable = madera_gpio_request_enable, 734 .gpio_disable_free = madera_gpio_disable_free, 735 .gpio_set_direction = madera_gpio_set_direction, 736 .strict = true, /* GPIO and other functions are exclusive */ 737}; 738 739static int madera_pin_conf_get(struct pinctrl_dev *pctldev, unsigned int pin, 740 unsigned long *config) 741{ 742 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 743 unsigned int param = pinconf_to_config_param(*config); 744 unsigned int result = 0; 745 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); 746 unsigned int conf[2]; 747 int ret; 748 749 ret = regmap_read(priv->madera->regmap, reg, &conf[0]); 750 if (!ret) 751 ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]); 752 753 if (ret) { 754 dev_err(priv->dev, "Failed to read GP%d conf (%d)\n", 755 pin + 1, ret); 756 return ret; 757 } 758 759 switch (param) { 760 case PIN_CONFIG_BIAS_BUS_HOLD: 761 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 762 if (conf[1] == (MADERA_GP1_PU | MADERA_GP1_PD)) 763 result = 1; 764 break; 765 case PIN_CONFIG_BIAS_DISABLE: 766 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 767 if (!conf[1]) 768 result = 1; 769 break; 770 case PIN_CONFIG_BIAS_PULL_DOWN: 771 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 772 if (conf[1] == MADERA_GP1_PD_MASK) 773 result = 1; 774 break; 775 case PIN_CONFIG_BIAS_PULL_UP: 776 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 777 if (conf[1] == MADERA_GP1_PU_MASK) 778 result = 1; 779 break; 780 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 781 if (conf[0] & MADERA_GP1_OP_CFG_MASK) 782 result = 1; 783 break; 784 case PIN_CONFIG_DRIVE_PUSH_PULL: 785 if (!(conf[0] & MADERA_GP1_OP_CFG_MASK)) 786 result = 1; 787 break; 788 case PIN_CONFIG_DRIVE_STRENGTH: 789 result = madera_pin_unmake_drv_str(priv, conf[1]); 790 break; 791 case PIN_CONFIG_INPUT_DEBOUNCE: 792 if (conf[0] & MADERA_GP1_DB_MASK) 793 result = 1; 794 break; 795 case PIN_CONFIG_INPUT_ENABLE: 796 if (conf[0] & MADERA_GP1_DIR_MASK) 797 result = 1; 798 break; 799 case PIN_CONFIG_INPUT_SCHMITT: 800 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 801 if (conf[0] & MADERA_GP1_IP_CFG_MASK) 802 result = 1; 803 break; 804 case PIN_CONFIG_OUTPUT: 805 if ((conf[1] & MADERA_GP1_DIR_MASK) && 806 (conf[0] & MADERA_GP1_LVL_MASK)) 807 result = 1; 808 break; 809 default: 810 return -ENOTSUPP; 811 } 812 813 *config = pinconf_to_config_packed(param, result); 814 815 return 0; 816} 817 818static int madera_pin_conf_set(struct pinctrl_dev *pctldev, unsigned int pin, 819 unsigned long *configs, unsigned int num_configs) 820{ 821 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 822 u16 conf[2] = {0, 0}; 823 u16 mask[2] = {0, 0}; 824 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); 825 unsigned int val; 826 int ret; 827 828 while (num_configs) { 829 dev_dbg(priv->dev, "%s config 0x%lx\n", __func__, *configs); 830 831 switch (pinconf_to_config_param(*configs)) { 832 case PIN_CONFIG_BIAS_BUS_HOLD: 833 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 834 conf[1] |= MADERA_GP1_PU | MADERA_GP1_PD; 835 break; 836 case PIN_CONFIG_BIAS_DISABLE: 837 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 838 conf[1] &= ~(MADERA_GP1_PU | MADERA_GP1_PD); 839 break; 840 case PIN_CONFIG_BIAS_PULL_DOWN: 841 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 842 conf[1] |= MADERA_GP1_PD; 843 conf[1] &= ~MADERA_GP1_PU; 844 break; 845 case PIN_CONFIG_BIAS_PULL_UP: 846 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; 847 conf[1] |= MADERA_GP1_PU; 848 conf[1] &= ~MADERA_GP1_PD; 849 break; 850 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 851 mask[0] |= MADERA_GP1_OP_CFG_MASK; 852 conf[0] |= MADERA_GP1_OP_CFG; 853 break; 854 case PIN_CONFIG_DRIVE_PUSH_PULL: 855 mask[0] |= MADERA_GP1_OP_CFG_MASK; 856 conf[0] &= ~MADERA_GP1_OP_CFG; 857 break; 858 case PIN_CONFIG_DRIVE_STRENGTH: 859 val = pinconf_to_config_argument(*configs); 860 mask[1] |= MADERA_GP1_DRV_STR_MASK; 861 conf[1] &= ~MADERA_GP1_DRV_STR_MASK; 862 conf[1] |= madera_pin_make_drv_str(priv, val); 863 break; 864 case PIN_CONFIG_INPUT_DEBOUNCE: 865 mask[0] |= MADERA_GP1_DB_MASK; 866 867 /* 868 * we can't configure debounce time per-pin so value 869 * is just a flag 870 */ 871 val = pinconf_to_config_argument(*configs); 872 if (val) 873 conf[0] |= MADERA_GP1_DB; 874 else 875 conf[0] &= ~MADERA_GP1_DB; 876 break; 877 case PIN_CONFIG_INPUT_ENABLE: 878 val = pinconf_to_config_argument(*configs); 879 mask[1] |= MADERA_GP1_DIR_MASK; 880 if (val) 881 conf[1] |= MADERA_GP1_DIR; 882 else 883 conf[1] &= ~MADERA_GP1_DIR; 884 break; 885 case PIN_CONFIG_INPUT_SCHMITT: 886 val = pinconf_to_config_argument(*configs); 887 mask[0] |= MADERA_GP1_IP_CFG; 888 if (val) 889 conf[0] |= MADERA_GP1_IP_CFG; 890 else 891 conf[0] &= ~MADERA_GP1_IP_CFG; 892 893 mask[1] |= MADERA_GP1_DIR_MASK; 894 conf[1] |= MADERA_GP1_DIR; 895 break; 896 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 897 mask[0] |= MADERA_GP1_IP_CFG; 898 conf[0] |= MADERA_GP1_IP_CFG; 899 mask[1] |= MADERA_GP1_DIR_MASK; 900 conf[1] |= MADERA_GP1_DIR; 901 break; 902 case PIN_CONFIG_OUTPUT: 903 val = pinconf_to_config_argument(*configs); 904 mask[0] |= MADERA_GP1_LVL_MASK; 905 if (val) 906 conf[0] |= MADERA_GP1_LVL; 907 else 908 conf[0] &= ~MADERA_GP1_LVL; 909 910 mask[1] |= MADERA_GP1_DIR_MASK; 911 conf[1] &= ~MADERA_GP1_DIR; 912 break; 913 default: 914 return -ENOTSUPP; 915 } 916 917 ++configs; 918 --num_configs; 919 } 920 921 dev_dbg(priv->dev, 922 "%s gpio%d 0x%x:0x%x 0x%x:0x%x\n", 923 __func__, pin + 1, reg, conf[0], reg + 1, conf[1]); 924 925 ret = regmap_update_bits(priv->madera->regmap, reg, mask[0], conf[0]); 926 if (ret) 927 goto err; 928 929 ++reg; 930 ret = regmap_update_bits(priv->madera->regmap, reg, mask[1], conf[1]); 931 if (ret) 932 goto err; 933 934 return 0; 935 936err: 937 dev_err(priv->dev, 938 "Failed to write GPIO%d conf (%d) reg 0x%x\n", 939 pin + 1, ret, reg); 940 941 return ret; 942} 943 944static int madera_pin_conf_group_set(struct pinctrl_dev *pctldev, 945 unsigned int selector, 946 unsigned long *configs, 947 unsigned int num_configs) 948{ 949 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); 950 const struct madera_pin_groups *pin_group; 951 unsigned int n_groups = priv->chip->n_pin_groups; 952 int i, ret; 953 954 dev_dbg(priv->dev, "%s setting group %s\n", __func__, 955 madera_get_group_name(pctldev, selector)); 956 957 if (selector >= n_groups) { 958 /* group is a single pin, convert to pin number and set */ 959 return madera_pin_conf_set(pctldev, 960 selector - n_groups, 961 configs, 962 num_configs); 963 } else { 964 pin_group = &priv->chip->pin_groups[selector]; 965 966 for (i = 0; i < pin_group->n_pins; ++i) { 967 ret = madera_pin_conf_set(pctldev, 968 pin_group->pins[i], 969 configs, 970 num_configs); 971 if (ret) 972 return ret; 973 } 974 } 975 976 return 0; 977} 978 979static const struct pinconf_ops madera_pin_conf_ops = { 980 .is_generic = true, 981 .pin_config_get = madera_pin_conf_get, 982 .pin_config_set = madera_pin_conf_set, 983 .pin_config_group_set = madera_pin_conf_group_set, 984}; 985 986static struct pinctrl_desc madera_pin_desc = { 987 .name = "madera-pinctrl", 988 .pins = madera_pins, 989 .pctlops = &madera_pin_group_ops, 990 .pmxops = &madera_pin_mux_ops, 991 .confops = &madera_pin_conf_ops, 992 .owner = THIS_MODULE, 993}; 994 995static int madera_pin_probe(struct platform_device *pdev) 996{ 997 struct madera *madera = dev_get_drvdata(pdev->dev.parent); 998 const struct madera_pdata *pdata = &madera->pdata; 999 struct madera_pin_private *priv; 1000 int ret; 1001 1002 BUILD_BUG_ON(ARRAY_SIZE(madera_pin_single_group_names) != 1003 ARRAY_SIZE(madera_pin_single_group_pins)); 1004 1005 dev_dbg(&pdev->dev, "%s\n", __func__); 1006 1007 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 1008 if (!priv) 1009 return -ENOMEM; 1010 1011 priv->dev = &pdev->dev; 1012 priv->madera = madera; 1013 pdev->dev.of_node = madera->dev->of_node; 1014 1015 switch (madera->type) { 1016 case CS47L15: 1017 if (IS_ENABLED(CONFIG_PINCTRL_CS47L15)) 1018 priv->chip = &cs47l15_pin_chip; 1019 break; 1020 case CS47L35: 1021 if (IS_ENABLED(CONFIG_PINCTRL_CS47L35)) 1022 priv->chip = &cs47l35_pin_chip; 1023 break; 1024 case CS47L85: 1025 case WM1840: 1026 if (IS_ENABLED(CONFIG_PINCTRL_CS47L85)) 1027 priv->chip = &cs47l85_pin_chip; 1028 break; 1029 case CS47L90: 1030 case CS47L91: 1031 if (IS_ENABLED(CONFIG_PINCTRL_CS47L90)) 1032 priv->chip = &cs47l90_pin_chip; 1033 break; 1034 case CS42L92: 1035 case CS47L92: 1036 case CS47L93: 1037 if (IS_ENABLED(CONFIG_PINCTRL_CS47L92)) 1038 priv->chip = &cs47l92_pin_chip; 1039 break; 1040 default: 1041 break; 1042 } 1043 1044 if (!priv->chip) 1045 return -ENODEV; 1046 1047 madera_pin_desc.npins = priv->chip->n_pins; 1048 1049 ret = devm_pinctrl_register_and_init(&pdev->dev, 1050 &madera_pin_desc, 1051 priv, 1052 &priv->pctl); 1053 if (ret) { 1054 dev_err(priv->dev, "Failed pinctrl register (%d)\n", ret); 1055 return ret; 1056 } 1057 1058 /* if the configuration is provided through pdata, apply it */ 1059 if (pdata->gpio_configs) { 1060 ret = pinctrl_register_mappings(pdata->gpio_configs, 1061 pdata->n_gpio_configs); 1062 if (ret) { 1063 dev_err(priv->dev, 1064 "Failed to register pdata mappings (%d)\n", 1065 ret); 1066 return ret; 1067 } 1068 } 1069 1070 ret = pinctrl_enable(priv->pctl); 1071 if (ret) { 1072 dev_err(priv->dev, "Failed to enable pinctrl (%d)\n", ret); 1073 return ret; 1074 } 1075 1076 platform_set_drvdata(pdev, priv); 1077 1078 dev_dbg(priv->dev, "pinctrl probed ok\n"); 1079 1080 return 0; 1081} 1082 1083static int madera_pin_remove(struct platform_device *pdev) 1084{ 1085 struct madera_pin_private *priv = platform_get_drvdata(pdev); 1086 1087 if (priv->madera->pdata.gpio_configs) 1088 pinctrl_unregister_mappings(priv->madera->pdata.gpio_configs); 1089 1090 return 0; 1091} 1092 1093static struct platform_driver madera_pin_driver = { 1094 .probe = madera_pin_probe, 1095 .remove = madera_pin_remove, 1096 .driver = { 1097 .name = "madera-pinctrl", 1098 }, 1099}; 1100 1101module_platform_driver(madera_pin_driver); 1102 1103MODULE_DESCRIPTION("Madera pinctrl driver"); 1104MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>"); 1105MODULE_LICENSE("GPL v2"); 1106